KR20000046179A - Apparatus and method of controlling disc array - Google Patents

Abstract

PURPOSE: A method of controlling disk array is provided to enhance the reliability of disks by adapting a SCSI(small computer system interface)-to-SCSI method as array management and a mirroring method of level 1 as disk array. CONSTITUTION: A user application demands data connection of a random SCSI device to a host operating system(O/S), and the host operating system demands input/output to a host memory. Then, the host memory requires input/output to a drive system interface of a SCSI device driver, and a data structure is formed in the host memory. The formed data structure is saved in a command block of the host memory and the command block is transferred to the SCSI device driver. Finally, the address of SCSI device is loaded to a SCSI control unit(36) with the command block. The SCSI control unit is connected to the SCSI device driver through the address of SCSI device.

Description

Disk Array Control Device and Control Method

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a disk array control apparatus and a control method, and more particularly, to a level 1 mirroring disk array and a SCSI-to-SCSI. The present invention relates to a disk array control apparatus and a control method suitable for improving reliability by adopting a TO-SCSI) method.

Hereinafter, a conventional disk array device will be described with reference to the accompanying drawings.

1 is a block diagram of a conventional disk array device, and FIG. 2 is a block diagram of a DAC block of a conventional disk array control device.

The DACs of the conventional disk array device and the disk array device are shown in Figs. 1 and 2, and show important components of the RDC (DAC960SX (20 in Fig. 2) produced by Mylex). The primary user interface is by front panel keypad via programmable logic 17 and the secondary user interface is by RS-232 serial communication port. will be.

In addition, the COD (Configuration on Disk) allows the DAC960SX 20 to recognize the change situation when the hard disk (not shown) changes and automatically restructure.

ASIC (Custom Semiconductor) 3 is a device designed to control main memory 4, which is an interleaved DRAM, and the main memory 4 has a modularity of 512 MB, which is a pair of 256 MB (Byte). Supported addresses.

The main memory bus interface 5 provides a data bus buffer between the local bus (local interface) and the main memory 4 (DRAM SIMM module), and the main memory ( Parity generation, parity checking, and parity error interrupt logic.

The BBU circuit 6 then maintains power and appropriate refresh signaling for a given main memory 4 structure.

The Flash EPROM 13 includes a program executed by the CPU 15 of the DAC960SX 20, and includes information on power off and can be upgraded without replacing a hardware chip. Do it.

The NVRAM 16 stores the structure of the current controller and the data of the disk drive (not shown) attached thereto, so that the recording is performed when the structure of the disk drive is changed (such as a disk fail). Keep it.

The SIOP (SCSI I / O Processor) 8 is composed of one host channel and two disk channels, and is composed of a DMA core and a SCSI core. It handles many things like the SCSI protocol.

The local bus 9 is shared by all data and CPU 11 traffic.

The DAC960SX 20 consists of a 128MB modular DRAM cache, which requires at least 8MB of DRAM.

The fast 32-bit interface between the CPU 15 and the cache memory DRAM is provided by a memory control unit (MCU) implemented in discrete programmed logic.

In addition to the memory control and addressing functions, the MCU maps the device and performs decoding for NVRAM 16 and Flash EEPROM 13.

In addition, the dual UART (UAL) 11 includes two UARTs in addition to the general purpose input and output.

The first serial communication port consists of a modem control signal including CTS, RTS, DSR, DTR, DCD, and the second serial communication port supports only Tx and Rx.

The DAC960SX 20 uses a Symbios Logic 53C770 SCSI I / O processor chip for each channel in order for a controller to perform communication such as reading and writing data between the host system and each driver 25. .

Up to six disk drives (first to sixth hard disk drives) 25 may be connected to each SCSI channel 24 controlled by the DAC960SX 20.

It also supports Fast Wide SCSI-3 (Ultra-SCSI).

The output port 3 provides a write-only control bit used for hardware (H / W) in an 8-bit controller board.

Finally, the CPU 15 of the DAC960SX 20 is a 32-bit Intel i960 RISC Microprocessor that operates at 33 MHz and has 1 KB of data cache and 4 KB of instruction cache. It controls all functions including SCSI bus transfer, RAID processing, configuration, data striping, error recovery, drive rebuild, and more.

The operation of the conventional disk array control apparatus will be described.

DAC960SX (20) recognizes several commercially available general hard disks as one high-capacity hard disk, and based on the dual structure, even if an error occurs in the component part, it can be recovered without on-line system. Device.

The DAC960SX (20) can automatically recover the original data (remove data loss) by replacing it with a new hard disk (Hot Swap) even in the event of a hard disk failure while the system is running. The disk can be used to build a large-capacity storage device. In addition, the data transfer speed can be improved by dividing and transferring data to multiple hard disks, and the host can be faulted using the dual host connection function. Tolerant can be used to implement a network service.

RAID levels implemented in the DAC960SX 20 are classified according to a data recording method, and since each maintains its own identity, a high level does not include a function of a low level.

The raid level is preferably used by selecting an optimal raid level for each application, and multiple raid levels may be combined in a single raid.

As a specific example, Level 0 is called data striping, which distributes and writes data to a configuration hard disk without parity, has no data recovery function, and concentrates input and output. Suitable for the application used.

Level 1, called disk mirroring, writes data identically to two hard disks and provides excellent data recovery.

Level 3 is Data Striping with a Dedicated, and divides and writes data in bit units, and records only parity in a parity disk.

Level 5 is referred to as data striping with a distributed parity data, and distributes and records data and parity without specifying a parity disk.

Level 0 + 1 is Leveling & Mirroring, and Level 7 is Just Bunch of Disks (JBOD).

Advantages of DAC960SX (20) include data stability (mirroring / parity, online data rebuild), hot-swap, excellent I / O (dedicated processor, cache), and rich scalability Expandable), full compatibility (SCSI-to-SCSI connection), efficient operation (Dual Host, large capacity LUNs), and the DAC960SX (20) ) Uses the SCSI (Small Computer System Interface) method to access storage devices (hard disks, cartridge drives, etc.) that store voice, fax data, mailbox information, and system programs for VIPS-HD subscriber service. .

This method has a large storage capacity and can match up to seven targets (accumulators) in one host with a fast processing. Each target has a unique ID number.

The master MPU 21 in the master position has a SCSI ID of 7 and the slave MPU 22 in the slave position has a SCSI ID of 6.

SCSI matching includes Asynchronous / Synchronous, Narrow / Wide, and Fast.

Redundancy of the DAC960SX (20) means that when the master MPU 21 issues a SCSI command to the DAC960SX (20), the DAC960SX (20) is connected to the hard disk 25 according to the preset RAID level (levels 1 to 7) of the DAC960SX (20). It is to perform redundancy.

There are various methods of redundancy of the DAC960SX 20. The most commonly used ones are the disk striping method of placing a hard disk with one parity information as shown in FIG. 3 and the fully redundant as shown in 4 DISK Mirroring.

Disk striping has the advantage of being fast because it can maximize the "DISCONNECT" function of the SCSI-2 standard, and disk mirroring is slower than disc striping in terms of speed, but it has the advantage of ensuring the high reliability of the hard disk.

Such a conventional disk array control apparatus and control method have the following problems.

First, in the SCSI device driver (SCSI Device_Driver) after processing the script (SCRIPT) when processing the Interrupt Service Routine (Interrupt Service Routine) when the SIP and DIP occurs at the same time processing of ambiguous.

Second, there was a problem with the stock of Error Code = 71FE (Check Condition).

Third, interrupt control did not occur in some cases. That is, when the SCSI connection between the host and the target is made, but the bus is held indefinitely when the bus is held due to a failure between the RDC and the hard disk drive (HDD), the master MPU and the RDC are arbitrated and select with attention ( There was a problem that the bus was held due to a failure of the hard disk drive in the data in / out phase after completing the selection with attention and message out phase processes normally.

Fourth, even if an interrupt occurs, there is a problem that the interrupt itself is lost because neither the SIP nor the DIP is set in the ISTAT.

An object of the present invention has been made in view of the above-mentioned problems of the prior art, adopting a level 1 mirroring method as a disk array method, and the reliability of the disk by adopting a SCSI-to-SCSI method as an array management method. It is to provide a disk array control apparatus and a control method improved.

According to one aspect of the present invention for achieving the above object, the first and second memory, which is the main memory of any board, and the second and third are embedded with a program of a central processing unit (CPU) for controlling the board A plurality of SCSI controllers for processing a memory, a protocol of any SCSI (SCSI) connected to the board, a LAN controller for controlling the LAN and the board, and the first, second, and third devices. And a first bus for accessing a memory and the SCSI control unit, a second bus for accessing the LAN control unit, and a bus separation buffer for separating the first and second buses.

According to another aspect of the present invention for achieving the other object as described above, the user application requesting the host drive system (O / S) to access the data in any SCSI device, the host memory system is Requesting an input / output, requesting an input / output of the host memory to a drive system interface of the SCSI driver, generating a data structure in a host memory according to the input / output request, and if the data structure is generated, a command block of the host memory Storing the command block; transmitting the command block to the SCSI driver; loading an address of the SCSI device into the SCSI controller using the command block; and the SCSI controller is configured to use the SCSI device address. It comprises the step of connecting the drive unit to drive the device.

According to the present invention as described above, the reliability of the disk array can be improved.

1 is a block diagram of a conventional disk array control apparatus

2 is a block diagram of a DAC of a conventional disk array control apparatus.

3 illustrates a disk stripping of a DAC according to an exemplary embodiment.

4 illustrates fully redundant disk mirroring of a DAC according to another conventional embodiment.

Figure 5 is a block diagram of a disk array device of the present invention

6 is a diagram illustrating the present invention SCSI input and output operations.

7 is a view showing the driving of the disc array of the present invention;

* Description of the symbols for the main parts of the drawings *

30: CPU 31: the first memory

32: second memory 33: third memory

34: fourth memory 35: fifth memory

36: SCSI control unit 37: LAN control unit

38: serial port 39: common memory

40: first bus 41: second bus

42: bus detach buffer

Hereinafter, a configuration and an operation according to an exemplary embodiment of the present invention will be described with reference to the accompanying drawings.

5 is a block diagram of a disk array device of the present invention.

The block diagram of a disk array device according to the present invention is a RDCC (Raid Disk Controller Circuit) board, which includes a first memory 31, which is a main memory of the RDCC board, and a second and third embedded therein. Memory 32, 33, and data of a disk driver (not shown) are stored, and through the fourth memory 34 and serial port 38 for storing the contents each time the structure of the disk driver is changed. The first to the third, which is composed of a fifth memory for storing data between P1 and P2, a direct memory access (DMA) core, a SCSI core, and the like, to perform various processes of the SCSI protocol. SCSI (SCSI) control units 36a, 36b, 36C, LAN (Local Area Network) control unit 37, common memory 39, and the first, second, and third memories 31, 32 ( 33) and the first bus 40 to access the SCSI controller 36, the LAN controller 37, and a common memo. It consists of 39, and a second bus 41 for accessing the first and the second bus 40. Bus for separation of the 41 separate buffer 42.

At this time, the first memory 31 is composed of DRAM, the second memory is composed of EPROM, the third memory 33 is composed of FLASH memory, and the fourth memory ( 34) consists of Nonvolatile SRAM (NVRAM).

The fifth memory 35 is a dual port memory, and the common memory 39 is composed of SRAM.

The serial port 38 is also an RS232C serial port.

In this case, the RDCC board has an EPLD CHIP added thereto, and the EPLD CHIP serves to control signal lines on the CPU 30 and each chip, and another CPU (not shown). Data Mux / Demux function is supported to support Dynamic Bus Sizing.

6 is a diagram illustrating the SCSI input and output operation of the present invention.

In the input / output operation of the SCSI controller 36 of the present invention, first, a host application (O / S) is performed in order for a user application 50 to access data in a SCSI device 54. / System)) 51.

Such a request is sent to the O / S interface 52a of the SCSI device driver 52, and the O / S interface 52a is used for the hardware interface 52b. Schedule and format.

When the O / S interface 52a receives the I / O request 61, it creates a data structure in the host memory 60, which is sent to the hardware layer to be executed, and I Wait for / O to complete

The O / S interface 52a reads the structure completion status and then uses this data structure to update the scheduler information.

Appropriate information is then placed in a COMMAND BLOCK 62 to be sent to the hardware interface 52b, where the hardware interface 52b places the data in the memory 60 and the script routines to be executed (SCRIPTS routine). Information in the command block 62 is used to determine whether a script program is required to execute input and output, or to set up a data area for the command and data buffer 63.

The hardware interface 52b then loads the script starting address into the DSP storage 53a of the SCSI controller 53.

The SCSI controller 53 performs a subroutine to connect to a drive with a particular SCSI device ID, and the hardware interface 52b informs the O / S interface 52a to update the scheduler information.

7 is a view showing the driving of the present invention the SCSI array device.

As shown in FIG. 7, when the application input / output request is input to the host O / S, the SCSI driver 52 may include a function code, a DCB pointer, and a parameter list. (Parameter List) is provided, and MKCMD (Make Command) is part of building a SCSI command block.

The SCSI command block is composed of code representing all device types, a command count, a data count, and the like.

In addition, after the SC_pend (wait interrupt) in the SCSI Interrupt Service Routine (ISR), the DSP storage unit 53a read (ISTAT Reg READ) of the SCSI controller 53 is performed, which means that the DIP of the DSP storage unit 53a is set. If it is not DIP or SIP, Abort is performed. In this case, when the DIP SET and the SIP SET of the DS storage unit occur at the same time, the DIP SET is first processed first, and then the SIP SET is processed.

If the ISR Routine is SC_post after SC_pend, it analyzes the status to determine whether it is in normal termination or check condition.If it is correct, it returns the status and if it is wrong, it asks if it is Phase Mismatch again. Compute and update the pointer and counter according to the number of bytes left.

Then patch the data address and the number of bytes left in the data buffer and clear the direct memory access (DMA) and SCSI FIFO.

At this time, if it is not Phase Mismatch, it aborts.

The present invention as described above has the following effects.

First, if the problem occurs when SIP and DIP occur at the same time during Interrupt Service Routine (ISR) processing after executing script (SCRIPT) in SCSI Device_Driver, DIP should be processed first, and then SIP The treatment eliminates the ambiguity of the treatment.

In other words, after the script was started after SC_pend, it always resolved the ambiguity of the order by asking the ISTAT Reg whether the DIP was set and asking the ISTAT Reg whether the SIP was set and processing each of them.

Second, the problem of inventory of Error Code = 71FE (Check Condition), that is, the retry process for the SCSI failure of the SCSI driver, prevents the SCSI bus from reconnecting even if the SCSI bus is reset for all error codes. As a solution, RDCC issues a status check and returns a error containing the sense key by requesting the device driver when it is returned as an error.

Third, if an interrupt occurs but neither SIP nor DIP is set in ISTAT, the interrupt is lost by setting the abort bit.

Claims (6)

A first memory which is a main memory of any board; Second and third memories incorporating a program of a central processing unit (CPU) for controlling the board; A plurality of SCSI controllers for processing a protocol of any SCSI (SCSI) connected to the board; A LAN control unit controlling the board and an arbitrary LAN; A first bus for accessing the first, second and third memories and the SCSI controller; A second bus for accessing the LAN control unit, And a bus separation buffer for separating the first and second buses. A user application requesting a host drive system (O / S) for a data connection on any SCSI device; Requesting input and output from the host driving system to a host memory; Requesting input and output from the host memory to a drive system interface of a SCSI driver; Creating a data structure in the host memory; Storing the data structure in a command block of the host memory; Transmitting the command block to the SCSI driver; Loading an address of the SCSI device into the SCSI controller using the command block; And connecting, by the SCSI controller, to a driving unit that drives the SCSI device using the SCSI device address. The method of claim 2, wherein the SCSI device driver is further configured to provide a function code, a DCB pointer, a parameter list when the application input / output request is input to the host driver, construct a command block, and execute the application input / output. SC_pend in the interrupt service routine due to the readout of the DSP storage unit of the SCSI controller, and if the interrupt service routine is SC_post, analyzing whether the SCSI controller is normally terminated and whether the state check-in is performed; If the analysis results in normal termination, the status is set to the standby state, and if the analysis result is not normal termination, checks whether it is phase mismatch once more, and if the verification result is phase mismatch, calculates the number of bytes left. According to the number of bytes left, Updating the non-pointer and the counter, patching the data address and the number of bytes left in the data buffer, and clearing the direct memory access and the FIFO of the SCSI. Array control method. The method of claim 3, wherein the reading of the DS storage unit of the SCSI controller is performed by analyzing whether the DIP storage unit has a DIP (SET) or a SIP is set (SET), and the analysis result of the SET and the DIP. And setting a standby state in accordance with the SET of the SIP, and stopping if none of the DIP or the SIP is set. The disk array control method of claim 4, wherein the DIP SET and the SIP SET are processed after the DIP SET and the SIP SET are processed simultaneously. The method of claim 2, wherein the command block comprises a code indicating the device type, a command count, and a data count.