KR20000044514A - Defect manager in asynchronous transfer mode system - Google Patents

Abstract

PURPOSE: A defect manager in an asynchronous transfer mode(ATM) system is provided to utilize a trouble manager in a system which decides an alarm indication signal and a remote defect signal, and to test a specific ATM connected state according to either receiving a specific ATM cell during a periodical time interval. CONSTITUTION: A defect manager in an asynchronous transfer mode(ATM) system comprises a head extractor(214), an alarm indication signal detector(220), a remote defect signal detector(216), an alarm indication signal state register(222), a remote defect signal state register(218), a controller(224), and a timer(226). The head extractor(214) latches a head of an ATM cell and function type. The alarm indication signal detector(220) discriminates whether an ATM cell received to a cell inputter is a cell of the alarm indication signal. The remote defect signal detector(216) discriminates whether the ATM cell is a cell of the remote defect signal. The alarm indication signal state register(222) clears or set one bit of corresponded register according to the discrimination the cell of the alarm indication signal. The remote defect signal state register(218) clears or sets the one bit of corresponded register according to the discrimination of the cell of the remote detect signal. The controller(224) sets the registers, and reads values of each register, to decide a state of the alarm indication signal and a state of the remote defect signal.

Description

Fault management device in asynchronous transmission mode system

The present invention relates to a maintenance method of an asynchronous transmission mode system, and more particularly, to a failure management apparatus for measuring a diagnosis function and a specific connection state of a system.

In general, exchange systems have been divided into various types for different purposes, such as by region or by service type. However, with the rapid development of the telecommunications and electronics industries today, exchange systems have begun to meet any of the above objectives. In other words, depending on service area, it can be used for local, local / tandem and toll exchange system, and ultimately, Public Switched Telephony Network, Integrated Service It is evolving into a flexible exchange system in various network types such as Digital Network, Advanced Intelligent Network, and Public Land Mobile Network.

In addition, modular hardware or software makes it easy to add and change functions, making it easy to adapt to a variety of network environments, so that not only common line signaling (CCS No. 7) but also ISDN basic / first-class access (2B + D / 23B + D, 30B + D access) and packet processing functions can be easily implemented.

Such a switching system serves various additional functions in addition to the main function of switching each subscriber. Among such additional functions, a switching system maintenance function is included. This maintenance function is an additional function that monitors the current operation status of the exchange system and thus enables the exchange system to perform optimal service. The maintenance function includes a function of diagnosing an internal call path to smoothly service an exchange service, which is a main function of the exchange system.

Therefore, the exchange system including the local exchange system, the private exchange system, the asynchronous transfer mode (ATM) exchange system, and the like are provided with operation and maintenance functions. A representative function of the above operation and maintenance functions may be referred to as a function for managing and maintaining the state of the path.

In particular, in the case of an Asynchronous Transfer Mode (ATM) switching system in which various cell transfer paths exist, such as a switch between a switch and a subscriber, a path between the switch, and a connection path between the switch and the switch, management and maintenance of the path state Should be possible. To test these paths, the ability to create and analyze cells over tens of Mbps in the ATM switching system is implemented in circuit packs for the ATM Cell Testing Assembly Board (ACTA). In addition, the ACTA includes software (S / W) blocks for controlling / testing paths to check for abnormalities such as cell transmission paths and subscriber matching devices.

Therefore, in the ATM system, the specific ATM connection state may be checked by whether or not a specific ATM cell is received during a periodic time interval for the diagnosis function of the system and the measurement of the specific ATM connection state. In addition, at this time, there is an ATM connection counter for measuring an input period for each ATM connection, so that it is possible to determine whether a specific ATM cell is received.

On the other hand, in the ATM system, a failure detection signal (AIS) and a failure detection signal (RDI: remote defect indication) are typically used for diagnosis of a system and measurement of a specific ATM connection state.

In addition, the flow of signals for diagnosis and measurement is largely divided into a forward flow and a reverse flow. Following the forward flow is the flow of the OAM cell and the flow of the Alarm Indication Signal (AIS), and following the reverse flow is the flow of the performance monitoring result and the Remote Defect Indication (RDI). Is the flow of.

In the above-described ATM system, a configuration for measuring a diagnosis function and a specific ATM connection state of the system is as shown in FIG. 1.

Hereinafter, a diagnosis function and a specific ATM connection state measurement operation of a conventional system will be described with reference to the configuration shown in FIG. 1.

The cell input unit 110 receives the ATM cell and transmits it to the cell output unit 112. At the same time, the cell input unit 110 provides the ATM cell to the header extracting unit 114 to determine the AIS or RDI state of the corresponding ATM cell. The header extractor 114 latches a header and a function form of an input ATM cell. The AIS detector 118 or the RDI detector 116 determines whether the ATM cell currently received is an AIS cell or an RDI cell as a header and a functional form of the ATM cell received from the header extractor 114. If the currently received ATM cell is a user cell, the corresponding counter of the cell counter storage unit 120 is cleared to "0", and if the ATM cell is an AIS or RDI cell, a predetermined cycle time, i.e., a specific cycle time, is specified. Set the desired counter value. The timer unit 124 generates one cell input period and an entire specific period time interval. The cell counter 126 receives one cell input period signal received from the timer unit 124 and adds the cell counter values of the cell counter storage unit 120 one by one. In this case, when the value read from the cell counter storage unit 120 is equal to a specific cycle time value previously determined by the controller 122, the value is not updated. The controller 122 reads the counter value of each cell of the counter counter storage unit 120 by inputting a specific periodic time signal received from the timer unit 124. If the read value is equal to a value previously determined by the controller 122, it may be determined that an AIS or RDI cell has been received or no user cell has been received, and the ATM connection may be determined to be AIS or RDI. In addition, when the value of the cell counter storage unit 120 is different from a specific period value predetermined by the controller 122, it may be determined that the cell counter storage unit 120 is not in an AIS or RDI state. The controller 122 records a specific period value in the counter storage unit 120 for each cell to measure the next AIS or RDI state. If the AIS or RDI state detection function is to determine whether the ATM cell is received within a predetermined time, a large amount of hardware can be used by using the cell-by-cell counter 126 and the cell-by-cell counter 120 for the function of determining only the reception. You will need In addition, in some cases, there was a problem in that the number of ATM connections that can perform continuity check was limited.

In other words, if the AIS or RDI detection function determines whether the ATM cell is received within a predetermined time, a large amount of hardware is used when the cell counter 126 and the cell counter storage unit 120 are used to determine only the reception. It is necessary, and implementation problems may arise due to the large amount of hardware. In addition, this causes a problem that cannot be implemented due to hardware constraints when the number of ATM connections that require AIS or RDI state detection increases.

Accordingly, an object of the present invention for solving the above problems is to provide a fault management apparatus that removes the limitation of the ease and convenience of implementation and connection of the state detection asynchronous transmission mode with simple hardware.

According to the present invention for achieving the above object, according to whether or not the fault detection signal cell of the fault detection signal detection unit, one bit of the fault detection signal status register is cleared or set, and fault detection of the fault detection signal detection unit is performed. By clearing or setting one bit of the fault detection signal status register according to whether the signal cell is discriminated or not, the control unit reads the fault detection signal status register and each register value of the fault detection signal status register at a specific period of the timer section, and fails. The fault management device is implemented in the asynchronous transmission mode system to determine the detection signal state and fault detection state.

1 is a diagram illustrating a configuration for measuring a diagnosis function and a specific connection state of a system in a typical asynchronous transmission mode system.

2 is a diagram illustrating a configuration for measuring a diagnosis function and a specific connection state of a system in an asynchronous transmission mode system according to an embodiment of the present invention.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

First, in the ATM system, the specific ATM connection state may be checked whether or not a specific ATM cell is received during a periodic time interval for the diagnostic function of the system and the measurement of the specific ATM connection state. At this time, the ATM connection counter for measuring the input period for each ATM connection for measuring the input period for each specific ATM connection can determine whether or not to receive a specific ATM cell.

In the ATM system according to an embodiment of the present invention, a configuration for measuring a diagnosis function and a specific ATM connection state of the system is as shown in FIG. 2.

Referring to FIG. 2, a diagnosis function and a specific ATM connection state measurement operation of a system according to an embodiment of the present invention will be described.

First, the cell input unit 210, the cell output unit 212, the head extraction unit 214, the DRI detection unit 216, the AIS detection unit 220, and the timer unit 226 according to an embodiment of the present invention It is the same structure as the conventional structure shown in FIG. In addition, the RDI status register 218, the AIS status register 222, and the controller 224 are changed to the configuration according to the exemplary embodiment.

The AIS status register 222 clears the register value to "0" if the ATM cell currently received by the AIS detector 220 is a user cell, and sets the register value if the ATM cell is an AIS cell. Set to "1". That is, it has a 1-bit register value for each connection of the AIS status register 222, and a value of "0" means that a user cell has been received and that the AIS status has been released. However, if the value is " 1 ", it is determined that the AIS cell has been received or that the user cell has not been received for a specific period of time. On the other hand, each one-bit register constituting the AIS status register 222 is set to "1" in advance by the control unit 224. The controller 224 periodically reads and writes "1" every specific period of the timer 226.

The RDI status register 218 clears the register value to "0" when the ATM cell currently received by the RDI detector 216 is a user cell, and sets the register value when the ATM cell currently received is an RDI cell. Set to "1". That is, the RDI status register 218 has a 1-bit register value for each connection, and if the value is "0", it means that the user cell has been received and the RDI status is released. However, if the value is " 1 ", it is determined that the RDI cell has been received or that the user cell has not been received for a specific period of time. On the other hand, each one-bit register constituting the RDI status register 218 is set to "1" in advance by the control unit 224. The controller 224 periodically reads and writes "1" every specific period of the timer 226.

The timer unit 226 generates an entire specific cycle time interval.

Hereinafter, an operation according to an exemplary embodiment of the present invention will be described in detail with reference to the configuration as described above.

In the following description, the operation of processing an AIS cell and the operation of processing an RDI cell will be described in detail.

First, an operation of processing an AIS cell according to an exemplary embodiment of the present invention will be described.

The cell input unit 210 receives the ATM cell and transmits it to the cell output unit 212. At the same time, the cell input unit 210 provides the ATM cell to the header extracting unit 214 to determine the AIS state of the corresponding ATM cell. The header extractor 214 latches a header and a function form of an input ATM cell. The AIS detector 220 determines whether the ATM cell currently received is an AIS cell as a header and function form of the ATM cell received from the header extractor 214.

If the currently received ATM cell is a user cell, the corresponding register value of the AIS status register 222 is cleared to "0". If the ATM cell is an RDI cell, the corresponding register value is set to "1".

The timer unit 226 generates an entire specific cycle time interval. The controller 224 reads an AIS status register value for each ATM cell connection of the AIS status register 222 by inputting a specific periodic time signal received from the timer 226. If the read value is "0", it may be determined that the user cell has been received, and the ATM connection may determine that the AIS state is terminated. If the read value is "1", it is determined that the user cell has not been received or that the AIS cell has been received. The controller 224 then writes " 1 " in the AIS status register 222 to measure the next AIS status.

Next, an operation of processing an RDI cell according to an exemplary embodiment of the present invention will be described.

The cell input unit 210 receives the ATM cell and transmits it to the cell output unit 212. At the same time, the cell input unit 210 provides the ATM cell to the header extracting unit 214 to determine the RDI state of the corresponding ATM cell. The header extractor 214 latches a header and a function form of an input ATM cell. The RDI detector 216 determines whether an ATM cell currently received as an RDI cell as a header and function type of the ATM cell received from the header extractor 214.

If the currently received ATM cell is a user cell, the corresponding register value of the RDI status register 218 is cleared to "0", and if the RDI cell is set to "1".

The timer unit 226 generates an entire specific cycle time interval. The control unit 224 reads an RDI status register value for each ATM cell connection of the RDI status register 218 by inputting a specific periodic time signal received from the timer unit 226. If the read value is "0", it may be determined that the user cell has been received, and the ATM connection may determine that the RDI state is terminated. If the read value is "1", it is determined that the user cell has not been received or that the RDI cell has been received. The controller 224 then writes a " 1 " to the RDI status register 218 to measure the next RDI state.

As described above, the present invention can solve the implementation problem due to the hardware by simplifying the hardware, and there is an advantage that the hardware is not limited even if the number of ATM connections requiring the AIS or RDI state detection increases.

Claims (1)

Apparatus for managing a fault occurring in an asynchronous transmission mode system, A head extracting unit for latching a head and a functional form of an AT cell input through a cell input unit; A fault detection signal detection unit for determining whether an AT cell received by the cell input unit as a head and function form of an AT cell provided from the head extracting unit is a fault detection signal cell; A fault detection signal detection unit for determining whether an AT cell received by the cell input unit as a head and function form of an AT cell provided from the head extracting unit is a fault detection signal cell; A fault detection signal status register in which a corresponding bit of one bit is cleared or set according to whether a fault detection signal cell is discriminated in the fault detection signal detection unit; A failure detection signal status register in which a corresponding register of one bit is cleared or set according to whether the failure detection signal cell is discriminated by the failure detection signal detection unit; After the fault detection signal status register and the fault detection signal status register are set before normal operation, the fault detection signal status and fault occurrence are read by reading the register values of the fault detection signal status register and the fault detection detection signal status register every specific period. A control unit for determining a detection signal state; Failure management apparatus in the asynchronous transmission mode system, characterized in that consisting of a timer for generating the specific period.