KR20000040529A - Horizontal diffusing mos transistor and method for manufacturing the same - Google Patents

Abstract

PURPOSE: A horizontal diffusing MOS transistor and a method for fabricating the MOS transistor are provided to increase the resistance to the electric field by forming a space charge area in a length direction of a trench. CONSTITUTION: A plurality of second drift areas(104) are formed on a first conductive semiconductor substrate(102). A second conductive drain area(118) is formed adjacent to the drift areas(104). A first conductive body area(106) is formed on the semiconductor substrate(102). A second conductive source area(116) is formed adjacent to the surface of the body area(106). A gate(122) is formed by interposing a gate insulation film(124) between the drain area(118) and the source area(116). A trench(t) filled with an insulation material is formed in the drift areas(104) positioned between the drain area(118) and the source area(116).

Description

Horizontal diffusion MOS transistor and manufacturing method thereof

TECHNICAL FIELD The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to a horizontal diffusion MOS transistor and a method for manufacturing the same.

In the early manufacturing process of forming a horizontal diffusion MOS transistor, the design rule is large and the depth of junction of the impurity layer is deep, so that even if a breakdown voltage or strong surge voltage is applied to the device, It had the characteristics of enduring to some extent without damage or destruction.

However, the recent trend is that the depth of the junction is shallow, and the design rule is scaled down, so that the secondary breakdown voltage due to breakdown voltage, strong surge voltage, or overshooting voltage / current in the switching operation of the device is reduced. Occasionally, an element may be destroyed without being recovered. In order to solve this problem, it is difficult to achieve high integration since a method of adding a heat treatment or increasing a design rule to form a deep junction in the manufacturing process must be used.

1 is a cross-sectional view illustrating a conventional horizontal diffusion MOS transistor.

Referring to FIG. 1, drift regions 4 are formed on the semiconductor substrate 2 to be spaced apart from each other. In the drift region 4, a drain region 18 is formed under the field oxide film 12 between the PTOP region 10 and the top region 10. A body region 6 is formed between the drift regions 4 in the substrate 2, and a source region 16 having a buried impurity region 6 therein is formed in the body region 6. . The plate electrode 20 and the gate 22 are formed on the field oxide film 12, and a portion of the plate electrode 20, the source region 16 and the drain region 18 is exposed on the insulating film 24. A drain electrode 28 in contact with the electrode 20 and the drain region 18 and a source electrode 26 in contact with the source region 16 are formed.

In the above-described conventional horizontal diffusion MOS transistor, impurity redistribution occurs in the contact region between the field oxide film 12 and the silicon of the semiconductor substrate 2 during the thermal oxidation process of forming the field oxide film 12.

This redistribution of impurities occurs in phosphorus and boron impurities. In the case of phosphorus, phosphorus impurities are pushed out of the field oxide film 12 out of the field oxide film 12, and phosphorus accumulates on the surface of the semiconductor substrate 2, and phosphorus is deposited on the surface of the semiconductor substrate 2 under the field oxide film 12. Concentration is increased. In the case of boron, the field oxide film 12 accepts the boron impurities, depletes the boron impurities on the surface of the semiconductor substrate 2 close to the field oxide film 12, and thus the semiconductor substrate under the field oxide film 12. (2) The boron concentration on the surface is reduced.

Here, when the reverse voltage is applied to the horizontal diffusion MOS transistor, the space charge area is reduced due to the increased concentration of phosphorus on the surface of the semiconductor substrate 2, that is, the drift region 4, under the field oxide film 12. It does not form wide enough. In this situation, when the reverse voltage is increased and the breakdown voltage is applied, a rapidly increased electric field is applied to the space charge region that is not sufficiently widened, and the device is destroyed at the breakdown voltage. Moreover, the breakdown voltage is reduced to ensure stable operation of the horizontal diffusion MOS transistor.

In order to prevent such a device breakdown and a decrease in the breakdown voltage, the target region 10 is inevitably formed on the surface of the drift region 4 under the field oxide film 12. The top region 10 is formed by ion implantation of boron to attenuate the increased concentration of phosphorus due to the thermal oxidation process of the field oxide film 12. The total space charge region (W₁ + W₂ + W₃) generated at the portion where the top region 10 and the drift region 4 are in contact with each other bears an electric field at the breakdown voltage.

In the total space charge region (W₁ + W₂ + W₃), the lengths of W₁ and W₃ in the vertical direction corresponding to the junction depth of the pith region 10 occupy considerably less than the total space charge region (W₁ + W₂ + W₃). In the horizontal direction, the W₂ length becomes the main element that occupies most of the total space charge region (W₁ + W₂ + W₃). Therefore, if the W 2 length in the horizontal direction is secured, the total space charge area becomes large, thus sufficiently covering the electric field due to breakdown.

However, securing the W 2 length in the horizontal direction causes a problem in that the device area of the horizontal diffusion MOS transistor is increased.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a horizontal diffusion MOS transistor capable of increasing the breakdown voltage with respect to an electric field caused by a breakdown voltage without increasing the device area.

Another object of the present invention is to provide a method of manufacturing a horizontal diffusion MOS transistor that can increase the breakdown voltage with respect to an electric field caused by a breakdown voltage without increasing the device area.

1 is a cross-sectional view of a conventional horizontal diffusion MOS transistor.

2 is a cross-sectional view of a horizontal diffusion MOS transistor formed by the method of an embodiment of the present invention.

3A to 3F are cross-sectional views illustrating a method of forming a horizontal diffusion MOS transistor according to an exemplary embodiment of the present invention according to a process sequence.

In order to achieve the above technical problem, a horizontal diffusion MOS transistor according to an embodiment of the present invention includes drift regions of a second conductivity type formed on a first conductive semiconductor substrate and spaced apart from each other, and one surface of the drift region. A drain region of the second conductivity type formed in the vicinity, a body region of the first conductivity type formed in the substrate between the drift regions, a source region of the second conductivity type formed near one surface of the body region, a drain region and a source And a gate formed on the body region between the regions via a gate insulating film, and a trench formed in the drift region between the drain region and the source region and filled with an insulating material therein.

The insulating material may be polycrystalline silicon with an oxide film on the inner wall of the trench, or an oxide doped with a flowable insulator such as an impurity doped with impurities such as BPSG, PSG, or BSG, or an oxide not doped with impurities such as HTO or LTO. USG (Undoped Silicate Glass), HDP (High Density Plasma) oxide film, or SOG (Spin On Glass), such as -O ₃ -tetra ethyl ortho-silicate (TEOS) film.

A first electrode type buried impurity layer junction with the source region in the body region below the source region, a field oxide film on the drift region between the drain region and the body region, a plate electrode on the field oxide film around the drain region, and a source. A source electrode is further provided for connection with the region.

The plate electrode is commonly connected to the drain electrode connected to the drain region.

In order to achieve the above technical problem, a method of manufacturing a horizontal diffusion MOS transistor according to an embodiment of the present invention includes: drift regions of a second conductivity type having a shape spaced apart from each other on a semiconductor substrate of a first conductivity type, Forming a body region of a first conductivity type therebetween, forming a pair of trenches spaced at regular intervals with a drain region to be formed later in the drift region, and filling an insulating film in the trench inner wall Forming a field oxide film in a region other than the body region and the drain region to be formed later, forming a gate insulating film on the body region adjacent to the drift region, and then forming a gate; Forming a source region of the second conductivity type in the body region not being formed, and forming a drain region of the second conductivity type in the drift region It is provided.

In the step of filling the trench with an insulating material, an oxide film is formed on the inner wall of the trench, followed by deposition with polycrystalline silicon, or a fluidic insulating material such as an oxide doped with impurities such as BPSG, PSG, BSG, or HTO, LTO. The trench is deposited using an undoped oxide, an undoped silicate glass (USG) such as an O ₃ -tetra ethyl ortho silicate (TEOS) film, a high density plasma (HDP) oxide film, or spin on glass (SOG). Landfill.

In the process of forming a gate, a plate electrode is further formed on the field oxide film around the drain region, and before the process of forming the source region, the buried impurities of the first conductivity type forming a junction with the source region in the body region under the source region. Further forms the layer.

After the source region and the drain region are formed, a drain electrode connected in common with the drain region and the plate electrode and a source electrode connected with the source region are further formed.

The horizontal diffusion MOS transistor incorporating the trench of the present invention secures a space charge region in the vertical length direction of both sides of the trench, thereby increasing the breakdown voltage with respect to an electric field caused by a reverse voltage, in particular, a breakdown voltage. Area can also be reduced.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, embodiments of the present invention may be modified in many different forms, and the scope of the present invention should not be construed as being limited by the embodiments described below. Embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Accordingly, the thickness of the film and the like in the drawings are exaggerated for clarity, and the elements denoted by the same reference numerals in the drawings mean the same elements. In addition, when a film is described as being on or in contact with another film or semiconductor substrate, the film may be present in direct contact with the other film or semiconductor substrate, or a third film may be interposed therebetween. have.

2 is a cross-sectional view of a horizontal diffusion MOS transistor formed by the method of an embodiment of the present invention.

Referring to FIG. 2, the drift regions 104 of the second conductivity type, for example, the N type, are spaced apart from each other in the semiconductor substrate 102 of the first conductivity type, for example, the P type. The body region 106 of the first conductivity type is formed in the substrate 102 between the drift regions 104. The drain region 118 of the second conductivity type is formed near the surface of the drift region 104, and the source region 116 of the second conductivity type is formed near the surface of the body region 106. A pair of trenches t are formed in the drift region 104 between the drain region 118 and the source region 116 at regular intervals, and the trench t is a polysilicon 112b having an insulating film 110. Filled with The field oxide film 112 is formed on the drift region 104 between the drain region 118 and the body region 106. The buried impurity region 114 of the first conductivity type is formed in the body region 106 under the source region 116. The plate electrode 120 is formed on the field oxide film 112 between the drain region 118 and the edge of the trench t, and over the body region 106 between the source region 116 and the edge of the trench t. The gate 122 is formed over a part of the field oxide film 112. A second insulating layer 124 is formed to surround the plate electrode 120 and the gate 122 while exposing a portion of the source region 116, the drain region 118, and the plate electrode 120. A gate electrode formed in contact with the source electrode 126, the plate electrode 120, and the drain region 118 formed in contact with the source region 116 and the gate 122 formed in common. There is a poem).

Here, the insulating materials 110 and 112b filling the trench t are oxides doped with impurities, such as BPSG, PSG, BSG, or the like, or doped with impurities such as HTO, LTO, or the like. An oxide, an undoped silicate glass (USG) such as an O ₃ -tetra ethyl ortho silicate (TEOS) film, a high density plasma (HDP) oxide film, or a spin on glass (SOG) may be used.

When a reverse voltage is applied to such a horizontal diffusion MOS transistor, the vertical length directions W₁ 'and W₃' and the width length W₂ 'of both sides of the trench t deeply formed in the drift region 104 are added together. The total space charge region (W₁ '+ W₂' + W₃ ') is formed. In the total space charge region (W₁ '+ W₂' + W₃ '), the vertical length directions (W₁', W₃ ') on both sides of the trench (t) are the majority of the total space charge region (W₁' + W₂ '+ W₃'). And the width length (W₂ ') of the trench (t) occupies a small portion of the total space charge region (W₁' + W₂ '+ W₃').

By securing the space charge region by using the trench t, the width length W₂ 'of the trench t occupying the element area is the W₂ length in the horizontal direction of the conventional pitop region (see 10 in FIG. 1). The area of the horizontal diffusion MOS transistor is reduced by taking up less area than that of Fig. 1).

3A to 3F are cross-sectional views illustrating a method of forming a horizontal diffusion MOS transistor according to an exemplary embodiment of the present invention according to a process sequence.

Referring to FIG. 3A, an oxide film 112a is formed on a low concentration of a first conductivity type, for example, P-type semiconductor substrate 102. After applying the first photoresist and patterning the first photoresist exposing the semiconductor substrate on which the drift region 104 is to be formed, a drift region having a shape spaced apart from each other by ion implantation of a second conductivity type, for example, N-type impurities Form the field 104.

Thereafter, after applying the second photoresist and patterning the second photoresist exposing the semiconductor substrate on which the body region 106 is to be formed, the body region 106 is formed by ion implanting impurities of the first conductivity type. .

Referring to FIG. 3B, the third photoresist is patterned on the resultant and then etched to form trenches t in pairs spaced at regular intervals with the drain region to be formed later in the drift region 104. .

Referring to FIG. 3C, the oxide film is formed on the entire surface of the resultant to form the oxide film 112b on the inner wall of the trench t. Thereafter, polysilicon 110 is deposited on the entire surface of the resultant to fill the trench t. The result is shown in Figure 3d.

Here, the oxide film 112b formed on the inner wall of the trench t prevents an electrical short with the drift region 104. In addition, the oxide film 112b and the polysilicon 110 filling the trench t may be replaced with another insulating material. The insulating material is formed by depositing an oxide doped with a flowable insulator, for example, BPSG, PSG, BSG, or the like, or an oxide not doped with HTO, LTO, or ozone-TEOS (O _3- ). It may be formed using USG (Undoped Silicate Glass), HDP (High Density Plasma) oxide film or SOG (Spin On Glass), such as tetra Ethyl Ortho Silicate film.

Referring to FIG. 3E, the entire surface of the resultant is etched to remove the remaining portions except for the polysilicon 110 filling the inside of the trench t. Thereafter, in order to form a field oxide film on regions other than the body region and the drain region, which are active regions on the semiconductor substrate, the fourth photoresist is applied and subjected to predetermined photo development, followed by heat treatment, that is, selective oxidation (LOCOS: LOCal Area). On Silicon) to form a field oxide film 112.

Referring to FIG. 3F, polysilicon is deposited on the entire surface of the resultant and etched to form a gate 122 and a plate electrode 120.

The plate electrode 120 is formed on the field oxide film 112 on the drift region 104, and when an reverse voltage is applied, the plate electrode 120 spreads an electric field extending toward the surface of the drift region 104 and toward the drain region 118 formed thereafter. Plays a role. Therefore, the breakdown voltage increases with respect to the electric field generated by the reverse voltage.

Referring to FIG. 3G, after applying the fifth photoresist and patterning the fifth photoresist exposing the semiconductor substrate on which the buried impurity region 114 is to be formed in the body region 106, impurity wool ions of the first conductivity type Injecting to form a buried impurity layer (114).

Thereafter, after applying the sixth photoresist and patterning the sixth photoresist exposing the semiconductor substrate on which the source region 116 and the drain region 118 are to be formed, the source region is ion implanted by implanting impurities of the second conductivity type. 116 and the drain region 118 are formed.

Referring to FIG. 3H, a source contact hole exposing the source region 116, the drain region 118, and the plate electrode 120 by depositing a second insulating layer, for example, a boron silicate glass (BPSG film), and etching the photoresist on the entire surface of the resultant product. The drain contact hole and the plate electrode hole are formed.

Thereafter, a metal layer is deposited on the entire surface, and then patterned to fill the source contact hole, while filling the source electrode 126 and the drain contact hole while filling the source contact hole, while filling the drain region 118 and the plate electrode hole. A drain electrode 128 is formed in contact with the plate electrode 120 at the same time.

The subsequent process proceeds in the same manner as in the manufacturing process of a conventional MOSFET.

When the reverse voltage is applied to the horizontal diffusion MOS transistor formed as described above, the space charge is applied in the vertical length (W₁ ', W₃') direction and the width length (W₂ ') direction of both sides of the trench t in contact with the drift region 104. An area is formed. When the reverse voltage is increased and the breakdown voltage is applied, the electric field generated by the breakdown voltage is interrupted due to the presence of the trench t and is bypassed. Since the bypassed electric field is handled in the total space charge region (W₁ '+ W₂' + W₃ '), the pressure resistance to the electric field is improved.

According to the horizontal diffusion MOS transistor of the present invention, by securing a space charge region in the vertical length direction of both sides of the trench, the breakdown voltage is increased with respect to the electric field generated by the reverse voltage, in particular the breakdown voltage, and the device area can be reduced. have.

Claims (11)

Drift regions of the second conductivity type formed on the first conductivity type semiconductor substrate and spaced apart from each other; A drain region of a second conductivity type formed near one surface of the drift region; A body region of a first conductivity type formed in the substrate between the drift regions; A source region of a second conductivity type formed near one surface of the body region; A gate formed on the body region between the drain region and the source region via a gate insulating film; And And a trench formed in the drift region between the drain region and the source region and filled with an insulating material therein. The method of claim 1, wherein the insulating material Polycrystalline silicon via an oxide film on the inner wall of the trench, Insulating fluids such as oxides doped with impurities such as BPSG, PSG, BSG, or oxides doped with impurities such as HTO, LTO, or O ₃ -tetra ethyl ortho-silicate (TEOS) films. Horizontal diffusion MOS transistor, characterized in that the USG (Undoped Silicate Glass), HDP (High Density Plasma) oxide film or SOG (Spin On Glass). According to claim 1, And a buried impurity layer of a first conductivity type forming a junction with the source region in the body region below the source region. According to claim 1, And a field oxide film on the drift region between the drain region and the body region. According to claim 1, A plate electrode on the field oxide film around the drain region; And a source electrode connected to the source region. The method of claim 5, And the plate electrode is connected in common to a drain electrode connected to the drain region. Forming drift regions of the second conductive type spaced apart from each other on the first conductive semiconductor substrate, and a body region of the first conductive type therebetween; Forming a pair of trenches spaced at regular intervals in the drift region with a drain region to be formed later; Filling the inside of the trench with an insulating material; Forming a field oxide film in a region other than the body region and a drain region to be formed later; Forming a gate after forming a gate insulating film on the body region adjacent to the drift region; Forming a source region of a second conductivity type in a body region not overlapping with the gate, and forming a drain region of a second conductivity type in the drift region. Manufacturing method. 8. The method of claim 7, wherein the filling of the trench with the insulating material After the oxide film is formed on the inner wall of the trench or deposited with polysilicon, Flowable insulators such as oxides doped with impurities such as BPSG, PSG, BSG, oxides doped with impurities such as HTO, LTO, and O ₃ -tetra ethyl ortho silicate A method of manufacturing a horizontal diffusion MOS transistor, characterized in that the trench is buried by deposition using USG (Undoped Silicate Glass), HDP (High Density Plasma) oxide film or SOG (Spin On Glass). The method of claim 7, wherein And forming a plate electrode on the field oxide film around the drain region during the process of forming the gate. The method of claim 7, wherein And forming a buried impurity layer of a first conductivity type in junction with said source region in said body region below said source region before said step of forming said source region. The method of claim 7, wherein A drain electrode connected to the drain region and the plate electrode in common after the source region and the drain region are formed; And forming a source electrode connected to said source region.