KR20000034614A - Noise suppression circuit - Google Patents

Abstract

The present invention relates to a noise suppression circuit that adjusts a squelch level of input data so that a signal having a small level can be detected in a data section so that erroneous data is not input. A fourth output by an external signal by inputting first and second resistor drivers respectively outputting different first, second and third output signals, and second and third output signals of the first resistor driver respectively; A first selector for outputting a signal, a second selector for outputting a fifth output signal by an external signal by inputting second and third output signals of the second resistor driver, respectively, and the second selector A first comparison unit configured to receive a fifth output signal and a first output signal of the first resistor driver unit as inputs, and to output a sixth output signal; a fourth output signal and a second resistor of the first selection unit; A second comparator configured to receive the first output signal of the driver unit as an input and output a seventh output signal, and output the final output signal by receiving the sixth and seventh output signals of the first and second comparators; And a first buffer unit and a second buffer unit.

Description

Noise suppression circuit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a noise suppression circuit, and more particularly to a noise suppression circuit suitable for detecting a signal having a small level in a data section by adjusting a squelch level of input data.

Generally, the noise suppression circuit is used to cancel the large noise generated when there is no input in the frequency modulation receiver. By amplifying the high frequency part of the noise component of the output of the frequency discriminator, it detects it and opens and closes the gate circuit. Many disconnect the voice amplifier.

Hereinafter, a conventional noise suppression circuit will be described with reference to the accompanying drawings.

1 is a circuit diagram showing a conventional noise suppression circuit.

As shown in FIG. 1, the resistors R, R ₁ , and R connected in series between a power supply terminal V _DD and a ground terminal Vss with the differential input signals RX + and RX− passed through a transformer 10. ₂ ) first and second resistor driver parts 11 and 12 for outputting different DC values V _{RX +} , V _RX- and V _{RX + sq} and V _RX-sq respectively, and the first and second resistors. By comparing the output signals V _{RX +} and V _{RX-sq of the} driver units 11 and 12 and comparing the first comparator 13 outputting V _{RX + 0} and V _RX- and V _{RX + sq} , The second comparator 14 outputs _RX-0 and the output signals V _{RX + 0} and V _{RX-0 of} the first and second comparators 13 and 14 as final inputs. The first and second buffer units 15 and 16 output signals RXO + and RXO-, respectively.

Meanwhile, the resistors R, R ₁ , and R ₂ constituting the first and second resistor drivers 11 and 12 are R = R ₁ + R ₂ , and R _{1 <} R ₂ .

The operation of the conventional noise suppression circuit configured as described above is as follows.

2 and 3A and 3B are timing diagrams showing the operation of the conventional noise suppression circuit.

That is, FIG. 1 is a profile showing a change in voltages with time when R = 7.5K, R = 1K, and R = 6.5K.

First, as shown in FIG. 2, the receive data RX + and RX− that have passed through the transformer are first and second resistor drivers 11 and 12. With V _{RX +} , V _RX- and Output V _{RX + sq} and V _RX-sq with DC.

3A, V _{RX +} and V _RX-sq of the output signals of the first and second resistance driver parts 11 and 12 are V _{RX + s} by the first comparator 13 and V _{RX. If it} is larger than _-sq , RXO + is "Low". If V _{RX +} is smaller than V _RX-sq , "High" is output.

Meanwhile, as shown in FIG. 3B, the second comparator 14 also operates in the same manner as the first comparator 13 through V _RX− and V _{RX + sq} .

In addition, V _{RX +} and V _RX- are always higher than V _{RX + sq} and V _RX-sq . In this case, the final output signals RXO + and RXO- always have a value of "Low" (idle state). ).

The condition occurs when having a voltage level greater than the DC difference and V _{RX +} and the differential voltage level of V _RX- the V _{RX +,} a V _RX- DC and V _{RX + sq,} V _RX-sq if there is no input .

That is, if the differential level of V _{RX +} and V _RX- is greater than the difference (squelch level) of DC, data is regarded as data transfer. If the differential voltage is less than the squelch level, noise is considered as the final output signal. Will remain at "Low".

However, in the conventional noise suppression circuit as described above, there are the following problems.

In other words, if the input differential voltage level is smaller than the squelch level in the data section, the receive enable signal is disabled because the input is considered noise and the output is idle ("Low" = 0). The next input above the squelch level is actually the packet's data, which is recognized as a start packet and will receive incorrect data until the start of the next packet.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and provides a noise suppression circuit that adjusts the squelch level of input data so that even a small level signal can be detected in the data section so that incorrect data is not input. The purpose is.

1 is a circuit diagram showing a conventional noise suppression circuit

2 and 3a and 3b is a timing diagram showing the operation of the conventional noise suppression circuit

4 is a circuit diagram showing a noise suppression circuit according to the present invention.

5 to 6 is an operation timing diagram showing the operation of the noise suppression circuit according to the present invention

FIG. 7 is an output timing diagram for the selector of FIG. 4. FIG.

Explanation of symbols for main parts of the drawings

20 transformer 21 first resistor driver

22: second resistor driver 23: first selector

24: second selection unit 25: first comparison unit

26: second comparison unit 27: first buffer unit

28: second buffer unit

The noise suppression circuit according to the present invention for achieving the above object comprises a first and second resistor driver for receiving the first and second input signals and outputting different first, second and third output signals, respectively; A first selector configured to output a fourth output signal by an external signal by inputting the second and third output signals of the first resistor driver; and a second and third output signal of the second resistor driver; A second selector for outputting a fifth output signal by an external signal as an input and a fifth output signal of the second selector and a first output signal of the first resistor driver, respectively, are compared with each other. A first comparator for outputting a signal; a second comparator for receiving a fourth output signal of the first selector and a first output signal of the second resistor driver; 1st, 2nd ratio A sixth, a seventh output signal of the receiving features a configured including a first, a second buffer unit for each output the final output signal.

Hereinafter, the noise suppression circuit according to the present invention will be described in detail with reference to the accompanying drawings.

4 is a circuit diagram showing a noise suppression circuit according to the present invention.

As shown in FIG. 4, the resistors R, R ₄ , R ₅ , and R connected in series between the power supply terminal V _DD and the ground terminal Vss are connected to the differential input signals RX + and RX- through the transformer 20. ₆ ) and the first and second resistor driver sections 21 and 22 that output different DC values V _{RX +} , V _RX- and V ' _{RX +} , V' _RX- and V " _{RX +} , V" _RX- respectively. A first selector 23 for outputting V _{RX + sq} by an external signal (en signal) by inputting V ′ _{RX +} and V ″ _{RX +} of the first resistor driver 21, respectively, and the second A second selector 24 which outputs V _{RX -sq} by an external signal by inputting V ' _RX- and V " _RX- of the resistance driver section 22, respectively; A first comparator 25 for receiving an output signal and an output signal V _{RX +} of the first resistor driver 21 and comparing them as inputs, and outputting the output signal and the second resistor driver of the first selector 23; Outputs the output signals of the unit 22 as input and compares them Is the first and second buffer units receiving the output signals of the second comparing unit 26 and the first and second comparing units 25 and 26 and outputting the final output signals RXO + and RXO-, respectively. 27) 28.

Here, the first and second selectors 23 and 24 are each configured by two transmission gates connected in series, and an external signal is commonly applied to a gate between the two transmission gates connected in series. Signals whose external signals are inverted by the inverter 29 are applied to the other gates, respectively.

On the other hand, a first, a second resistor driver 21 resistance R ₆ to configure _{(22) »R 4, R} 6 _{and» R 5, R 4 + R} 5 = R 1 ( a conventional resistor).

The operation of the noise suppression circuit according to the present invention configured as described above is as follows.

5 to 6 are operation timing diagrams showing the operation of the noise suppression circuit according to the present invention.

That is, FIG. 4 is a profile showing voltages according to time when R = 7.5K, R ₄ = 0.5K, R ₅ = 0.5K, and R ₆ = 6.5K.

First, as shown in FIG. 5, the data of RX + and RX- of an AC component that has passed through the transformer 20 is supplied to V _{RX +} , which has three DCs by the first and second resistor drivers 21 and 22, respectively. Outputs V _RX- and V ' _{RX +} , V' _RX- and V " _{RX +} , V" _RX- .

Subsequently, as shown in FIG. 6, V _{RX +} , V _RX- and V ' _{RX +} , V' _RX- and V ″ _{RX +} and V ″ _RX− output from the first and second resistor drivers 21 and 22. Is input to the first and second selectors 23 and 24, selects V _{RX +} ', V _RX- ' by the external signal (= Low) at the start of the packet, and is enabled by the inverter 29. (en = high) V _{RX +} ", V _RX- " is selected.

7 is an output timing diagram for the selector of FIG. 4.

As shown in FIG. 7, V _{RX + sq} and V _RX-sq selected by the first and second selection units 23 and 24 and V of the first and second resistance driver units 21 and 22. _{RX +,} V _RX- the first and second comparing unit _{(25) (26) V RX} +, V RX- the V _{RX + sq,} V _RX-sq is greater than the final output signal (RXO +, RXO-) by the " High ", on the contrary, when V _{RX +} and V _RX- are smaller than V _{RX + sq} and V _RX-sq , RXO + and RXO- become" Low ".

Where R ₄ and R ₅ are variable resistors that can be adjusted according to the squelch level.

That is, in the idle state (no data state), the data of the input differential voltage level is detected by the existing squelch level, and when the receive is enabled, the differential voltage level is checked by the smaller squelch level. To detect the data.

Meanwhile, although not shown in the drawing, in another embodiment of the present invention, a circuit may be configured to have a plurality of squelch levels by connecting a plurality of resistors in series between a power supply terminal and a ground terminal.

As described above, the noise suppression circuit according to the present invention has the following effects.

In other words, when idle, the input differential voltage level is detected by the existing squelch level, and when the receive is enabled, the data is detected by the differential voltage level of the data by the lower squelch level. The loss can be prevented.

Claims (5)

First and second resistor driver units receiving first and second input signals and outputting different first, second and third output signals, respectively; A first selector configured to input second and third output signals of the first resistor driver, respectively, and output a fourth output signal by an external signal; A second selector which outputs a fifth output signal by an external signal by inputting the second and third output signals of the second resistor driver; A first comparator configured to receive the fifth output signal of the second selector and the first output signal of the first resistor driver, respectively, and output the sixth output signal by comparing them; A second comparator configured to receive a fourth output signal of the first selector and a first output signal of the second resistor driver, respectively, and output the seventh output signal by comparing the input signals; And a first and a second buffer unit configured to receive the sixth and seventh output signals of the first and second comparators and output a final output signal, respectively. The method of claim 1, wherein the first and second resistor drivers comprise first, second, third, and fourth resistors connected in series between a power supply terminal and a ground terminal to connect differential first and second input signals through a transformer. A noise suppression circuit for outputting output signals that are different DC values. The method of claim 1, wherein the first and second selectors are configured by connecting two transmission gates in series, respectively, and an external signal is commonly applied to a gate between the two transmission gates connected in series, and the other gate. The noise suppression circuit is characterized in that the external signal is applied to the signal inverted by the inverter, respectively. The noise suppression circuit according to claim 1, wherein the external signal applied to said first and second selection units is a "Low" signal. 3. The noise suppression circuit according to claim 2, wherein the second and third resistors are variable resistors which can vary according to the squelch level.