KR20000027298A - Circuit and method for sector protection in flash memory cell - Google Patents

Abstract

PURPOSE: A circuit and method for sector protection in a flash memory cell is provided to prevent a device fail because a sector protection is not performed. CONSTITUTION: A decoder circuit(1) receives first and second addresses inputted from the outside and outputs the first to the fourth sector addresses. First to forth sector circuits(2,..,5) receives first to fourth sector addresses outputted from the decoder circuit(1) and outputs first to fourth sector protection recovery signals. A detecting unit(6) receives first to fourth sector protection recovery signals outputted from first to forth sector circuits(2,..,5) and identifies whether a sector protection recovery is performed. First to forth sector circuits(2,..,5) perform an operation of the sector protection repair when occurring a fail of the sector protection.

Description

Sector Protection Repair Circuit and Repair Method of Flash Memory Cell

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sector protection repair circuit and a method of a flash memory cell. In particular, the sector protection repair of a flash memory cell enables sector protection for a sector of a device that is not processed due to sector protection. It relates to a circuit and a method.

1 is a flowchart illustrating a conventional sector protection method.

According to the sector protection command from the start signal, it is checked whether or not the sector protection for the selected sector is performed (12).

If the sector is not normally protected as a result of the check in step 12, it is checked whether the number of the last counter loops for sector protection is 13.

If the result of the check in the step 13 is the final counter looping count, it is notified that the cell is bad (15), and if it is not the last counter looping count, the counter looping count is increased (14) and the sector protection operation is performed according to the sector protection command. The operation returns to step 11 to repeat the operation.

However, if the sector is normally protected in the step 12, the process proceeds to step 16 to inform that the sector is normally protected and ends.

That is, when the protection of the selected sector is performed, the protection operation is performed according to an algorithm. When the selected sector is read and the protection is not performed, the protection is not performed after performing the protection operation a certain number of times (PULSE COUNT). If not, fail processing, and if protected, pass processing.

However, the conventional sector protection technology has a disadvantage in that the device itself cannot be used because there is no method for repairing when a sector protection failure occurs.

Accordingly, an object of the present invention is to provide a sector protection repair circuit and a method of a flash memory cell that can overcome the above-mentioned disadvantages by enabling sector protection for a sector of a device that is not treated as sector protection. There is this.

In order to achieve the above object, a sector protection repair circuit of a flash memory cell according to the present invention includes a decoder circuit for selecting a corresponding sector according to an input of an address, a sector protection according to an output of the decoder circuit, and a repair signal. And a plurality of sector protection circuits for performing sector protection repair and detection means for detecting whether the plurality of sector protection circuits are repaired.

According to an embodiment of the present invention, a sector protection repair method of a flash memory cell may include verifying whether a selected sector is protected, terminate after notifying that a sector is normal according to the verification result, or terminate according to a sector protection repair command. Checking whether the sector protection repair is normally performed after performing the sector protection repair; and if the sector protection repair is abnormally performed as a result of the checking, checking whether the number of the last counter loops for the sector protection repair is correct; After notifying that the sector is bad according to the result of the check, the terminal returns to the step of checking the protection state of the selected sector after increasing the number of counter looping, and repeating the process, and in the step of checking the repair of the sector normally If the word, including the terminating After notifying that the protection sector repair is normally characterized by comprising.

1 is a flowchart illustrating a conventional sector protection method.

2 is a block diagram of a sector protection repair circuit in accordance with the present invention.

3 is a detailed circuit diagram of the decoder circuit of FIG.

4 is a detailed circuit diagram of the sector protection circuit of FIG.

5 is a flowchart illustrating a sector protection repair method according to the present invention.

<Explanation of symbols for the main parts of the drawings>

1: Decoder Circuit 2 to 5: Sector Protection Circuit

6: detection means 7: NAND gate

8: switching means

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

2 is a block diagram of a sector protection repair circuit according to the present invention.

The first and second addresses A <0: 1> input from the outside are supplied to the decoder circuit 1. The first to fourth sector addresses DEC <0: 3> output from the decoder circuit 1 are supplied to the first to fourth sector protection circuits 2 to 5. Whether the sector protection is repaired is determined by the first to fourth sector protection repair signals PROTECT <0: 3> output from the first to fourth sector protection circuits 2 to 5.

Further, the first to fourth sector protection repair signals PT <0: 3> output from the first to fourth sector protection circuits 2 to 5 are supplied to the detection means 6. The detection means 6 can confirm whether or not the sector protection is to be repaired. That is, the first to fourth sector protection repair confirmation signals PT <0: 3> are supplied to the NAND gate 7 of the detection means 6. The output of the NAND gate 7 is an output terminal through the NMOS and PMOS transistors N10 and P10 of the switching means 8 which respectively receive the repair confirmation signal REPAIR VERIFY and the inverted repair confirmation signal REPAIR VERIFYb. Output is (DQ0).

That is, the present invention performs the sector protection repair operation in each of the sector protection circuits 2 to 5 when a sector protection failure occurs. When the sector protection repair confirmation signal PT <0: 3> outputted through the output terminal DQ0 becomes high, it indicates that the sector protection repair has been performed, and when it becomes low, the sector protection repair is not performed. It did not show.

3 is a detailed circuit diagram of the decoder circuit of FIG. 2.

The first through fourth NAND gates ND1 through ND4 receive the sector address A <0: 1> and the inverted sector address Ab <0: 1>, respectively. The fifth to eighth NAND gates ND5 to ND8 receive the outputs of the first to fourth NAND gates ND1 to ND4 and the first control signal PGMERb, respectively, to input the first to fourth sector addresses DEC. <0: 3>).

The first control signal PGMERb allows a protected sector to be read in a protected state without being programmed or erased during a program or erase operation. For example, when performing a sector protection operation, the first control signal PGMERb is set to a high state, and the first control signal PGMERb is turned to the sector address A <0: 1> and the inverted sector address Ab <0: 1>. The sector address selected is output in the high state. When the erasing operation is performed, the first control signal PGMERb is set to a low state, and data in which all the sector protection circuits are read and protected is stored as is, and sectors that are not protected are protected. An erase operation is performed.

4 is a detailed circuit diagram of the sector protection circuit of FIG. 2.

The latch circuit 11 is cross latched by the first and second fuse cells 12 and 13 which take the first and second PMOS transistors P1 and P2 and the program bias voltage REDCGHV as inputs, respectively. And have first and second output nodes K1 and K2.

First and second NMOS transistors N1 and N2 are connected in series between the first output node K1 and the ground terminal Vss of the latch circuit 11. The output voltage of the first detection means 19 for inputting the sector address DEC and the repair signal REPAIR of the selected sector supplied from the decoder circuit to the gate input terminal of the first NMOS transistor N1 is first. It is supplied via inverter I1. The sector address DEC is supplied to the gate input terminal of the second NMOS transistor N2 through the second inverter I2. The first detecting means 19 is composed of two input NAND gates.

The third and fourth NMOS transistors N3 and N4 are connected in series between the second output node K2 and the ground terminal Vss of the latch circuit 11. An output voltage of the first detection means 19 that inputs the sector address DEC and the repair signal REPAIR to the gate input terminal of the third NMOS transistor N3 through the first inverter I1. Supplied. The sector address DEC is supplied to the gate input terminal of the fourth NMOS transistor N4.

Further, the first and second transfer gate means 14 and 15 selectively select the sector address DEC according to the voltages of the first and second output nodes K1 and K2 which are outputs of the latch circuit 11. Will print. The sector address DEC supplied through the first and second transfer gate means 14 and 15 is supplied to the select gate electrodes of the first and second protection cells 16 and 17, and the program gate electrode. The program bias voltage PROTCG, the power supply voltage Vcc to the drain electrode, and the ground voltage Vss are respectively supplied to the source electrode.

The sense amplifier 18 is connected to the source electrodes of the first and second protection cells 16 and 17, and it is possible to know whether the sector is protected according to the output signal PROTECT of the sense amplifier 18.

The second detection means 20 is a protection repair capable of confirming whether a protection is repaired according to a repair confirmation signal REPAIR VERIFY and a sector address DEC supplied through the first and second transfer gate means 14 and 15. The confirmation signal PT is output. The second detecting means 20 is composed of two input NAND gates.

The operation of the sector protection circuit of the present invention configured as described above is as follows.

The first and second fuse cells 12 and 13 of the latch circuit 11 are constituted by electrically programmable flash memory elements, and each of the fuse cells 12 and 13 is a cell that is initially erased by ultraviolet light. UV Erase or erased cells maintain the voltages of the first and second output nodes K1 and K2 of the latch circuit at low and high voltages.

That is, the program bias voltage (REDCGHV) supplied to the program gate terminals of the first and second fuse cells 12 and 13 of the latch circuit 11 in the initial state is a high state (12 to 14V), the repair signal ( REPAIR is in the low state, the repair confirmation signal REPAIR VERIFY is in the low state, and the sector address DEC, which is an output of the decoder circuit, is high (5V). Since 12) has one cell and the second fuse cell 13 has two cells, the current flowing through the second fuse cell 13 is twice the current flowing through the first fuse cell 12. Accordingly, the potential of the second output node K2 of the latch circuit 11 through which a large amount of current flows is in the low state (0 V), and the potential of the first output node K1 is in the high state Vcc.

At this time, the output of the first detection means 19 which inputs the sector address DEC and the repair signal REPAIR respectively becomes a high state. In addition, both the first and second NMOS transistors N1 and N2 connected between the first output node K1 and the ground terminal Vss are turned off. In addition, the third NMOS transistor N3 connected between the second output node K2 and the ground terminal Vss is turned off, and the fourth NMOS transistor N4 is turned on. Therefore, the potential of the second output node K2 of the latch circuit 11 maintains the low state (0 V) and the potential of the first output node K1 maintains the high state Vcc.

On the other hand, the NMOS and PMOS transistors N5 and P3 of the first transfer gate means 14, which input voltages of the first and second output nodes K1 and K2 of the latch circuit 11, are turned on. NMOS and PMOS transistors N6 and P4 of the second transfer gate means 5 are turned off.

In this case, the sector address DEC supplied through the first transfer gate means 14 is supplied to the select gate electrode of the first protection cell 16. In this case, the program bias voltage PROTCG of 12 to 14V is supplied to the program gate electrodes of the first and second protection cells 16 and 17, the power supply voltage Vcc is supplied to the drain electrode, and the source electrode is grounded. The voltages Vss are respectively supplied. In this case, it is possible to know whether the sector is protected according to a result of sensing the first protection cell 16 through the sense amplifier 18 connected to the source electrodes of the first and second protection cells 16.

That is, when the output signal PROTECT of the sense amplifier 18 is high, the sector is protected, and when the output signal PROTECT is high, it is not protected.

In addition, the sector according to the output PT of the second detection means 20 which inputs the sector address DEC and the repair confirmation signal REPAIR VERIFY supplied through the first transfer gate means 14, respectively. You can check whether the protection is repaired.

Meanwhile, when the sector is not protected, the first and second fuse cells 12 and 13 are programmed by supplying both the sector address DEC and the repair signal REPAIR of the selected sector in a high state. At this time, the first and second fuse cells 12 and 13 of the latch circuit 11 are programmed (PGM). That is, the first NMOS transistor N1 connected between the first output node K1 and the ground terminal Vss is turned on and the second NMOS transistor N2 is turned off. In addition, all of the third and fourth NMOS transistors N3 and N4 connected between the second output node K2 and the ground terminal Vss are turned on.

Subsequently, when the protection repair operation is performed on the sector, the sector address DEC is in a high state, the repair signal REPAIR is in a low state, and the repair confirmation signal REPAIR VERIFY is in a high state.

Therefore, since the first fuse cell 12 of the latch circuit 11 has one cell, and the second fuse cell 13 has two cells, the second output node K2 of the latch circuit 11 is included. The potential of is in a high state and the potential of the first output node K1 is in a low state. At this time, the output of the first detection means 19 which inputs the sector address DEC and the repair signal REPAIR respectively becomes a high state again. Therefore, both the first and second NMOS transistors N1 and N2 connected between the first output node K1 and the ground terminal Vss are turned off. In addition, the third NMOS transistor N3 connected between the second output node K2 and the ground terminal Vss is turned off, and the fourth NMOS transistor N4 is turned on. Therefore, the potential of the second output node K2 of the latch circuit 11 is kept high and the potential of the first output node K1 is kept low.

On the other hand, the NMOS and PMOS transistors N5 and P3 of the first transfer gate means 14, which input the voltages of the first and second output nodes K1 and K2 of the latch circuit 11, are turned off. The NMOS and PMOS transistors N6 and P4 of the second transfer gate means 5 are turned on.

Therefore, the sector address DEC supplied through the second transfer gate means 15 is supplied to the select gate electrode of the second protection cell 17. In this case, the program bias voltage PROTCG of 12 to 14V is supplied to the program gate electrodes of the first and second protection cells 16 and 17, the power supply voltage Vcc is supplied to the drain electrode, and the source electrode is grounded. The voltages Vss are respectively supplied. At this time, the sensing unit 18 connected to the source electrodes of the first and second protection cells 16 and 17 may detect whether the sector is protected according to a result of sensing the second protection cell 17. do.

That is, when the output signal PROTECT of the sense amplifier 18 is high, the sector is protected, and when the output signal PROTECT is high, it is not protected.

In addition, the sector according to the output PT of the second detection means 20 which inputs the sector address DEC and the repair confirmation signal REPAIR VERIFY supplied through the second transfer gate means 15, respectively. You can check whether the protection is repaired.

5 is a flowchart illustrating a sector protection repair method according to the present invention.

From the start signal, it is checked whether the sector selected in step 101 is protected. As a result of the check, if the sector is protected, the process proceeds to step 108, informing that the sector is normal, and ending. If the sector is not protected, the process proceeds to step 102. In step 102, after performing the sector protection repair operation according to the sector protection repair command, the process proceeds to step 103 to confirm whether the sector protection repair is normally performed. If the sector protection repair has not been normally performed as a result of the check, the process proceeds to step 104 where it is checked whether the number of the last counter loops for the sector protection repair is correct.

If the check result is the final counter looping number, the process proceeds to step 106 informing that the sector is bad and ends. If the counter count is not the last counter looping, the process proceeds to step 105 to increase the number of counter looping and confirms the protection state of the selected sector. Returning to step 101, the operation is repeated.

However, when the sector protection repair is normal in step 103, the process proceeds to step 107 to notify that the sector protection repair is normal and ends.

As described above, according to the present invention, a sector protection can be repaired for a sector of a device that is not processed due to sector protection, thereby preventing device failure by using a sector protection repair circuit when a sector protection failure occurs. That has an excellent effect.

Claims (8)

A decoder circuit for selecting a corresponding sector according to the address input; A plurality of sector protection circuits which perform sector protection according to the output of the decoder circuit and perform sector protection repair according to a repair signal; And detection means for detecting whether or not the plurality of sector protection circuits have been repaired. The method of claim 1, The decoder circuit includes first to fourth NAND gates that respectively receive an address and an inverted address; And fifth to eighth NAND gates each of which receives a first control signal corresponding to an output of the first to fourth NAND gates. The method of claim 1, Each of the sector protection circuits includes a latch circuit having a first and second output nodes and having a cross latch structure formed by the first and second PMOS transistors and the first and second fuse cells; First detection means for inputting a sector address and a repair signal supplied from the decoder circuit, respectively; First and second NMOS transistors connected in series between a first output node and a ground terminal of the latch circuit, and respectively inputting the output of the detection means via a first inverter and the sector address via a second inverter; , Third and fourth NMOS transistors connected in series between a second output node of the latch circuit and a ground terminal, the third and fourth NMOS transistors each having an output of the detection means via the first inverter and the sector address; First and second transfer gate means for selectively outputting the sector address in accordance with voltages of the first and second output nodes of the latch circuit; First and second protection cells having a select gate, a program gate, a drain, and a source electrode, wherein the sector address supplied through the first and second transfer gate means is supplied to the select gate terminal, respectively; A sense amplifier connected to the source electrodes of the first and second protection cells and configured to check whether the first and second protection cells are protected; And second detection means for detecting whether or not a protection is repaired according to a sector address and a repair confirmation signal supplied through the first and second transmission gate means. The method of claim 3, wherein And said first detecting means comprises two input NAND gates. The method of claim 3, wherein And said second detecting means comprises two input NAND gates. The method of claim 1, The detecting means includes a NAND gate for detecting whether a repair is performed by using a plurality of repair signals output from the plurality of protection circuits as inputs, respectively; And switching means for outputting a repair signal detected by the NAND gate to an output terminal. The method of claim 6, And said switching means comprises an NMOS and a PMOS transistor for inputting a repair confirmation signal and an inverted repair confirmation signal, respectively. Checking whether the selected sector is protected; Confirming that the sector protection repair is normally performed after notifying that the sector is normal according to the check result and ending or performing the sector protection repair according to the sector protection repair command; If the sector protection repair is abnormally performed as a result of the checking, confirming whether a final counter looping count is required for the sector protection repair; Repeating the process by notifying that the sector is bad according to the check result and ending or increasing the counter looping number and then checking the protection state of the selected sector; And when the repair is normally performed in the sector protection repair checking step, notifying that the sector protection repair has been normally performed, and terminating the sector protection repair.