KR20000026908A - Method for manufacturing electrostatic discharge suppression circuit of semiconductor device - Google Patents

Abstract

PURPOSE: A method of manufacturing electrostatic suppression circuit is provided to make the circuit have the immunity to electrostatic discharge even with a simple structure by manufacturing the circuit to disperse the electricity received through lower junction. CONSTITUTION: A system comprises a substrate(10), an element isolation layer(20), a well(30), a first junction(40), a second junction(42), an insulating layer(50), a contact(60), and a pad(70). The insulating layer(50) is formed on the upper part of the junction(40) and form a plurality of contacts(60) to connect between the junction and the pad(70). A method comprises a step of forming the element isolation layer for segregating the element on the substrate; a step of forming the well by injecting ion between the element isolation layer where the pad is formed; a step of forming the junction by injecting the ion through the sensitive layer pattern; and a step of forming the insulating layer on the entire substrate.

Description

Method of manufacturing antistatic circuit for semiconductor device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an antistatic circuit of a semiconductor device, and more particularly, to form a section having a low breakdown voltage at a lower portion of a pad, so that when static electricity flows, static electricity is introduced into the static electricity by dispersing the static charge introduced through the section. The present invention relates to a method for manufacturing an antistatic circuit of a semiconductor device.

In recent years, as semiconductor devices become finer and more integrated, they are easily damaged by electrostatic discharge (ESD) on minute wires. This means that if the static electricity of about -2,000V generated by humans or about -250V generated by the machine is introduced, the semiconductor device will be damaged if the static electricity introduced through the micro wiring is not discharged quickly. .

In general, a large number of pads are required for a logic chip, and thus, the size of the static electricity protection circuit is limited and usually has a pad-limited design. Therefore, for this reason, the structure of the electrostatic circuit in the logic chip is usually configured in the form of an active transistor using a polygate or an element isolation film.

However, when the transistor is formed of a transistor, there is a problem in that the size becomes large and the efficiency decreases. In the case of blocking with the device isolation film, the device isolation film is destroyed when it exceeds a predetermined value.

The present invention has been made to solve the above problems, an object of the present invention is to form a section with a low breakdown voltage with the bottom of the pad to effectively disperse the static charge initially introduced during the inflow of static electricity The present invention relates to a method for manufacturing an antistatic circuit of a semiconductor device.

1 to 3 are cross-sectional views illustrating a method for manufacturing an antistatic circuit of a semiconductor device according to the present invention.

4 to 6 are cross-sectional views illustrating a method for manufacturing an antistatic circuit of a semiconductor device according to another embodiment of the present invention.

-Explanation of symbols for the main parts of the drawings-

10 substrate 20 device isolation film

30: well 40: first cushion

41: first section 42: second section

50: insulating film 60: contact

70: pad

The present invention provides a device isolation layer for isolation between devices on a substrate, forming a well by implanting ions between the device isolation films, which are areas where pads are to be formed, and device isolation films. Implanting high concentration ions through the photoresist pattern on the entire surface to form a section; forming a section after forming the section; forming a plurality of contacts to be connected to the section; and applying a conductive layer on the contact. And then forming a pad.

In another method, forming a device isolation film for isolation between devices on a substrate, implanting ions between device isolation films, which are areas where pads are to be formed, to form wells, and high concentration ions through photoresist patterns on the wells. Forming a first section by implanting the first junction; and implanting a high concentration of ions through a photosensitive film pattern in a region where the first section is not formed between the device isolation layers. Forming an insulating film on the upper surfaces of the first and second cushions, forming a plurality of contacts to be connected to the first cushion, and applying a conductive layer on the contacts and then forming a pad.

The present invention made as described above has a breakdown voltage below the pad that is not used to form a section lower than the normal operating voltage, when static electricity is introduced, the charge voltage can be dispersed through the section having a low breakdown voltage, thereby making it resistant to static electricity. .

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings. In addition, this embodiment is not intended to limit the scope of the present invention, but is presented by way of example only.

1 to 3 are cross-sectional views sequentially illustrating a method of manufacturing an antistatic circuit of a semiconductor device according to a first embodiment of the present invention.

As shown in FIG. 1, a device isolation film 20 for isolation between devices is formed in an oxygen atmosphere on a semiconductor substrate 10. Then, the well 30 is formed by implanting ions of a type opposite to the substrate below the region where the pad 70 is to be formed using the photoresist pattern.

At this time, the size of the well 30 is smaller than the size of the cushion 40 to be formed later.

As shown in FIG. 2, the junction 40 is formed by implanting a high concentration of ions of the same type as the wells 30 between the device isolation layers 20 using the photoresist pattern on the resultant of FIG. 1.

As shown in FIG. 3, an insulating film 50 is formed on the junction 40, and a plurality of contacts 60 are formed to connect the pad 70 and the junction 40 to be formed later. The pad 70 is formed by applying and pattern etching.

4 to 6 are cross-sectional views illustrating a method for manufacturing an antistatic circuit of a semiconductor device according to a second embodiment of the present invention.

As shown in FIG. 4, an isolation layer 20 for isolation between devices is formed on the semiconductor substrate 10 in an oxygen atmosphere. Subsequently, the well 30 is formed by implanting ions of a type opposite to the substrate 10 below the region where the pad 70 is to be formed using the photoresist pattern.

As shown in FIG. 5, the first isolation 41 is formed by injecting ions of a type opposite to the ions injected into the well 30 using a photoresist pattern on the well 30 at a high concentration, and the device isolation film 20. Portions where the first cushion 41 is not formed in between are implanted at a high concentration with ions implanted into the first cushion 41 using a photosensitive film pattern to form a second cushion 42.

As shown in FIG. 6, an insulating film 50 is formed on the cushion 40 and a plurality of contacts 60 are formed to connect the pad 70 and the first cushion 41 to be formed later. Next, a metal layer is coated and pattern etched to form a pad 70.

In this case, the plurality of contacts 60 are formed to connect only the pad 70 and the first cushion 41.

Therefore, the opposite types of junctions formed by the high concentration of ion implantation under the pad 70 have a breakdown voltage lower than the normal operating voltage, so that the breakdown voltage before the static electricity flowing through the pad 70 is transferred to the peripheral circuit. The low section will dissipate the incoming charge to the substrate.

As described above, the present invention forms a section of opposite types formed by high concentration of ion implantation at the bottom of the pad to have a breakdown voltage lower than the normal operating voltage so that the static electricity flowing through the pad has a high breakdown voltage at the beginning of the inflow. It is manufactured to dissipate the charge introduced through the section with low breakdown voltage before being delivered to the circuit, making it simple to resist static electricity.

Claims (9)

Forming a device isolation film for isolation between devices on a substrate; Forming wells by implanting ions between the device isolation layers, which are regions where pads are to be formed; Forming a cushion by implanting high concentration ions into the entire surface between the device isolation layers through a photoresist pattern; Forming an insulating film on a front surface of the junction and forming a plurality of contacts to be connected to the junction; Forming a pad after applying a conductive layer on the contact Method of manufacturing an antistatic circuit of a semiconductor device, characterized in that consisting of. 2. The method of claim 1, wherein the wells have properties opposite to those of the substrate. The method of claim 1, wherein the ions implanted into the wells and the ions implanted at the time of forming the junction are of the same type. The method of claim 1, wherein the junction is larger than the size of the well. Forming a device isolation film for isolation between devices on a substrate; Forming wells by implanting ions between the device isolation layers, which are regions where pads are to be formed; Implanting high concentration ions into the wells through the photoresist pattern to form a first cushion; Forming a second cushion by implanting high concentration ions through a photosensitive film pattern in a region where the first partition is not formed between the device isolation layers. Forming an insulating film on upper surfaces of the first and second junctions and forming a plurality of contacts to be connected to the first cushion; Applying a conductive layer on the contact and then forming a pad Method of manufacturing an anti-static circuit of a semiconductor device, comprising the. 6. The method of claim 5, wherein the well has a property opposite to that of the substrate. 6. The method of claim 5, wherein the ions implanted into the wells and the ions implanted when forming the first section are of opposite types. 6. The method of claim 5, wherein the ions implanted when forming the first section and the ions implanted when forming the second section are of opposite types. 6. The method of claim 5, wherein the first cushion is formed smaller than the wells so that the second cushion overlaps the wells.