KR20000015606A - Over power protection circuit of a monitor - Google Patents

Abstract

PURPOSE: A power protection circuit for a monitor is provided to prevent the damage of parts due to over power pressure by discharging the electric current flowing in the photo coupler with an earthing in case the over power pressure occurs. CONSTITUTION: The circuit comprises a direct current supply part(1) which transfers the alternating current into the direct current and supplies to the transistor(2); a control IC(4) which makes and outputs the PWM control signal by a feedback current; a power transistor(3) which is put on/off by the control signal and makes the alternating current at the transistor(2); and an output part(5) which transfers alternating current into direct current and supplies to the circuit of each monitor. The circuit further comprises a sensor part(10) which outputs over power sensor signal(S1,S2,S3); an operation part(20) which outputs the operation signal; and a switching part(30) which discharges the current in photo coupler in earthing.

Description

An over voltage protection circuit in a monitor

The present invention relates to an overvoltage protection circuit of a monitor, and in particular, when an excessive power supply voltage exceeding a rated range is generated from a switching power supply circuit (SMPS), the overvoltage of the monitor is designed to extremely reduce the power supply voltage output from the switching power supply circuit. It relates to a protection circuit.

In general, the power circuit serves to properly supply the voltage required for each part of the monitor. The technology related to the SMPS (Switched Mode Power Supply) is smaller, lighter and more efficient than the Linear Power Supply. This is a rapidly developing trend.

As shown in FIG. 1, the conventional switching power supply circuit includes a DC power supply 1, a transformer 2, a power transistor 3, a control IC 4, an output 5, and a voltage. It consists of the feedback part 6 and.

Referring to FIG. 1, the operation of a general switching power supply circuit (SMPS) is described. First, when 100 V or 220 V commercial AC power is applied through a fuse, the line filters L1 and L2 and the capacitors C1, C2, and C3 are By removing the noise introduced through the AC power by the L-C resonant action, high-frequency noise generated while the bridge diode D1 and the control IC 4 are operated is blocked from going out through the AC input line.

Meanwhile, the AC voltage passing through the line filters L1 and L2 and the capacitors C1, C2 and C3 is rectified by the bridge diode D1 and smoothed in the smoothing capacitor C4 through the inrush current preventing resistor R1. DC voltage ( V _i And then to the primary winding of the transformer (2).

At the same time, the rectified voltage rectified by the bridge diode D1 is applied to the control IC 4. V _cc A resistor R2 is applied to the stage to operate the control IC 4, and the power transistor 30 is turned on / off by the PWM control signal output from the control IC 4. .

That is, the DC voltage ( V _i ) Is applied, the DC voltage ( V _i ), The driving power of the control IC (4) ( V _cc ) Reaches a starting voltage, the control IC 4 is operated to generate a PWM control signal, and the power transistor 3 is turned on / off by this PWM control signal.

When the power transistor 3 remains on and turns off by the PWM control signal output from the control IC 4, induced electromotive force is induced from the primary winding of the transformer 2 to the secondary winding. Done.

Therefore, the transformer 2 is the AC voltage required in the secondary winding by the PWM control signal ( V _s, V _sm, V _sn ) Will be printed.

By repeating this operation, the AC voltage output from the secondary winding of the transformer 2 V _s, V _sm, V _sn ) Again through the output unit (5) DC voltage ( V _o, V _om, V _on Is converted to).

That is, the AC voltage inputted to the output unit 5 V _s, V _sm, V _sn ) Is a direct current voltage (DC) due to rectification diodes (D2, D3, D4) and smoothing capacitors (C7, C8, C9). V _o, V _om, V _on ) Is supplied to each circuit of the monitor to operate the circuit.

However, the power supply voltage output through the output unit 5 V _o, V _om, V _on ) Rises above the reference voltage, resulting in breakage of the circuit elements due to overvoltage, which can shorten the life of the power supply circuit. Therefore, in order to maintain the output voltage of the output unit 5 at a constant voltage, the switching power supply circuit The SMPS generally includes a voltage feedback section 6.

In more detail, the power supply voltage supplied to each circuit of the monitor ( V _o ) Is sensed by the voltage feedback section 6 composed of the error amplifier EA and the photocouplers PC1 and PC2, and the detection signal is input to the feedback stage of the control IC 4.

For example, the power supply voltage output from the transformer (2) V _o Is larger than during normal operation, the error amplifier EA senses the overvoltage and lowers the voltage at the output side of the error amplifier EA. At this time, the output side of the error amplifier EA is connected to the cathode end of the light emitting unit PC1 of the photocoupler, and the other end of the light emitting unit PC1 is the SMPS output ( V _om In this case, more current flows momentarily in the light emitting unit PC1 than in normal operation, thereby emitting as much light.

Accordingly, the light receiving unit PC2 of the photocoupler receives the light, converts the optical signal into an electrical signal, and outputs the light signal to the feedback terminal of the control IC 4. The input current increases than during normal operation, so that the control IC 4 generates a PWM control signal with a short on time, and the on time of the power transistor 3 is shortened by the PWM control signal.

As the on-time of the power transistor 3 is shortened, the induced electromotive force induced from the primary winding of the transformer 2 to the secondary winding ( V _s, V _sm, V _sn ) Is lowered, the power supply voltage (outputted from the switching power supply circuit (SMPS) V _o, V _om, V _on ) Is maintained at a constant voltage and supplied to each circuit of the monitor.

On the other hand, in the initial stage of operation of the switch power supply circuit, as described above, the DC voltage passing through the bridge diode D1 ( V _i ) Is charged through the capacitor (C5) to reach the starting voltage (usually 16V) drive power of the control IC ( V _cc After the power transistor 3 is driven by the PWM control signal output from the control IC 4, the DC voltage outputted from the output unit 5 V _on : Normally, 16V is applied to the drive voltage of the control IC 4 ( V _cc ).

At this time, a zener diode ZD1 for overvoltage protection having a zener voltage of 32V is provided inside the control IC 4, and the driving voltage (the V _cc ) Is twice the rated voltage (16V) and outputs a PWM control signal with an extremely short on-time to the power transistor (3).

Accordingly, as the on time of the power transistor 3 is extremely short, induced electromotive force is induced from the primary winding of the transformer 2 to the secondary winding ( V _s, V _sm, V _sn ) Is extremely low, the power supply voltage (outputted from the switching power supply circuit (SMPS) V _o, V _om, V _on ) Is also extremely low.

However, as described above, the zener diode ZD1 for overvoltage protection of the conventional control IC 4 has a power supply voltage output from the switching power supply circuit SMPS. V _o, V _om, V _on Since it only works when)) is more than doubled, there is a problem that it is fatal to the parts that are damaged even with a slight increase in the power supply voltage.

Accordingly, the present invention has been made to solve the above problems, it is to detect the excessive power supply voltage exceeding the rated range from the switching power supply circuit (SMPS), it is to reduce the power supply voltage output from the switching power supply circuit extremely The purpose is to provide an overvoltage protection circuit for the monitor.

The overvoltage protection circuit of the monitor according to the present invention for achieving the above object,

A DC power supply unit converting the commercial AC voltage applied through the fuse into a DC voltage and supplying it to the primary side of the transformer; A control IC that generates and outputs a PWM control signal based on the feedback voltage and the synchronization signal; A power transistor switched on / off by the PWM control signal to generate an AC voltage on the secondary side of the transformer; An output unit for converting an AC voltage output from the secondary side of the transformer into a DC voltage and supplying it to each circuit of the monitor; And a voltage feedback unit for supplying a feedback voltage to the control IC by controlling an amount of current flowing through the photocoupler by the DC voltage detected from the output unit.

A sensing unit for sensing a plurality of power supply voltages output from the output unit and outputting respective overvoltage detection signals when the power supply voltage is greater than or equal to each threshold voltage;

A driving unit outputting a driving signal when at least one overvoltage detection signal is input; And

And a switching unit configured to be switched on by the driving signal to quickly discharge current flowing through the photocoupler to ground.

1 is a circuit diagram showing a switching power supply circuit of a general monitor;

2 is a circuit diagram showing an overvoltage protection circuit of the monitor according to the present invention.

* Names of symbols according to the main parts of the drawings

1: DC power supply 2: transformer

3: power transistor 4: control IC

5 output unit 6 voltage feedback unit

10: sensing unit 20: driving unit

30: switching unit OR: ora gate

PC1: photocoupler light emitting unit PC2: photocoupler light receiving unit

Q 11,12,13,14: 1,2,3,4 transistors

ZD 11,12,13: 1,2,3 Zener Diodes

R 11, 12, 13, 14, 15, 16, 21, 22, 23, 24, 25, 26, 31, 32: resistance

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a circuit diagram showing an overvoltage protection circuit of the monitor according to the present invention.

As shown in Fig. 2, the circuit of the present invention uses a commercial AC voltage applied through a fuse. V _ac ) To DC voltage ( V _i DC power supply unit (1) for converting the power supply to the primary side of the transformer (2); Feedback voltage V _fb Control IC (4) for generating and outputting a PWM control signal; A power transistor (3) for switching on / off by the PWM control signal to generate an alternating voltage on the secondary side of the transformer (2); AC voltage output from the secondary side of the transformer 2 V _s, V _sm, V _sn ) To DC voltage ( V _o, V _om, V _on An output unit 5 for converting the power supply to a circuit of the monitor; And a driving voltage at the anode terminal of the photocoupler light emitting unit PC1. V _om DC voltage detected from the output unit 5 by applying V _o The amount of current flowing through the photocoupler PC1 and PC2 is controlled by the feedback voltage to the control IC 4. V _fb In the switching power supply circuit (SMPS) provided with a voltage feedback unit (6) for supplying a plurality of power supply voltages, V _o, V _om, V _on ), Each power supply voltage ( V _o, V _om, V _on A sensing unit 10 for outputting each of the overvoltage detection signals S1, S2, and S3 when the threshold voltage is greater than or equal to each threshold voltage; A driver 20 outputting a driving signal S4 when at least one overvoltage detection signal S1, S2, S3 is input; And a switching unit 30 which is switched on by the driving signal S4 to ground the cathode terminal of the photocoupler light emitting unit PC1 to quickly discharge current flowing through the photocoupler PC1 and PC2 to ground. It is configured to include more.

Here, the sensing unit 10 includes: first voltage divider resistors R11 and R12 for dividing the first voltage voltage _Vo output from the output unit 5; A first zener diode ZD11 having a cathode end connected to the first voltage divider resistors R11 and R12; The base terminal is connected to the anode terminal of the first zener diode ZD11, the cathode terminal receives the driving voltage 5V through the resistor R21, and the emitter terminal is grounded through the resistor R22. An NPN type first transistor Q11 which outputs a first sensing signal S1 between the emitter stage and the resistor R22; Second voltage divider resistors R13 and R14 for dividing the second voltage voltage V _om output from the output unit 5; A second zener diode ZD12 having a cathode end connected to the second voltage divider resistors R13 and R14; The base terminal is connected to the anode terminal of the second zener diode ZD12, the cathode terminal receives the driving voltage 5V through the resistor R23, and the emitter terminal is grounded through the resistor R24. An NPN type second transistor Q12 for outputting a second detection signal S2 between the emitter stage and the resistor R24; Third voltage divider resistors R15 and R16 for dividing the third voltage voltage V _on output from the output unit 5; A third zener diode ZD13 having a cathode end connected to the third voltage divider resistors R15 and R16; And a base end is connected to the anode end of the third zener diode ZD13, the cathode end is supplied with the driving voltage 5V through the resistor R25, and the emitter end is grounded through the resistor R26. The NPN type third transistor Q13 outputs a third sensing signal S3 between the emitter terminal and the resistor R26.

In addition, the driver 20 has a first input terminal connected in parallel between the emitter terminal of the first transistor Q11 and the resistor R22, and the second input terminal is connected to the emitter terminal of the second transistor Q12 and the resistor. An OR gate which is connected in parallel between R24 and a third input terminal is connected in parallel between the emitter terminal of the third transistor Q13 and the resistor R26 to output the driving signal S4. Consists of

In addition, the switching unit 30 has a base terminal connected to the output terminal of the OR gate through the resistors R31 and R32, and a cathode terminal is parallel between the anode terminal of the photocoupler light emitting unit PC1 and ground. And an NPN type fourth transistor Q31 having an emitter end connected to ground.

Subsequently, the operation and effects of the circuit according to the present invention configured as described above will be divided into normal operation and over voltage generation.

First, the zener voltages of the first, second, and third zener diodes ZD 11, 12, and 13 are set to 5V. In addition, the first, second, and third power voltages outputted from the output unit 5 during normal operation ( V _o, V _om, V _on ) Is divided by the first, second, and third voltage divider resistors R 11, 12, 13, 14, 15, and 16, that is, (a1) (a2) and (a3) point voltages are 5 V or less. The resistance values of the first, second, and third divided resistors R 11, 12, 13, 14, 15, and 16 are set to be equal to each other. In addition, the first, second, third power voltage ( V _o, V _om, V _on The limit voltage of) is set to be about 6/5 of the rated voltage (80V, 45V, 16V).

1. In normal operation

The first power supply voltage having a rated voltage of 80 V ( V _o ) Is less than or equal to the first threshold voltage (95V), the (a1) point voltage is less than or equal to 5V, and the first zener diode ZD11 is turned off, and the first zener diode ZD11 is turned off, thus the first transistor ( Since the base voltage is not applied to Q11, the first transistor Q11 is turned off, so that the first sensing signal S1 having a low level is generated between the emitter terminal of the first transistor Q11 and the resistor R22. Is output.

In addition, the second power supply voltage having a rated voltage of 45V ( V _om ) Is less than the second limit voltage (55V) (a2) the point voltage is 5V or less, the second zener diode (ZD12) is turned off, the second zener diode (ZD12) is turned off, the second transistor ( Since the base voltage is not applied to Q12, the second transistor Q12 is turned off, so that the second sensing signal S2 having a low level is generated between the emitter terminal of the second transistor Q12 and the resistor R24. Is output.

In addition, a third power supply voltage having a rated voltage of 16V ( V _on ) Is less than or equal to the third threshold voltage (20V), the (a3) point voltage is less than or equal to 5V, and the third zener diode ZD13 is turned off, and the third zener diode ZD13 is turned off, thereby causing the third transistor ( Since the base voltage is not applied to Q13, the third transistor Q13 is turned off, so that the third sensing signal S3 having a low level is generated between the emitter terminal of the third transistor Q13 and the resistor R26. Is output.

Accordingly, the OR gate OR receives the low level first, second, and third detection signals S1, S2, and S3, and outputs the low level driving signal S4.

The low level driving signal S4 is applied to the base terminal of the fourth transistor Q4 through the resistors R31 and 32 to turn off the fourth transistor Q31. Thus, the overvoltage protection circuit according to the present invention It has no effect on the switching power supply circuit (SMPS).

2. In case of overvoltage

First, second and third power supply voltages ( V _o, V _om, V _on When at least one of the power supply voltage is greater than or equal to the threshold voltage, for example, the first power supply voltage having a rated voltage of 80V ( V _o ) Is greater than or equal to the first threshold voltage (95V), the (a1) point voltage is 5V or more to turn on the first zener diode (ZD11), the first transistor Q11 as the first zener diode (ZD11) is turned on. The base voltage is applied to the first transistor Q11 to turn on, and thus the driving voltage 5 is supplied to the collector terminal-emitter stage of the first transistor Q11 through the resistor R21. The first detection signal S1 having a high level is output between the resistors R22.

In addition, the second power supply voltage having a rated voltage of 45V ( V _om ) Is less than or equal to the second threshold voltage (45V), the second sensing signal (S2) of the low level is output between the emitter terminal of the second transistor (Q12) and the resistor (R24), the third power source having a rated voltage of 16V Voltage( V _on ) Is less than or equal to the third limit voltage 20V, a third sensing signal S3 having a low level is output between the emitter terminal of the third transistor Q13 and the resistor R26.

Accordingly, the OR gate OR receives the high level first detection signal S1 and the low level second and third detection signals S2 and S3, and outputs the high level driving signal S4.

The high level driving signal S4 is applied to the base terminal of the fourth transistor Q4 through the resistors R31 and 32 to turn on the fourth transistor Q31, so that the photocoupler light emitting unit PC1 Since the casing is grounded, very much current flows through the photocoupler light emitting unit PC1 to emit as much light as it is.

Accordingly, the photocoupler light receiving unit PC2 receives the light, converts the optical signal into an electrical signal, and outputs the light signal to the feedback terminal of the control IC 4, thereby inputting it to the feedback terminal of the control IC 4. As the current increases rapidly, the control IC 4 generates a PWM control signal having an extremely short on time, and the on time of the power transistor 3 is extremely shortened by the PWM control signal.

As the on-time of the power transistor 3 becomes extremely short, induced electromotive force induced from the primary winding of the transformer 2 to the secondary winding ( V _s, V _sm, V _sn ) Is extremely low, the power supply voltage (outputted from the switching power supply circuit (SMPS) V _o, V _om, V _on ) Is extremely low.

As described above, the circuit of the present invention quickly discharges the current flowing through the photocoupler to ground when an excessive power supply voltage exceeding the rated range is generated from the switching power supply circuit (SMPS), thereby reducing the power supply voltage output from the switching power supply circuit. The reduction is extremely effective in preventing the parts from being damaged by overvoltage.

Claims (4)

Commercial AC voltage applied through fuse V _ac ) To DC voltage ( V _i DC power supply unit (1) for converting the power supply to the primary side of the transformer (2); Feedback voltage V _fb Control IC (4) for generating and outputting a PWM control signal; A power transistor (3) for switching on / off by the PWM control signal to generate an alternating voltage on the secondary side of the transformer (2); AC voltage output from the secondary side of the transformer (2) V _s, V _sm, V _sn ) To DC voltage ( V _o, V _om, V _on An output unit 5 for converting the power supply to a circuit of the monitor; And a DC voltage detected from the output unit 5 V _o The amount of current flowing through the photocoupler PC1 and PC2 is controlled by the feedback voltage to the control IC 4. V _fb In the switching power supply circuit having a voltage feedback unit (6) for supplying A plurality of power supply voltages outputted from the output unit 5 V _o, V _om, V _on ), Each power supply voltage ( V _o, V _om, V _on A sensing unit 10 for outputting each of the overvoltage sensing signals S1, S2, and S3 when the threshold voltage is greater than or equal to each of the threshold voltages; A driver 20 outputting a driving signal S4 when at least one overvoltage detection signal S1, S2, S3 is input; And And a switching unit (30) which is switched on by the driving signal (S4) and rapidly discharges the current flowing through the photocoupler (PC1, PC2) to ground. The method of claim 1, wherein the detection unit 10, First voltage divider resistors R11 and R12 for dividing the first voltage voltage _Vo output from the output unit 5; A first zener diode ZD11 having a cathode end connected to the first voltage divider resistors R11 and R12; The base terminal is connected to the anode terminal of the first zener diode ZD11, the cathode terminal receives the driving voltage 5V through the resistor R21, and the emitter terminal is grounded through the resistor R22. An NPN type first transistor Q11 which outputs a first sensing signal S1 between the emitter stage and the resistor R22; Second voltage divider resistors R13 and R14 for dividing the second voltage voltage V _om output from the output unit 5; A second zener diode ZD12 having a cathode end connected to the second voltage divider resistors R13 and R14; The base terminal is connected to the anode terminal of the second zener diode ZD12, the cathode terminal receives the driving voltage 5V through the resistor R23, and the emitter terminal is grounded through the resistor R24. An NPN type second transistor Q12 for outputting a second detection signal S2 between the emitter stage and the resistor R24; Third voltage divider resistors R15 and R16 for dividing the third voltage voltage V _on output from the output unit 5; A third zener diode ZD13 having a cathode end connected to the third voltage divider resistors R15 and R16; And The base terminal is connected to the anode terminal of the third zener diode ZD13, the cathode terminal receives the driving voltage 5V through the resistor R25, and the emitter terminal is grounded through the resistor R26. And an NPN type third transistor (Q13) for outputting a third detection signal (S3) between the emitter stage and the resistor (R26). The method of claim 2, wherein the drive unit 20, A first input terminal is connected in parallel between the emitter terminal of the first transistor Q11 and the resistor R22, and the second input terminal is connected in parallel between the emitter terminal of the second transistor Q12 and the resistor R24. And a third input terminal is connected in parallel between the emitter terminal of the third transistor Q13 and the resistor R26, and comprises an OR gate OR for outputting a driving signal S4. Overvoltage protection circuit. The method of claim 3, wherein the switching unit 30, The base terminal is connected to the output terminal of the OR gate through the resistors R31 and R32, the cathode terminal is connected in parallel between the anode terminal of the photocoupler light emitting unit PC1 and ground, and the emitter terminal is grounded. An overvoltage protection circuit for a monitor, characterized by comprising an NPN type fourth transistor (Q31).