KR20000000664A - Planer buried semiconductor laser and method thereof - Google Patents

Abstract

PURPOSE: A semiconductor laser and method thereof are provided to achieve a high performance optical output property by using a planer buried semiconductor laser structure. CONSTITUTION: The method comprises the steps of: defining an active region(302) using a mesa etching; regrowing current blocking layers(304,305,306) of p-n-p structure in order to inject currents into the active region; regrowing a p-InP cladding layer(306) and a p-InGaAs ohmic contact layer(307) on the active region(302); and regrowing a semi-insulating InP current blocking layer(309) in order to increase a modulation speed at both sides of the p-n-p current blocking layers.

Description

Planar Embedded Semiconductor Laser Structure and Manufacturing Method Thereof

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor laser structure and a method of manufacturing the same, and more particularly, to a semiconductor laser structure having a planar buried heterojunction structure and a method of manufacturing the same.

As a high performance semiconductor laser used in optical communication, a planar embedded semiconductor laser having low oscillation threshold current, high quantum efficiency, etc. is generally used.

Currently, the light source used in the optical communication field needs to have high power, high reliability, and high modulation rate in order to send a large amount of information at a high speed.

Therefore, optimization of the current blocking layer used in the planar buried semiconductor laser is required. In the case of p-n-p, which is mainly used as the current blocking layer, high performance static characteristics can be obtained, but parasitic capacitance is increased so that high-speed modulation cannot be performed.

In order to reduce the capacitance generated in the current blocking layer of pnp, the method of etching around the active layer is mainly used.In this case, it is reliable for long time use at high power due to stress between semiconductor and insulator generated around the active layer of mesa etching type. There is a problem.

When cleaving is performed to form the mirror surface of the semiconductor laser, excessive force is applied to the narrow active layer region, resulting in deterioration of reliability due to mechanical stress.

The conventional technique proposed to improve the high speed modulation characteristics is to use a semi-insulated current blocking layer, which is mainly a method of doping iron (Fe) to reduce the parasitic capacitance, simplifying the process compared to the pnp structure, modulation It can bring about a significant improvement in properties.

However, in the case of regrowth using this semi-insulating current blocking layer, the characteristics of the active layer are deteriorated by the diffusion of iron, and when the electron is placed between the p-type and n-type materials, the electrons are moved by the deep-level center. Recombination of holes and electrons causes electrons and holes to be injected into the semi-insulating current blocking layer, and thus cannot act as a current blocking layer.

Therefore, although a commonly used method has been proposed to prevent such a phenomenon by inserting a semi-insulating layer between the n-type semiconductor and the p-type semiconductor, the static characteristics of the semiconductor laser is a case of using a pnp current blocking layer You will fall behind.

A process structure diagram of a planar buried semiconductor laser having a conventional semi-insulating current blocking layer is shown in FIGS. 1A to 1E.

In FIG. 1A, an active layer 102 and a p-type InP layer 101 having a heterojunction structure are grown on an n-type InP substrate 103 by using a liquid crystal growth apparatus or an organometallic chemical vapor deposition apparatus, and then an insulating layer for mesa etching. 100 is formed through a photolithography process.

In FIG. 1B, a mesa structure is formed by using dry or wet etching to define an active layer region using an insulating layer mask.

In FIG. 1C, the semi-insulated InP current blocking layer 104 is regrown using a liquid crystal growth apparatus or an organometallic chemical vapor deposition apparatus to trap current and light of the active layer.

In FIG. 1D, after removing the insulating layer 100 used for mesa etching, the p-type InP clad layer 105 and the p-type ohmic contact layer 106 are regrown using a liquid crystal growth apparatus or an organometallic chemical vapor deposition apparatus. .

In FIG. 1E, the p-type electrode 108 and the n-type electrode 109 are deposited after the insulating layer 100 is opened just above the active layer 102 by a photolithography method.

In FIG. 1E, the semi-insulating regrowth layer formed between the p-type cladding layer and the n-type substrate has a problem in that holes and electrons recombine at a deep center to act as a path for leakage current rather than serving as a current blocking layer.

In addition, iron (Fe) used for the doping of the semi-insulating layer has a disadvantage that the active layer acts as an absorbing layer absorbing light by affecting the active layer by diffusion.

In order to solve this problem, various methods have been proposed, but it is difficult to apply the same when the structure of the active layer or the width of the active layer is the same, it is difficult to implement a high-performance semiconductor laser reproducible.

2A to 2F show a process structure diagram of a planar buried semiconductor laser having a current blocking layer having a high speed modulation p-n-p structure.

In FIG. 2A, an active layer 202 and a p-type InP layer 201 having a heterojunction structure are grown on an n-type InP substrate 203 by using a liquid crystal growth apparatus or an organometallic chemical vapor deposition apparatus, and then an insulating layer for mesa etching. (200) is formed through a photolithography process.

In FIG. 2B, a mesa etching structure is formed by using dry or wet etching to define an active layer 202 region using an insulating layer mask.

In FIG. 2C, the p-type InP 204 and the n-type InP 205 current blocking layer 205 are regrown using a liquid crystal growth apparatus or an organometallic chemical vapor deposition apparatus to trap the current and light of the active layer.

In FIG. 2D, after removing the insulating layer 200 used for mesa etching, the p-type InP clad layer 206 and the p-type ohmic contact layer 207 are regrown using a liquid crystal growth apparatus or an organometallic chemical vapor deposition apparatus. The insulating film 208 is formed by a photolithography process.

In FIG. 2E, a channel around the active layer region is formed through a dry or wet etching process in order to reduce the parasitic capacitance generated by the current blocking layer of the p-n-p structure.

In FIG. 2F, the insulating film 208 for channel formation is removed, and only the insulating film 208 is opened directly above the active layer by a photolithography method to form an electrode, and then the p-type electrode 209 is deposited, and then the n-type electrode 210. ) Is deposited.

2A to 2F show high performance, but a complicated process of forming a channel for reducing the parasitic capacitance caused by the pnp (204-205-206) structure surrounding the mesa is required. The reproducibility is lowered and the yield is reduced.

In addition, since a channel is formed in the peripheral ratio of the active layer, the difference in thermal expansion coefficient between the semiconductor and the insulating film is subject to continuous stress in the long term, thereby lowering the reliability.

When the semiconductor laser is manufactured, the cleavage is performed to form an important mirror surface, which has a problem of deterioration in characteristics or inferior reliability due to mechanical damage caused by the narrow width of the active layer region.

On the other hand, the preceding paper describes “Analysis of current leakage in InGaAsP / InP buried heterostructure lasers” published in the Journal of Quantum Electronics [Author Ohtoshi, Vol. 25, no.6 1396 1375, June 1989] ”calculates the high temperature operating characteristics according to the current blocking layer location, thickness, and doping of buried semiconductor laser in two dimensions to change the thickness and doping of the current blocking layer Although the operation characteristics could be improved, there was no mention of a part in improving the high speed operation characteristics, and it was difficult to secure the high speed modulation characteristics in the pnp current blocking layer.

Also, published in the Journal of Quantum Electronics, “Analysis of leakage curret in buried heterostructure lasers with semiinsulating blocking lasers [author S.A.Asada, vol. 25, no. 6, pp. 1362-1368, June 1989] ”shows the leakage current by reducing the leakage current by growing an n-type semiconductor on the semi-insulating layer or by growing an InGaAs layer to suggest the leakage current suppression method of the semi-insulated buried semiconductor laser. Although it was possible to suppress the fundamental problem of the composite current blocking layer, it was not possible to improve the fundamental problem of the semi-insulating layer, and the semi-insulating current blocking layer had a fundamentally lower characteristic than the current blocking layer of the pnp structure. There was a problem that was not excellent.

Next, “High-performance strain-compensated MQW heterostructure laser diodes with low leakage current, published in the Japanese Journal of Applied Physics [author H. S. Cho, Vol. 35, no. 3, pp. 1751-1757, March 1996] ”provides a method to reduce the leakage current by two-step etching to investigate the operating characteristics caused by the leakage current of a buried semiconductor laser with a pnp current blocking layer. Although the output characteristics of the semiconductor laser were improved, there was a problem that the modulation speed was not improved by examining the influence of leakage current without considering the modulation speed.

Prior patents “Method for fabricating a planar buried heterostructure laser diode [right holder JK Lee Registration No. 5665612, Sept. 9, 1997]” aim to reduce leakage current by using different mesa etching methods. By simultaneously performing selective etching to reduce the leakage current, the leakage current could be reduced. However, since the disadvantage was solved by focusing on the etching method itself, the etching method was limited.

In addition, the US Patent Method of fabricating semiconductor laser [right holder K. Fujihara, Registration No. 5227015, July 13, 1993] is a one-time growth to manufacture a planar embedded semiconductor laser and secure the ideal for the design of the current blocking layer. In order to facilitate the re-growth of the current blocking layer by a two-step etching method, a high-performance planar buried semiconductor laser could be manufactured by reducing the number of regrowths, but there was no way to improve the high-speed modulation characteristics. Because of the focus, the effect of the regrowth layer structure is not mentioned.

In addition, in the method of manufacturing Japanese patented semiconductor lasers [right holder,, 川 英明, Registration No. Hei 4-130691, 1992. 5. 1], in order to manufacture high performance semiconductor lasers by improving the regrowth characteristics through the improvement of the mesa etching method, After the non-selective etching, only the side of the active layer was selectively etched to suppress the abnormal growth of the regrowth layer, thereby improving the characteristics of the semiconductor laser, but the improvement of the characteristics of the re-growth side did not improve the overall performance through the structural change of the current blocking layer. .

In order to solve the above problems, the present invention changes only the structure of the current blocking layer in the existing process, thereby maintaining high leakage current characteristics of the pnp current blocking layer used in the conventional semiconductor laser, and high modulation of the semi-insulating residual blocking layer. The purpose is to improve the operating characteristics of semiconductor lasers by simultaneously implementing the speed.

1A to 1E are plan views of a planar embedded semiconductor laser having a conventional semi-isolated current blocking layer,

2A to 2F are planar buried semiconductor laser manufacturing process diagrams having a conventional p-n-p current blocking layer,

3A to 3F are planar buried semiconductor laser manufacturing process diagrams to which the present invention is applied.

Explanation of symbols on the main parts of the drawings

300, 310 insulating film 301 p-InP clad layer

302: active layer 303: n-InP substrate

304: p-InP current blocking layer 305: n-InP current blocking layer

306: p-InP clad layer 307: p-InGaAs ohmic contact layer

308: insulating film 309: semi-insulating InP current blocking layer

311: p-type electrode 312: n-type electrode

The planar buried semiconductor laser structure of the present invention for achieving the above object is formed by mesa etching the active layer and the p-type InP clad layer sequentially stacked on the n-type InP substrate, a predetermined distance on both sides of the etched active layer A current blocking layer having a pnp structure in which only a portion of the p-type InP current blocking layer, the n-type InP current blocking layer, and the p-type ohmic contact layer are sequentially buried on the substrate; A semi-insulating InP current blocking layer is formed on both sides of the current blocking layer of the pnp structure, and only a portion of the current blocking layer is formed on the same substrate, and the two current blocking layers are formed on the insulating layer having an opening for forming an electrode. One of the features formed between the p-type electrode and the n-type electrode formed on the lower substrate.

In addition, a method of manufacturing a planar buried semiconductor laser, which is another feature of the present invention, is a planar buried semiconductor including an active layer, a current blocking layer, and an ohmic contact layer formed on a semiconductor substrate, wherein the current blocking layer is semi-insulated from the pnp structure. Simultaneously using the layer as a current blocking layer, performing mesa etching to define the active layer region, regrowing a current blocking layer having a pnp structure around the active layer for current injection into the active layer region, and After the barrier layer regrowth, the process of regrowing the cladding layer and ohmic contact layer on the active layer region, and the process of regrowing the semi-insulating layer to increase the modulation rate after regrowing the cladding layer and ohmic contact layer. do.

According to the present invention having the above characteristics, by using the low leakage current function of the pnp current blocking layer and the semi-insulating current blocking layer for high speed modulation simultaneously on the same substrate, it is possible to manufacture a high performance high speed semiconductor laser. do.

That is, the current blocking layer according to the present invention has a lower leakage current than the structure of the conventional semi-insulated planar buried semiconductor laser (FIG. 1E), and has a higher modulation rate than the p-n-p current blocking layer.

Hereinafter, a manufacturing process of a planar buried semiconductor laser according to an exemplary embodiment of the present invention will be described in detail with reference to the cross-sectional views of FIGS. 3A to 3F.

First, as shown in FIG. 3A, an InGaAs or InGaAsP active layer 302 having a heterojunction structure and a p-type InP clad layer 301 of an oxide film or a nitride film are grown on an n-type InP type substrate 303. Alternatively, after growing using an organometallic chemical vapor deposition equipment, the insulating film 300 of the oxide film or nitride film is deposited and a stripe for forming mesa through a photolithography process.

In FIG. 3B, only a portion of the p-type InP clad layer 301, the active layer 302, and the substrate 303 may be a mesa structure through a dry or wet etching process using the formed insulating layer 300 as an etching mask. Etch with.

3C illustrates a process of regrowing the current blocking layer, in which a p-type InP current blocking layer 304 and an n-type InP layer 305 are sequentially stacked at predetermined distances on both sides of the active layer 302.

Next, after removing the insulating layer 300 used for mesa etching, as shown in FIG. 3d, the p-type InP cladding layer 306 and the p-type InGaAs ohmic contact layer 307 are formed on the n-type InP layer 305. To grow. The above steps to FIG. 3D are the same as those of the general planar embedded semiconductor laser. However, in the present invention, as shown in FIG. 3D, the parasitic capacitance generated by the pnp current blocking layer structures 304-305-306 formed on both sides of the active layer 302 increases, making it difficult to achieve high-speed modulation of ㎓ or more. Therefore, the parasitic capacitance generated by the pnp current blocking layer is removed by forming a stripe on the insulating film 308 of the oxide film or the nitride film through a photolithography method.

Accordingly, in the process of FIG. 3E, a portion of the formed substrate 303 is further etched to a predetermined depth by leaving the pnp current blocking layer by a wet or dry etching process using the insulating film 308 as a mask for high speed modulation. The semi-insulating InP current blocking layer 309 is regrown on both sides of the current blocking layer of the pnp structure.

Finally, as shown in Figure 3f, after removing the insulating film 308 used for etching to form an insulating film 310 for forming the electrode and using only a photolithography method, after opening only the portion immediately above the active layer, p The type electrode 311 and the n type electrode 312 are deposited.

In the case of the planar buried semiconductor laser fabricated through the above process, the double layer injection is more likely to occur in the semi-insulating layer by using the pnp-type current blocking layer on the active layer side than in the case of using only the semi-insulating current blocking layer. Not only can the same phenomenon be suppressed, but the problem of forming the non-emitting recombination center by the diffusion of iron (Fe) can be eliminated, so that the leakage current can be significantly improved.

In addition, since only a part of the pnp current blocking layer forming the periphery of the active layer constitutes a semi-insulating layer, the parasitic capacitance can be significantly reduced compared to the case of using only the pnp current blocking layer, so that high-speed modulation of ㎓ or more is possible. Do.

In addition, the process is simplified compared to the planar embedded semiconductor laser having a pnp current blocking layer which reduces the parasitic capacitance through channel formation, greatly improving the reproducibility and yield, and preventing the degradation of the reliability that is easily generated by the channel. High speed modulation is possible.

The present invention as described above has a problem that the high speed modulation efficiency is excellent but the optical output characteristics are deteriorated when the semi-insulated current blocking layer in the conventional high-speed modulation flat-bed semiconductor laser, and the pnp current blocking layer structure in which the channel is formed Due to the complexity of the process, reproducibility and yield are reduced, and the problem of reliability due to the channel is solved, and the complex current blocking layer structure not only reduces the leakage current flowing through the active layer side but also significantly improves the high speed modulation characteristics. have.

In addition, since the process is simplified and shows excellent characteristics in terms of reproducibility and reliability, it has the effect of manufacturing a high performance semiconductor laser.

Claims (6)

p-type InP current blocking layer sequentially formed on the n-type InP substrate and the p-type InP clad layer sequentially stacked on the substrate at a predetermined distance on both sides of the etched active layer, n A current blocking layer having a pnp structure in which only a part of the type InP current blocking layer and the p type ohmic contact layer are embedded; Semi-insulating InP current blocking layers are formed on both sides of the current blocking layer of the p-n-p structure, and the portions are partially etched on the same substrate. The two current blocking layers are formed between a p-type electrode on the insulating film having an opening for forming an electrode and an n-type electrode formed on the lower side of the substrate to reduce the leakage current flowing through the active layer side and at the same time provide high speed modulation characteristics. A planar embedded semiconductor laser structure, which can be improved. In the planar embedded semiconductor manufacturing method comprising an active layer, a current blocking layer, an ohmic contact layer formed on a semiconductor substrate, Performing a mesa etch to define an active layer region; Re-growing a current blocking layer having a p-n-p structure around the active layer to inject current into the active layer region; Re-growing the clad layer and the ohmic contact layer on the active layer region after forming the current blocking layer; And And a fourth process of regrowing the semi-insulating current blocking layer to increase the modulation speed after the regrowth of the cladding layer and the ohmic contact layer. The method of claim 2, wherein the first process is The active layer and the p-type InP clad layer of the heterojunction structure are grown on the n-type InP semiconductor substrate using liquid crystal growth or organometallic chemical vapor deposition equipment, and then an insulating film is deposited and a stripe for mesa formation is formed through a photolithography process. Forming a first step; And a second step of mesa etching through a dry or wet etching process using the insulating film as an etching mask. The method of claim 2, wherein the second process And a current blocking layer comprising a regrowth layer of a p-type InP layer and an n-type InP layer on the n-type InP semiconductor substrate. The method of claim 2, wherein the third process is A method of manufacturing a planar buried semiconductor laser, characterized in that the parasitic capacitance generated by the p-n-p current blocking layer is removed by forming a stripe through the photolithography process. The method of claim 2, wherein the fourth process A first step of etching the insulating film as an etching mask to wet the substrate, leaving only a part of the p-n-p current blocking layer by wet or dry etching, and then regrowing the semi-insulated InP current blocking layer for high-speed modulation; After removing the insulating film used for etching to form an insulating film for forming the electrode, and using a photolithography process, the second step of depositing the p-type electrode and the n-type electrode after opening only the upper portion of the active layer, characterized in that Method of manufacturing a planar embedded semiconductor laser.