KR19990086309A - Real-Time Processing Device and Method of HDTV Audio Encoder - Google Patents

Abstract

The present invention relates to a real-time processing apparatus and method for an HDTV audio encoder, and more particularly, to a system and method for real-time processing of an HDTV audio coder, including five slave boards 1 for performing subband analysis and psychoacoustic modeling; A master board 2 for channel matrixing, bit allocation, quantization, bit packing, and interface with the PC 5; A backplane board 3 for connecting the slave boards 1 to the master board 2; An interface unit 4 for transmitting data transmitted from the master board 2 to the bit stream to a personal computer; A personal computer 5 for decoding the bit stream transmitted by the MPEG standard decoding program to check the performance of the encoding system; A 6-channel A / D converter 7 for converting an audio signal output from the source 6 to an analog signal into a 16-bit PCM digital data and transmitting the same to the slave boards 1, It can support dynamic transmission channel switching and virtual encoding of the central channel. It can process only one processor when up-clocking at 50MHz, reduce manufacturing cost by reducing the used processor, It is possible to reduce the coding time delay in application of HDTV broadcasting, etc., and to utilize it in applications of other processors and ASICs.

Description

Real-Time Processing Device and Method of HDTV Audio Encoder

The present invention relates to a real-time processing apparatus and method for an HDTV audio coder using a general-purpose DPS, and more particularly, to a method and apparatus for real- (2), which is a method for performing multichannel coding more efficiently, and supports dynamic transmission channel switching and phantom coding of a central channel in the composite coding proposed in MPEG-2 Speeding and optimization of each subroutine can be achieved by up-clocking the slave board execution routine, which was processed by two processors, to a single 50MHz processor, Multi-channel processing can be done with only two processors by applying high-speed algorithm In addition, it is possible to reduce the manufacturing cost by reducing the number of processors used, and also to reduce the coding delay, which is an important problem in applications such as HDTV broadcasting. The optimized program can be developed using a general- And ASICs.

In general, the advantage of digital audio over analog audio is that it has a wide bandwidth, dynamic range, and no loss of sound quality when copied.

Such digital audio technology is currently being applied to storage media such as CD (Compact Disk), MD (Mini Disk), DCC (Digital Compact Cassette) and CD-I (Compact Disk-Interactive) ), And future HDTV (High Definition TeleVision) broadcasting.

However, compression of the signal is inevitable in order to reduce problems in transmission and storage, and an effective compression technique in which a compression-coded audio signal is maintained such that the subjective sound quality after decoding is kept substantially equal to the existing sound quality must be used.

As a countermeasure against this, the Moving Picture Experts Group (MPEG) under the International Standard Organization (ISO) can apply to broadcast media such as digital HDTV, MPEG-2 standard ISO / IEC 13818-3, which can compress CD-level digital audio at 6 to 40 Mbit / s transfer rate with moving pictures to process more than 5 channels of audio, It was decided as the final international standard in November, and the standard which clarified contents which was unclear in February 1997 was newly announced.

In order to preoccupy this technology, we are studying high speed algorithm and single chip manufacturing technology. In the case of decoders with a relatively small amount of computation and a lot of demand, it is being actively developed such as a single chip. However, in the case of an encoder having only a limited demand such as a broadcasting station and a recording studio, development is delayed.

However, in order to actually use the MPEG-2 algorithm in a broadcast or multimedia system, a real-time encoding and decoding system is required, and realization of an encoder having a large amount of computation is becoming a great challenge.

The present invention has been made to solve the above problems, and it is an object of the present invention to provide a method and apparatus for real-time processing of 5.1 channel and 640 Kbps at 48 KHz sampling rate of MPEG-2 layer 2, , Dynamic transmission channel switching and virtual channel encoding can be supported. Up-clocking at 50MHz enables processing with only one processor. In addition, the multi-channel processing of a master board capable of real-time processing with four processors It is possible to reduce the manufacturing cost by reducing the number of processors used and to reduce the coding time delay which is an important problem in the application such as HDTV broadcasting, And a method for real time processing of an HDTV audio coder which can be utilized in the application of I will.

It is an object of the present invention to provide a system and method for a mobile communication system, which comprises five slave boards for receiving respective channel audio data and performing subband analysis and psychoacoustic modeling; A master board for channel matrixing, bit allocation, quantization, bit packing, and interface with a PC; A back plane board connecting the slave boards to the master board; An interface unit for transmitting data transmitted from the master board to a bit string to a personal computer; A personal computer (PC) for decoding the bit stream transmitted by the MPEG standard decoding program to check the performance of the encoding system; A 6-channel A / D converter for converting an audio signal, which is analog-outputted from a source such as a CD player or DAT (Digital Audio Tape), into 16-bit PCM digital data and transmitting the digital data to the slave boards, Processing the audio data in a parallel structure; A step of fast processing the subband analysis with the FAST DCT algorithm to increase the calculation speed; Exchanging data using a dual port RAM between the slave boards; Transferring the results of each slave board to the master via the dual port RAM; The master board hardware receiving data from the slave board and collectively processing the data; Using the efficient algorithm for bit allocation in the master board hardware; And finally to perform a step through the interface with the PC.

Therefore, real-time processing can be performed in 5.1-channel and 640-Kbps at 48 KHz sampling rate of MPEG-2 layer 2, so that all bit rates, sampling rates, and channel combinations below are possible, and dynamic transmission channel switching and virtual channel encoding are supported It is possible to process only one processor when up-clocking at 50MHz, and to process multi-channel of master board that can process in real time with 4 processors because it can process with only 2 processors by applying high-speed algorithm. It is possible to reduce the manufacturing cost by reducing the number of processors and reduce the coding time delay which is an important problem in the application such as HDTV broadcasting and can be applied to other applications such as processors and ASICs.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS Fig.

2 is a block diagram of a slave board

FIG. 3 is a detailed circuit diagram showing a data transfer state between two processors.

FIG. 4 is a diagram illustrating a ready signal generating circuit

5 is a detailed block diagram of the master board of the present invention apparatus

6 is a schematic diagram showing data exchange between a master and a slave

7 shows a data transfer circuit diagram between the master board and the PC

FIG. 8 is a flowchart illustrating an operation allocation algorithm of the encoding process

9 is a flow chart illustrating a synchronization process through interrupts between processors.

Fig. 10 is a flowchart of a program flow chart executed by the processor-a in the slave board in Fig.

FIG. 11 is a block diagram for matrix operation in FIG.

12 is a block diagram for the input vector transformation of FIG.

Fig. 13 is a flowchart of a program flow performed by the processor-b in the slave board in Fig.

14 is a flowchart of a program flow performed by the processor-a in the master board of FIG.

FIG. 15 is a diagram showing a buffer structure

16 is a flowchart of a program flow performed by the processor-b in the master board of FIG.

17 is a graph showing a bit allocation index average distribution per sound source used in the present invention

18 is a pre-bit allocation diagram at 48 KHz, 128 Kbps;

19 to 23 are data showing the results of experiments using the present invention,

FIG. 19 is a graph showing the MNR curve

20 shows the MNR curve change according to the pre-allocation (in the case of the electric guitar)

21 shows the MNR curve change (first frame) according to the pre-

22 shows the MNR curve change (in the case of violin)

23 is a graph showing a change in the final MNR curve according to the bit rate

DESCRIPTION OF THE REFERENCE SYMBOLS

1: Slave board 2: Master board

3: Backplane board 4: Interface unit

5: personal computer 6: source

7: A / D converter

2 is a block diagram of a slave board of the present invention. FIG. 3 is a detailed circuit diagram showing a data transfer state between two processors, and FIG. 4 shows a ready signal generating circuit diagram for controlling the data transfer time in the inventive device, and FIG. 5 shows a detailed block diagram of the master board of the inventive device.

6 is a structural diagram showing data exchange between a master and a slave, FIG. 7 shows a data transmission circuit diagram between a master board and a PC, FIG. 8 shows an operation allocation algorithm of an encoding process according to the present invention device , FIG. 9 is a flowchart showing a synchronization process through interrupts between processors, FIG. 10 shows a program flow chart performed by a processor-a in a slave board in FIG. 9, FIG.

FIG. 12 is a block diagram of the input vector conversion of FIG. 11, FIG. 13 shows a program flow chart performed by the processor-b in the slave board of FIG. 9, Fig. 15 shows a buffer structure used in the apparatus of the present invention. Fig. 16 shows a program flow chart performed by the processor-b in the master board in Fig. 9, and Fig. FIG. 18 shows a bit allocation index distribution chart for each sound source used in the present invention, and FIG. 18 shows a pre-bit allocation distribution chart at 48 KHz and 128 Kbps.

19 to 23 are data showing experimental results using the present invention, FIG. 19 is a MNR curve before a typical bit allocation, FIG. 20 is an MNR curve change degree (in the case of an electronic guitar) according to preallocation , FIG. 21 shows the MNR curve change (first frame) according to the pre-allocation, FIG. 22 shows the MNR curve change according to the pre-allocation (in the case of the violin), and FIG. 23 is the final MNR curve change according to the bit rate.

According to this, five slave boards 1 for receiving the respective channel audio data and performing subband analysis and psychoacoustic modeling;

A master board 2 for channel matrixing, bit allocation, quantization, bit packing, and interface with the PC 5;

A backplane board 3 for connecting the slave boards 1 to the master board 2;

An interface unit 4 for transmitting data transmitted from the master board 2 to the bit stream to a personal computer;

A personal computer 5 for decoding the bit stream transmitted by the MPEG standard decoding program to check the performance of the encoding system;

And a 6-channel A / D converter 7 for converting an audio signal, which is analog-outputted from a source 6 such as a CD player or a DAT, into 16-bit PCM digital data and transmitting the digital data to the slave boards 1 Basic features.

At this time, the slave boards 1, which are responsible for subband analysis and psychoacoustic model processing of one channel, use two processors -a, b (11), and 12 (TMS320C30) Analysis and Psychoacoustic Model The master board, which is responsible for bit allocation and quantization process and bit column formatting process, which must process data of each analyzed channel together, was composed of one processor.

In addition, the system implemented in the present invention uses two processors in the master board 2 to perform an extended role of multi-channel processing, Also,

One additional processor dedicated only to multi-channel bit allocation, several high-speed algorithms were applied to enable multi-channel coding at a high bit rate within the configured system, and the execution time per subroutine And the coding delay is minimized through appropriate task sharing and synchronization between processors.

Since the 6-channel A / D converter 7 is provided between the source 6 and the slave board 1, the input source 6 may be a CD player or a Phone output of DAT (Digital Audio Tape) , 5 microphones can be connected directly through the amplifier to input 5 channels of data.

At this time, it is experimentally found that although some errors may occur due to the accuracy of the D / A output from the CD player or the DAT and the A / D converter 7, this error can be neglected.

The converted 16-bit PCM samples are stored and encoded in a memory using a serial port built in the processor of the slave boards 1, and each processor in the slave boards 1, as shown in FIG. 2, And uses the dual-port RAM 13 to exchange data with each other, and then performs each routine.

In addition, the master board 2 receives the processed data from each slave board 1 using the dual port RAM, performs bit allocation, quantization, and bit string formatting.

The final processed bit stream is transmitted from the master board 2 to the PC 5 using a timer and a serial port built in the processor and is transmitted to the PC 5 through a serial- Converter) and DMA (Direct Memory Access) to the hard disk.

The stored data is transmitted to a multi-channel D / A converter, and can be reproduced according to a channel configuration desired by the user to evaluate the sound quality and transmitted to a system for integrating with a video bit stream

The slave board 1 may be divided into five parts as shown in FIG.

The first part is the part of the dual-port RAM 13 for transferring information between the processors, the third part is the memory required for each processor for storing the program or the result, The fourth part is a dual port RAM 15 for data transfer between the slave board 1 and the master board 2 and the fifth part is a decoding circuit part for decoding the memory address to change the number of weights.

Since the MPEG-2 layer 2 algorithm performs encoding with 1152 samples in units of one frame, the encoding of the current frame should end in a period of 1152 / 44.1 KHz = 26.1 msec during the arrival of the next frame of 1152 samples, Since a large amount of computation is required in the psychoacoustic part, real-time processing becomes difficult with one processor that receives the clock signal from the 33 MHz clock circuit 25.

Therefore, for real-time processing, a parallel processing technique in which two processors are used per channel and each processor simultaneously operates while the processing is pipelined must be used.

The data required to perform the psychoacoustic modeling in the processor-b 12 among the results processed by the processor-a 11 are the maximum scale factor and the power spectrum obtained through the FFT, The shared dual port RAM 13 between the slave processors -a, b (11) 12 is used for transfer.

The dual port RAM 15 is used for exchanging data between the two processors in the slave board 1 and transferring information between the master and the slave boards.

As can be seen in FIG. 2, a dual port RAM 13 is connected between fully symmetrical structures to facilitate information transfer between the two processors, and one of the dual port RAMs 15 allocated to each processor is connected to a backplane Back plane 16 to be used for transferring information with the master board 2.

The dual port RAMs 13 and 15 used have a zero-weight access speed, which is suitable for real-time processing, and has a built-in BUSY pin to prevent collisions when accessing memory from both sides, Effective information transfer is possible.

In addition, it has an interrupt line for bidirectional communication, so if a system connected to either side writes data to a fixed address (7ffh on the left and 7feh on the right), the system automatically requests an interrupt to the system connected to the other side. It is easy to adjust the overall motivation of the user.

By using dual-port RAM, all processors can perform a given task as easily as a system with only the memory allocated to them, without being aware of the existence of other processors, and can easily exchange the results.

3 shows that two processors-a, b (11) 12 use the dual port RAM 13 to exchange data and generate an interrupt.

Each of the processors -a, b (11) 12 has a ROM memory 14 of the same size as a 32K word RAM as an independent local memory.

In the ROM memory 14, a program code necessary for the slave board 1, various tables, and a program for transferring the program codes to the RAM are recorded, so that a stand-alone system operation is possible. And stores the operation result of the step.

It is possible to construct independent system by using fast ROM, but it is easy to configure system by executing all program code and data necessary for encoding after high-speed low-speed ROM which can be obtained easily and cheaply to high-speed RAM.

GAL22V10 was used as the address decoding device.

It is capable of using up to 12 inputs and 10 outputs, so it is suitable for decoding various control signals required for all memories in the slave board (1) and has a transfer delay of up to 7 nsec. It is appropriate.

After all the programs are completed, the interrupt vector table is constructed using the ROM. Since the ROM speed is slow and zero-weight access is not possible, the number of weights must be changed each time the ROM is accessed after the interrupt occurs.

Such a change in the number of weights can not be handled by the software weight number control function in the processor. This is because the interrupt vector table is referenced from the inside of the processor as soon as the interrupt occurs, and the CPU jumps to the corresponding interrupt address.

Therefore, in order to perform such a task, it is necessary to automatically change the number of weights of RAM and ROM by generating a hardware weight.

The processor has an RDY signal (Ready) that allows hardware to change the number of weights.

Since the RAM can be accessed with zero weight, a circuit that increases the number of weights only when the address of the ROM area is generated can be designed and the number of weights can be automatically adjusted by inputting into the RDY signal.

FIG. 4 shows such a ready signal generating circuit, wherein the number of weights can be adjusted by selecting one of the outputs of the various flip-flops.

5 shows a configuration of the improved master board 2. The master board 2 that performs bit allocation, quantization, and bit stream formatting for a maximum of five channels includes two processors -a, b ( A dual port RAM 27 for exchanging data between two processors such as a slave board structure, a 96K ROM 23 and a 64K RAM 24, clock circuits 25 and 26, an address decoding circuit And is connected to the dual port RAM of each slave board 1 via a backplane connector for data exchange with the slave board 1 (Figure 6).

One processor has been added to the previous master board and logic 28 to accept user requirements from the PC 5 has been added.

In addition, the size of the ROM and RAM has been increased to build a stand-alone system, and the processor to be mounted on the master board 2 has been expanded from a processor having a speed of up to 50 MHz to a processor such as a slave board 1 Dual clock circuits 25 and 26 are added to support up to 33MHz processors.

As a result of performing bit allocation, quantization and bit stream formatting process on a channel based on a 96 Kbps bit rate in the conventional master board, the execution time was about 12 msec.

In the multi-channel processing, since the master board 2 has to perform operations on data of all channels, the execution time increases proportionally as the number of channels increases.

It is concluded that the execution time of the 5-channel data having the bit rate per channel of 96 Kbps is estimated to be about 60 msec by simply estimating the execution time in one channel.

When the sampling frequency is 48KHz, one frame period is 24msec, so it is impossible to process multi-channel in real time with the existing master board which has one processor.

Therefore, since the improved master board 2 has two processors, it can be said that real time processing is possible up to 48 msec if each processor takes a routine of 24 msec.

In addition, replacing a 50MHz processor will result in 33/50 of the existing 33MHz processor for the same amount of processing.

In other words, the calculation of the amount of time that takes 60 msec from the 33 MHz processor can be processed within about 39.6 msec.

Therefore, numerical analysis that real-time processing of 5 channel input with one channel is possible becomes possible, and it can process multi-channel data with higher bit rate by improving software performance such as improvement of bit allocation process.

Since the master board 2 must process the results of up to five slave boards 1, information exchange with all the slave boards 1 must be possible.

Since the master board 2 is connected to the dual port RAM of each slave board 1 through the backplane 16, the dual port RAM of each slave board is used as its own local memory, And exchange information.

The master board 2 can operate as an independent system without recognizing the existence of the slave board 1 under the influence of the dual port RAM connecting the master board 2 and the slave board 1. [

In order to implement the MPEG-2 encoding algorithm, all the systems must have the same sync signal, so that the reset circuit and the clock circuit in the master board 2 are connected to the respective slave boards through the backplane 16.

For the final bit stream transfer, the serial port of the processor is connected to the serial-to-parallel converter of the IBM-PC via backplane 16 and another serial port is connected to the other interface circuit of the PC .

7 shows the connection between the processor-b 22, the interface board 4, and the PC 5 in the master board 2. As shown in Fig.

Using the serial port and timer inside the processor, data transfer of up to about 8Mbps is possible.

The master board 2 continuously receives the data from the slave board 1 at a predetermined time interval on a frame basis and processes necessary routines from the bit string formatting.

After finishing the bit packing, the last bit stream stored in the local RAM is transmitted to the PC 5 every frame.

The 50 MHz system clock input to the processor from the 50 MHz clock circuit 26 is software 16 times divided by a factor of 3.125 MHz and used as the transmission clock for the serial data transmission from the processor to the PC.

In addition, a frame synchronizing signal for 16-bit transmission is generated by using a timer inside the processor. At the same time, this signal was sent to the PC, which was used to store the data on the PC side.

Therefore, the processor sends DX0, the serial data pin, and FSX0, which sends the data to the PC side in 16-bit units, and the CLKX0 signal, which is the transfer clock, to the PC.

In the bit string receiving circuit in the interface board mounted on the SLOT (device for extending the parallel port) of the PC (5), two pieces of 8-bit serial-to-parallel converters are sequentially connected to convert serially transmitted data into 16-bit data do.

Since the FSX0 signal indicating that 16-bit data is input is used as the DMA request signal of the PC and the converted 16-bit data is stored in the memory, the processor makes a DMA request to the PC every time the 16-bit data is transferred , The PC obtains the 16-bit data transmitted only during the moment when the DACK (DMA Acknowledge) signal is generated and stores it in the hard disk.

For reference, connecting the decoders instead of the PC can apply the entire system without serial-to-parallel converter.

An important point in configuring the software of the MPEG-2 real-time encoder is to support the best sound quality, high bit rate, and various options under the performance of the implemented hardware.

To do this, it is necessary to apply a fast algorithm suitable for real - time implementation to each processing stage, optimize each subroutine, and then allocate appropriate work among the processors based on their execution time.

The existing encoder consisted of a slave board with two processors and a master board with one processor.

The subroutines to be processed by the master board 2 are not overloaded due to the expansion of the channels due to the independent processing of each channel, The problem occurred.

As described above, in order to expand the role of the master board (2) due to the multi-channel expansion, one processor was reinforced, but the calculation capability was insufficient to support a high bit rate to obtain a sufficient sound quality.

As shown in FIG. 8, the MPEG-2 audio encoding algorithm implemented in the present invention can roughly be divided into operations performed on the slave board 1 and operations performed on the master board 2.

The task assignment is performed according to whether each subroutine can be independently processed for each channel or whether all channel information can be processed together. In the former case, it is assigned to the slave board 1, (2).

Since the bit allocation process or the bit stream formatting process must have information of all channels together, it must be processed by the master board 2. Subband analysis process or psychoacoustic model is a process of obtaining results directly from input samples per channel It can be processed by the slave board 1.

When a task that can be processed by the slave board 1 is brought to the master board 2, the master board 2 has to process data of up to 5 channels sequentially, so that the calculation time is extended 5 times or more and the workload is burdened .

Therefore, in the slave board 1, it is necessary to process all possible work, and to pass only the minimum required result to the master board 2.

The bit allocation process, the bit allocation process, and the bit stream formatting process, which are required to have a psychoacoustic model result (SMR) of all channels, must be processed by the master board 2, The assignment time increases sharply with the number of channels being increased, so that even if two processors are used in the master board 2, real time processing is impossible.

We propose and apply a pre - allocation algorithm for efficient processing.

Table 1 shows the results of measuring the actual execution time of the bit allocation process by changing the number of channels.

Execution time of bit allocation process Run time msec load 1 channel, 96 Kbps 2.1 8.8% 2 channels, 192 Kbps 10.3 42.9% 4 channels, 384 Kbps 41.7 173.7% 5 channels, 640 Kbps 62.5 260.0%

1. Assigning and synchronizing workloads between processors

The most preferable direction when allocating a processor task for multi-channel processing is to finish the maximum possible work on the slave board 1, and the master board 2 collects data for each channel and packs only according to the frame format.

However, in the case of the bit allocation process, since the SMRs of all the channels are compared with each other and processed, it is forced to be processed by the master board 2.

The quantization which is performed differentially for the subband samples according to the bit allocation result can be performed independently for each channel but the synchronization between the master board 2 and the slave board 1 synchronization is difficult, so that the master board 2 processes it.

If the quantization is performed in the master board 2, parallel processing is not performed and all of the 5 channels must be sequentially executed. Therefore, the execution time is required to be five times longer than that in the slave board 1.

FIG. 9 is a flowchart illustrating a process of synchronizing a task allocated to each processor based on the task allocation shown in FIG. 8 and an interrupt between the processors.

From the input sample buffer to the slave DSP processor-b 12, one channel is shown, and the master board 2 processing is shown for five channels.

At this time, the size of each area represents the approximate execution time.

The processing up to the slave board (1) DSP processor-b (12) is processed in parallel in the same way for each input sample on the five slave boards (1).

The arrows on the drawing indicate that the execution of each subroutine is completed and an interrupt is generated by passing the data required for the next process to another processor through the dual port RAM.

During the processing of one frame, the input buffer is switched using two to receive the incoming input samples. If the subroutine processing of each processor does not finish before all 1152 next frame samples are received, a real-time processing failure occurs.

First, the processor-a 11 in the slave board 1 receiving the input sample first performs an FFT for use in the psychoacoustic model. A subband analysis filter bank process and a scale factor coding process, which can be started after 1152 samples are all received, are performed in the processor-a 11 in the slave board 1.

Since the psychoacoustic model of the processor-b 12 in the slave board 1 can be started only when the results up to the sound pressure for each subband obtained from the subband samples can be started, The processor-b 12 in the slave board 1 is interrupted after the completion of one frame operation of the slave board 11.

While the processor-b 12 in the slave board 1 performs the psychoacoustic model for the first frame, the processor-a 11 in the slave board 1 performs FFT and subband analysis for the second frame .

At this time, the master board 2 is in the standby state because the psychological acoustic model result SMR must be issued to start bit allocation.

If the processor-b 12 in the slave board 1 interrupts the master board 2 immediately after the psychoacoustic model is finished, the psychoacoustic model execution time of each channel is not the same (varies greatly up to 5 msec) It is possible to import incorrect SMR data.

In order to prevent such a problem, as shown in FIG. 9, there is a method of starting the bit allocation for the first frame by giving an interrupt to the master board 2 at the same time as the psychoacoustic model start timing of the second frame in which the psychoacoustic modeling of all channels necessarily ends Were used.

In this case, since the second subband analysis ends before the subband samples of the first frame are transferred to the master board 2 in the processor-a 11 in the slave board 1, the first subband samples are saved I took a separate action.

Since the dual-port RAM with the processor-a, b (11) 12 in the slave board 1 is connected to the processor-a 21 in the master board 2, a (21).

The sub-band samples, the scale factor index, the scale factor selection information, and the SMR from the processor-b 12 in the slave board 1 from the processor-a 11 in the slave board 1 of each channel, The processor-a 21 in the main processor 2 passes the SMR and scale factor selection information to the processor-b 22 in the master board 2 dedicated to bit allocation and enters the standby state until the next frame.

When the result data of each slave board 1 for the second frame is received, data necessary for bit allocation is transferred to the processor-b 22 in the master board 2, and the quantization and bit string formatting process for the first frame is performed .

The processor-a (21) in the master board (2) in which the execution of the first frame is performed after the data of the second frame arrives must have two data buffers.

When the processor-a 21 in the master board 2 allocates a bit that is a preceding task and the processor-b 22 in the master board 2 quantizes and packs, the subband samples for 5 channels and the scale factor index (1.6 msec) with the hassle of having to turn over the dual port RAM again.

The bit allocation process performed by the processor-b 21 in the master board 2 varies in the execution time according to the shape of the SMR curve.

When the operation of the processor-b 21 in the master board 2 ends, the processor-a 21 in the master board 2 generates an interrupt. At this time, depending on the frame, the processor- There may be a case where the PC transfer interruption of the PC and the interruption notification of the bit allocation result are in conflict.

When an interrupt conflict occurs, transmission is not properly performed only for the frame, and a phenomenon in which decoding is not performed occurs. In order to prevent such a problem, it is necessary to interrupt the interrupt from the other processor while transmitting the bit stream from the processor-a (21) in the master board 2 to the PC.

2. Routine processed by processor-a in the slave board

The slave board 1, which is designed to be capable of parallel processing with two processors, is responsible for subband analysis, scale factor coding, and psychoacoustic models for one channel input.

The execution times of the subroutines processed in the slave board 1 measured for task assignment are shown in Table 2.

The 'load' is the relative ratio to the length of one frame (1152 samples) section, 24 msec, when the sampling frequency is 48 KHz.

For real-time processing, the processing of the current frame must be completed before all the next frame inputs are input. Therefore, real-time processing is impossible if the load of one processor exceeds 100%.

Since the load of the entire routine to be processed by the slave board (1) is 166.7%, it is possible to perform real-time processing by properly allocating the work to the two processors.

Execution time of slave board processing routine Run time Processing CPU msec load Subband analysis 10.86 45.3% a Scale factor coating 2.18 9.1% a FFT & Power Spectrum 3.95 16.5% a Psychoacoustic model 17-23 95.8% b

A psychoacoustic model that requires the most execution time can only be performed by a power factor obtained from the FFT result and a scale factor obtained through a subband analysis process.

In consideration of this point, the processor-b 12 in the slave board 1 is assigned to perform only the psychoacoustic model, and the remaining subroutines are assigned to the processor-a 11 in the slave board 1. [

Since the subband analysis process and the scale factor coding are all completed, the psychoacoustic modeling process of the processor-b 12 in the slave board 1 can be started, so that the subroutine of the subroutine of the processor-a 11 in the slave board 1 The subband analysis process with the most load directly affects the coding delay.

The processor-a 11 in the slave board 1 receives the input PCM samples for each channel and performs a 1024-point FFT for the psychoacoustic model, a subband analysis filter bank, and a scale factor calculation and coding. The flowchart of the routine executed by the processor-a in the board 1 is shown in Fig.

That is, when the serial port is set after initializing the processor and the memory, the input sample is received. Since the processor-a 11 in the slave board 1 must continuously receive the input samples during each routine, You must have a separate interrupt routine for each incoming 44.1 kHz input.

Interrupt routines that receive input samples must not only minimize execution time, but also minimize the registers used.

The register used in the interrupt routine must be programmed considering that it can not be used in other routines on the processor-a 11 in the slave board 1. [

When 576 input samples are input, 448 samples of the past frame are added to perform a 1024-point FFT first. In order to synchronize with the master board processor, the subband samples, scale factor index, and scale factor selection information for the previous frame are stored in the local RAM, and then transferred to the dual port RAM after the FFT routine of the current frame ends.

Subsequently, the subband analysis filter bank process performs a subband analysis filter bank process when the input of all the 1152 samples of one frame size is completed. At this time, It takes 10.86msec, which accounts for 64%, which is 45.3% of the load for 24msec, which is the time to finish one frame processing.

Also, since the psychoacoustic model and the subsequent routines can be processed only after the subband analysis process is completed, it directly affects the total time delay of the encoding. In this implementation, the 32 × 64 matrix operation included in the subband analysis process, which takes much time to execute, is applied to the 32-point IDCT (Inverse Discrete Cosine Transform).

The scale factor is obtained from the subband samples after the filter bank analysis, and the scale factor selection information is also found.

In order to reduce the processing time in the master board 2, the processor-a 11 in the slave board 1 also processes the scaling of the subband samples.

When the process up to this point is completed, an interrupt is given to the processor-b 12 in the slave board 1 and the processor-a 21 in the master board 2 so that necessary data can be taken and the subsequent work can be processed .

The processor-a 11 in the slave board 1 again waits for the input samples to be completely filled in for the FFT processing for the next frame.

Hereinafter, a high-speed subband analysis algorithm will be described.

In the subband analysis filter bank process of MPEG, an input vector composed of 72 elements is formed by overlapping addition by dividing the block into 32 samples for 1152 samples of one frame input, and inputted into the subband analysis filter, the subband analysis result is 32 One subsample is obtained for each of the four subbands.

When the above process is performed 36 times, the analysis for one frame of 1152 samples (= 32x36) ends.

In order to perform the subband analysis, a 32x64 analysis matrix as shown in FIG. 11 must be passed. In the routine to be repeated 36 times for processing one frame, there is an analysis matrix requiring 32x64 = 2048 multiplication and addition operations. It becomes a burden.

Even if a processor DSP chip is used that can process the multiplication and addition in an instruction cycle, the execution time calculated theoretically for the analysis matrix operation is 2048 × 36 = 73728 cycle = 4.42 msec .

In this case, the elements (M [i, k]) of the analysis matrix of FIG. 11 are similar to kernal of the Discrete Cosine Transform (DCT). By using the symmetry of the cosine function, To a 32-point IDCT, various fast DCT operations can be used.

FIG. 12 shows a process of transforming an input vector. In the fast IDCT algorithm, a DCT kernel is similar to a real part of a DFT (Discrete Fourier Transform) kernel, and a method using an FFT (Fast Fourier Transform) Similarly, the method can be divided into a butterfly structure using a time axis or a frequency axis decimation.

As the use of DCT becomes wider, a variety of algorithms have been developed to quickly perform the transformation. We have experimentally confirmed that it is Lee's high-speed IDCT algorithm, which is the most suitable method to implement on the manufactured hardware.

When implementing algorithms with real hardware and assembler, it is necessary to consider not only the number of operations related to multiplication and addition necessary for the pure conversion process but also the difficulty of preprocessing and postprocessing, pipeline structure, etc. Therefore, none.

Lee's high-speed IDCT has no preprocessing process compared to other high-speed IDCTs and requires only input in bitreverse order. Most general-purpose DSP chips have an addressing mode that can easily implement them, and FFT It can not be thought of as an additional burden because it requires a bitreverse process.

However, the implementation problem of Lee's high-speed IDCT is that the butterfly structure is rather complicated and the output is not in the normal order, but requires many data pointers for proper conversion.

3. Routine (psychoacoustic model) processed in processor-b in the slave board

The flow chart of the routine executed in the processor-b in the slave board 1 dedicated only to the psychoacoustic model process for finding the SMR value for each subband is shown in Fig.

That is, when an interrupt from the processor-a (11) in the slave board 1 is received in the standby state after initializing the processor and the memory, the power spectrum as the FFT result and the maximum scale factor value per subband are received from the dual port RAM And stores it in the local RAM. Then, each subroutine is processed in the order shown in the flowchart.

In the psychoacoustic model process, the task of obtaining the entire masking curve occupies most of the execution time. In order to obtain the entire masking curve, there is a process of exponentiating the individual masking curves represented by the log values, This causes the execution time to be required.

Since there is no separate operator to perform logarithmic and exponential operations on a general-purpose DSP chip, a logarithmic and exponential operation requires a large amount of execution time because each operation must be replaced with a Taylor series approximation method.

As a technique for quickly performing log operations in the design of a DSP chip or an ASIC core, there are various methods such as a method of locating a log table in advance and substituting an operation, or a method of finding a sequence using a convergence condition of a sequence.

These are faster than using Taylor series, but they are not suitable for use in this encoder that uses a floating-point processor for high-quality sound.

In order to reduce the execution time of the log and exponent operations implemented in the present invention, the degree of the Taylor series is minimized within a range that does not cause an error compared with the result obtained on the PC. And by absorbing the operation process which was processed by the subroutine into the program, it is possible to eliminate the unnecessary initialization process, the time wasted by CALL (4 cycle) and RETURN (4 cycle) instruction and optimize the use of program cache memory, .

4. Routine performed on processor-a in the master board

The master board 2 receives a subband sample, a scale factor index, scale factor selection information, and a signal-to-mask ratio (SMR) as a result of psychoacoustic modeling from each channel slave board 1, Quantizes the subband samples based on the bit allocation information, and formats and transmits the bit streams.

Since the subroutines processed in the master board 2 must process information of all channels together with the subroutines in the slave board 1 performed for each channel, the processing time is increased as the number of channels to be encoded increases, Even if the bit rate increases in a few days, the processing time increases.

The SMR value is transferred to the processor-b 22 in the master board 2, which receives the processed data from each slave board 1 for each channel and performs bit allocation, and performs quantization and bit stream formatting from the bit- A flowchart of the processor-a 21 in the master board 2 is shown in Fig.

That is, after initializing the processor, it waits for an interrupt from the slave board 1, and at this time, it can receive an interrupt only from one slave board 1 due to the hardware structure.

Therefore, in order to receive interrupts after the psychoacoustic models having different execution times for each channel are completed for all channels, the interrupts are designed to be received at the start of the psychoacoustic model of the next frame as shown in FIG.

Upon receipt of the interrupt, the SMR value and SCFSI result of the psychoacoustic model of each channel are transferred to the processor-b 22 in the master board 2 and the other data is transferred to the local RAM.

At this time, the bit allocation process dedicated to the processor-b 22 in the master board 2 becomes the biggest obstacle for multi-channel processing with a large amount of computation.

The bit allocation process finds the minimum value among the MNRs of each subband and raises the bit allocation index in the subband by one step. Since the quantization steps are different according to subbands, different tables must be referred to.

The assembler can not have more than two-dimensional memory array, so the memory pointer can not have both the channel information and the subband information necessary for referring to the bit allocation table.

In order to find the minimum MNR value among the respective channel subbands in the one-dimensional memory array and to efficiently refer to the bit allocation table corresponding to the sub-band, the buffer of the MNR and the bit allocation index is configured as shown in FIG. When receiving SMR of the channel from the processor-b 12 in the board 1 and transferring it to the processor-b 22 in the master board 2, the processor-b 22 in the master board 2 Must be stored in local RAM.

In the case of the processor-a (21) in the master board (2), a buffer for each data is constituted by a method advantageous to final bit packing.

In case of 5 channels, MPEG-1 compatible 2 channels (Lo, Ro) are alternately packed in subband order and the remaining 3 channels (C, LS, RS) When transferring the subband samples, scale factor index, and scale factor selection information to the local RAM, it is advantageous to configure the buffer according to the order to be packed for MPEG-1 compatible 2 channels and extended 3 channels.

When the bit allocation indexes fetched from the processor-b 22 in the master board 2 are also stored in the same manner, the quantization process is not performed five times in order for the five channels, You only need to do it once for the channel.

Since the data fetched from the slave board 1 is to be used in the next frame, the memory of the processor-a 21 in the master board 2 is also divided into two buffers and the pointer must be switched.

When the quantization and grouping operations are completed to facilitate the formatting, bit heat packing operation is performed.

The bit stream of MPEG-2 can be divided into an MPEG-1 compatible bitstream beginning with a 32-bit header and an extension bitstream beginning with a 40-bit header.

If the bit rate does not exceed 384 Kbps, the extension bit string is not used because it can be accommodated in the MPEG-1 compatible bit string.

The bit stream generated by the encoder is cut in units of 16 bits for transmission to a PC or other transmission channel, and is stored in the RAM, and is transmitted on a frame basis.

Considering that the storage unit is 16 bits in the bit packing process, if the 'OR' instruction is properly used, the execution time can be improved.

The CRC search range of the extended bitstream header can not be determined before the expansion bitstream can be known only after one frame format is packed in units of 16 bits. Therefore, after the formatting of the extended bitstream is completed and the formatting of the entire bitstream by subtracting the header of the extended bitstream is completed, the extended bitstream header is added after the MPEG-1 compatible frame size is transmitted in the transmission process, .

In the practical application of the CRC routine, the remaining bit string obtained by subtracting the position of the 16-bit CRC code is completely packed, the bit string corresponding to the search range is sequentially searched, and the generated CRC-16 code is inserted into the bit string.

The formatted bit stream is transferred to the PC or other system using the serial port. In the serial transfer process, all external interrupts must be blocked to prevent errors in the bit stream.

After the transmission is completed, the bit allocation result value to be used in the next frame is received from the processor-b 22 in the master board 2, relocated to the local RAM for formatting, and then passed to the next frame.

5. The routine (bit allocation) performed in the processor-b in the master board 2,

The bit allocation process that requires the greatest execution time in the MPEG-2 encoding process is dedicated to the processor-b 22 in the master board 2.

A program flow chart of the processor-b in the master board 2 is shown in FIG.

That is, after the processor initializes, when an interrupt occurs from the processor-a 21 in the master board 2, data necessary for bit allocation is transferred to the local RAM and bit allocation for each subband of 5 channels is performed.

In the case of bit allocation performed while comparing SMR information of each channel, the execution time increases rapidly as the number of channels increases.

As shown in Table 1, when the processor in the master board (2) is tested, it takes 41.3 msec when the 4-channel 384 Kbps bit allocation routine takes 10.3 msec for the 2-channel 192 Kbps, and the processing time is increased 4 times. It takes 62.5 msec to perform bit allocation of 5 channels 640 Kbps corresponding to 128 Kbps per channel according to the algorithm of MPEG.

It can be said that it is virtually impossible to allocate multi-channel bit with high bit rate under the configured hardware environment because it is 2.6 times longer than the real-time processable time of 24 msec.

The reason why the execution time of the bit allocation process increases rapidly with the increase of the channel and the bit rate can be seen from the bit allocation algorithm of MPEG.

The MNR is obtained from the difference between the SNR determined according to the quantization level and the SMR resulting from the psychoacoustic model. One bit is allocated to the sub-band having the smallest MNR among the sub-bands, thereby improving the SNR of the band. The subband having the minimum MNR is found again from the curve, and one bit is allocated again.

Repeat this operation until all available bits within a frame are allocated

Average of bit allocation according to sound source Subband Average of bit allocation index Electronic Guitar Pop violin One 6.5 8.2 9.1 2 5.5 6.1 7.3 3 5.0 4.6 5.7 4 6.0 6.2 7.2 5 5.6 5.9 7.2 6 5.3 5.7 6.7 7 5.1 5.4 5.5 8 4.9 5.1 5.3 9 5.0 5.0 4.8 10 4.7 4.5 4.5 11 4.9 4.4 4.0 12 4.3 4.2 4.5 13 4.9 4.1 3.0 14 4.1 3.6 2.3 15 3.2 3.0 1.6 16 3.1 2.6 0.8 17 2.6 1.7 0.2 18 1.2 0.7 0.0 19 0.3 0.2 0.0 20 0.0 0.0 0.0 21 0 0 0 22 0 0 0 23 0 0 0 24 0 0 0 25 0 0 0 26 0 0 0 27 0 0 0

The basic algorithm is to perform.

At this time, since the bits used for allocation are not used for each channel, the MNRs of all the channels and all the subbands are compared together. Therefore, when the number of channels is increased, the compared subbands are increased in multiples.

The processor, which is a general-purpose DSP chip, has no separate instruction to find the minimum value, so it must be implemented using the comparison instruction in the process of finding the minimum MNR. Since the branch instruction after the comparison breaks the pipeline structure, which is the greatest advantage of a high-speed DSP chip, it has a cycle that is four times longer than a general instruction.

Therefore, if a lot of comparison instructions are entered, the real-time processing becomes very disadvantageous. On the other hand, as the bit rate increases, the number of bits to be allocated per frame increases accordingly, resulting in an increase in the number of bit allocation loops.

Comparing the above two channels at 192 Kbps and 384 Kbps at four channels, the channel and the bit rate are doubled, so that the execution time can be quadrupled.

Software implemented in the present invention solves the problem of run-out time through a pre-allocation algorithm.

The MNR value is pre-allocated by a predetermined amount to the MNR value before the bit allocation of the transmitted 5 channels, the MNR is compensated in accordance with the allocated MNR value, and then the bit allocation task unique to the MPEG is performed for the remaining bit amount.

Also, in order to reduce the comparison in the bit allocation process, the loop which eliminates the unnecessary comparison commands in the initial allocation period is turned first, and finally, the correct bit allocation is performed to finish the program. When the bit allocation operation is completed, an interrupt is given to the processor-a (21) in the master board 2 to notify the completion of the operation.

Hereinafter, the pre-bit allocation algorithm will be described.

First, in order to realize the bit allocation process of 62.5 msec at 5 channel 640 Kbps in real time, a method of simplifying the bit allocation algorithm should be considered.

In the case of MPEG, the bit allocation information is included in the bit stream and transmitted to the decoding end, so that the encoder is given some degree of autonomy in bit allocation within a given bit rate. In order to reduce the bit allocation work, it is necessary to statistically analyze the number of bits per subband allocated on the basis of the psychoacoustic model result SMR.

In order to improve performance time by actively utilizing the statistical characteristics of bit allocation, an average allocation table is created through actual bit allocation routines for various types of music sources, and the number of bits that are always allocated to all sources is preallocated And then applying the actual bit allocation algorithm only for the remaining number of bits.

That is, the number of bits that are always allocated is an algorithm that allocates only the remaining bits in advance so that the loop is not repeated unnecessarily every frame. Table 3 and Figure 17 show the average bit allocation index distributions of each subband allocated to the sound sources having different sound pressure distributions at a bit rate of 128 Kbps per channel.

The data was obtained as the average of the bit allocation indices received from the decoder after actually encoding 3000 frames for each sound source.

Since the bit allocation indices of the subbands 1 to 3 have different quantization levels from those of the remaining subbands, the number of bits allocated to the first to third subbands is 2 bits per sample larger than the same index in the remaining subbands Value.

Experimentally selected three sound sources are electronic guitar, broadband sound source, violin with high sound pressure in low frequency band, and pop music with the most general sound pressure distribution with various combinations.

17, the basic type of the bit allocation distribution does not vary significantly with respect to different sound sources, and it is known that many bits are allocated mainly in the low frequency band and are reduced in the high frequency region, (In the case of the 20 < th > sub-band, one bit is allocated 3 times per 100 frames in the electronic guitar sound source).

In the case of the violin, the allocation is very high in the low-frequency subbands 1 and 2, but is not allocated almost from the 17th subband.

The electronic guitar shows a relatively flat allocation distribution from the third subband to the thirteenth subband, but gradually decreases from the 14th subband.

Pop music has an intermediate form of the allocation curves of two other sound sources.

Based on the average bit allocation distribution of the three sound sources, the number of bits to be pre-allocated to each sub-band is determined so as to enable real-time processing (Table 4, FIG. 18).

Pre-allocated bit index Subband Bit allocation index 1,2 6 3 4 4,5,6 5 7.8 4 9, 10, 11, 12 3 13,14 One 15-27 0

This value is experimentally determined based on the experimental results of Table 3 so that the execution time load does not exceed 100%, and can be used only in the encoding process having a bit rate of 128 Kbps per channel.

In order to reduce the number of repeated loops of the MPEG bit allocation algorithm, and to reduce the number of subbands to be compared, the 22-27th subband, which is not bit-allocated to any sound source at a bit rate of 128 Kbps per channel, To be excluded from the allocation comparison object. As a result of combining the above two methods, the bit allocation process, which took 62.5msec at 640Kbps in 5 channels, was processed within 17.5msec, and real-time implementation became possible. For other bit rates that can not be processed in real time in the same way, the average of the bit allocation indices can be obtained and appropriately pre-allocated to adjust the execution time.

Hereinafter, the performance of the pre-bit allocation algorithm is verified as follows.

Let's examine the performance of the bit allocation algorithm using the pre-quota selected in Table 4 by changing the MNR.

The Mask-to-Noise Ratio (MNR) is obtained from the difference between SNR and SMR, and the noise at this time is a quantization noise.

The meaning of the MNR is a mask to noise ratio. If the MNR value of a certain subband is 0 dB or more, the quantization error in the subband is masked and can not be heard by the human ear. Therefore, assuming that the SMR value obtained by the psychoacoustic model is correct, if the MNR of all the subbands is made to be more than 0 dB, the restored sound having no perceptual discrimination with the original sound can be obtained.

Since the bit allocation process is to increase the MNR of each band to a maximum of 0 dB or more, if the final MNR result processed by the above method is satisfactory, it is not a problem even if the bit allocation algorithm and original allocated index are slightly different from each other Do not.

19 is an MNR curve before three bit allocation for an arbitrary audio signal having different sound pressure distributions at 48 KHz.

As described above, since the band width of the electric guitar sound source is wide, subbands having MNRs of 0 dB or less are widely distributed, and since the majority of signals of the violin sound source are collected in the low frequency band, the MNR value is less than 0 dB, . In the case of the first frame signal, because of the zero padding considering the time delay of the filter bank, the signal sound pressure is low and the MNR curve also has a gentle shape.

It can be seen that MNR should be improved to 0dB or more by appropriately allocating bits for 1 ~ 12 subbands for violin and 1 ~ 19 subbands for electric guitar.

Each time the number of bits allocated to each subband sample increases by one bit, the MNR synergistic effect of about 6dB can be obtained. Ideally, the final MNR curve should have a flat shape.

Now let's see how each MNR curve changes through pre-allocation.

20, 21, and 22 show changes in the MNR curve when the MNR curves in FIG. 19 are preallocated by the subbands as shown in Table 4, and when the final bit allocation process is completely finished.

20, the MNR is increased up to the 10 dB line in the 5 ~ 8 subbands, and then the bits are mainly added to the 9 ~ 19 subbands through the residual bit allocation process.

It can be seen that the MNR value increased through pre-allocation does not become too high and is well suited to the average level after final allocation. After finishing the bit allocation, the MNR has a flat distribution of about 10dB, which shows that there is enough room for the bit rate.

In the case of the MNR for the first frame of FIG. 21, 1 to 6 subbands are completely allocated through the pre-allocation, and the MNR of the intermediate subband part is reinforced through the residual bit allocation. The final MNR curve is equilibrated at about 7dB, and there is no MNR value that remains below 0dB, so the quantization noise is completely masked.

In the case of the violin sound source of FIG. 22, the MNR value near the low frequency is still less than 0 dB even after the pre-allocation, contrary to the previous two cases, so that the residual allocation is centered around the low frequency band, MNR value. The average MNR value is the highest with 15dB or more, which is the best sounding source.

In three cases, it can be verified that the pre-allocated bit amounts selected in Table 4 are appropriate for various sound sources. More pre-bit allocation in the low-frequency band will be beneficial for sources such as violins, but in the case of electronic guitar sources, the MNR in the low-frequency band will be too high.

On the contrary, if more pre-allocation is made to the intermediate frequency band, there may be a case where the number of bits in the low frequency band is insufficient for a sound source such as a violin.

Many experiments on various sources show that the MNR curve before bit allocation does not deviate significantly from the three types of Figure 19. Even if the MNR curve is out of the above type due to a particular sound source, the final MNR curve can always be greater than 0dB over the entire band because there is enough room to allocate at a bit rate of 128Kbps per channel.

As a result of comparing the encoded bit quality of the original bit allocation method and the pre - allocation method for different types of music, it was found to be almost indistinguishable.

6. Experiments and Results

The performance evaluation of the MPEG-2 real-time audio encoder software implemented in the present invention can be divided into evaluation of execution time for each subroutine and evaluation of sound quality when the final bit stream is decoded.

Connect THX processor, which provides 2 channel CD player and 5 channel analog sound source to A / D converter (analog-to-digital converter), and connect output of A / D to serial port of each slave board, .

D converter (7) and the processor serial port of the slave board (1) have been used for the experiment. The A / D converter has a 6-channel A / It is designed to enable direct connection without additional circuit.

Since the analog output as a sound source can not provide a signal indicating the start and end of the music, the range of the music to be encoded is adjusted by using the reset switch of the encoder.

To obtain 16-bit PCM formatted data, connect the serial data line, frame sync, and transmit clock signals to the appropriate input pins on the processor.

MPEG-2 supports up to 5.1 channels, but it supports various channel configurations such as basic 2-channel (L, R) or 3-channel (L, R, S)

Since each slave board 1 processes only one channel regardless of the channel configuration, it can be used without changing the program, but the master program must be changed according to the channel configuration and the bit rate.

Since the processor does not have a separate device for measuring the program execution cycle, the execution time of each subroutine is measured by using the number of input samples that come in at certain time intervals.

The execution time can be obtained by converting the difference in the number of incoming input samples before and after execution of the subroutine to be measured into time.

When the sampling frequency of the input sample is 48 KHz and the clock frequency of the system is 33 MHz, the relationship between the number of samples and the execution time is as follows.

▶

▶

▶ 1 Sample ≒ 343.7 Cycle

▶ 1 Frame = 1152 Samples = 1152 * 20.83? S? 24.0 msec

The optimized execution times of the subroutines processed in the slave board 1 of the system software implemented in the present invention are shown in Table 5. For subroutines with non-deterministic execution times, the time is expressed as the longest time.

Execution time of slave board processing routine CPU Subroutine Run time (msec) load a Subband analysis 6.22 25.9% Scale factor coating 1.81 7.5% FFT & Power Spectrum 3.65 15.2% CPU-a Total 11.68 48.7% b Psychoacoustic model 18.28 76.2% Total execution time of Slave 29.96 124.9%

The subband analysis process, which replaces the analysis matrix using Lee's fast DCT, has been performed in only 6.22msec, which is 57.3% of the existing execution time of 10.86msec, showing the most improved performance.

At this time, the subroutines executed in the processor-a 11 in the slave board 1 can be said to be faster than the measured times because the interrupt routine for continuously receiving the input samples is performed during the processing.

The psychoacoustic model of the processor-b 12 in the slave board 1 improves the execution time of 3.56 msec, for example by optimizing the use of assemble instructions. The sum of the 'load' of the subroutines processed in the processor-a 11 in the slave board 1 after the improvement does not exceed 50%.

Therefore, if the psychoacoustic model of the processor-b 12 in the slave board 1 is further improved to reduce the load to 50% or less, the use of the processor of the slave board 1 can be reduced to one.

Since the amount of data to be processed varies depending on the number of channels and the bit rate, the routines executed in the master board 2 have different execution times. In the bit allocation process, which takes the longest execution time according to the channel increase, the execution time can be adjusted so that real-time processing can be performed through pre-allocation.

For the processing up to 2 channels, the existing MPEG bit allocation algorithm is used and the pre-allocation is appropriately performed according to the bit rate from 3 channels or more, since real-time processing is possible without using the pre-allocation regardless of the bit rate.

Table 6 shows the optimized execution times of the routines performed on the master board 2 for two channels of 192 Kbps and five channels of 640 Kbps.

Since the execution time of the bit allocation process can be controlled by pre-allocation, and the execution time of the remaining routines is not changed by the bit rate, the implemented encoder can perform real-time processing on virtually all bit rates.

Execution time of master board processing routine Processing CPU Subroutine 2 channels, 192 Kbps 5 channels, 640 Kbps (msec) load (msec) load b Bit allocation 7.03 29.3% 17.52 73.0% a Quantization 1.33 5.5% 3.42 14.3% Bit column format 2.38 9.9% 6.21 25.9% Bit stream transmission 2.31 9.6% 7.52 31.3% CPU - a Total 6.02 25.0% 17.15 71.5%

The execution time from the arrival of the input samples of the first frame to the moment when the last bit sequence goes out through the four processors can be calculated by looking at the synchronization process between processors in Fig.

The start of work for the first frame of the processor-a 21 in the master board 2, which is the processor in which the final bit string is transmitted to the PC, It is synchronized with the end of band analysis.

Therefore, the total coding delay until the first bit is input and the last bit stream is transmitted is calculated as follows.

Coding Delay = (1 frame interval; the time when the input buffer is filled) + (2 frame intervals)

+ (Subband analysis interval) + (Master-a interval interval)

= 24.0 + 2 * 24.0 + (4.64 + 0.37) + 17.15

= 94.16 (msec)

The bitstreams generated by the real-time encoder implemented in the present invention are stored in a hard disk and then decoded by an MPEG multi-channel standard decoding program written in C language to verify the performance.

When the bit rate per channel is 64Kbps, it is easily felt that the sound quality is damaged in the decoded music. However, at 96Kbps, there is not a big difference compared to the original sound source such as violin and cello. When the bit rate per channel is 128 Kbps, the restored sound is hardly distinguishable from the original sound.

If the bit rate increases further, it is hard to feel that the sound quality distortion caused by the manufactured A / D converter, the speaker and the amplifier used for reproduction is much worse than the sound quality loss caused by the encoding, .

23 shows the final MNR curve when bit allocation is performed at 64, 96, and 128 Kbps based on the SMR curve obtained for the same input sample at the 44.1 KHz sampling frequency. As the bit rate increases, it can be seen that the MNR increase is about 6-10 dB in the bit allocated band.

At 64 Kbps, the MNR of all allocated bands still does not reach 0dB, indicating that there is quantization noise that is not masked.

At 96 Kbps, it can be seen that all of the allocated bands are approaching 0 dB but there are subbands that are not completely masked yet.

At a bit rate of 128Kbps, the MNR of the entire band is distributed over 5-10dB, so that it can theoretically say that the quantization noise of all subbands is masked by the signal.

By comparing the final MNR curve according to the bit allocation in FIG. 23, it is possible to explain the difference in sound quality according to the bit rate of the encoded bit stream. The bit rate of 128 Kbps per channel, which does not make a difference between the original sound and the subjective sound quality, is an average of 2.67 bits per sample, and has a compression performance of about 6: 1 for a 16-bit quantized PCM sample.

The 5-channel PCM samples decoded and stored on the hard disk are sent to a D / A converter (Digital-to-Analog Converter) through a manufactured serial transmission card, converted into analog signals, and outputted to an amplifier to evaluate sound quality.

As described above, since the encoder software implemented in the present invention is processed in real time from the 48 kHz sampling rate of the MPEG-2 layer 2 to 5.1 channels and 640 Kbps, all the bit rates, sampling rates, and channel combinations below it are possible As a method to more effectively perform channel coding, it supports dynamic transport channel switching and phantom coding of a central channel in the composite coding proposed in MPEG-2.

High speed and optimization of each subroutine can be processed by one processor only when up-clocking the slave board execution routine processed by two processors to 50MHz, and multi-channel processing Speed algorithm can be processed by only two processors. If the number of used processors is reduced, not only a gain in manufacturing cost but also a coding delay, which is an important problem in application of HDTV broadcasting, can be reduced. Since the program was developed using a general-purpose DSP processor, it can be used for applications such as other processors and ASICs.

Claims (8)

Five slave boards 1 for receiving the respective channel audio data and performing subband analysis and psychoacoustic modeling; A master board 2 for channel matrixing, bit allocation, quantization, bit packing, and interface with the PC 5; A backplane board 3 for connecting the slave boards 1 to the master board 2; An interface unit 4 for transmitting data transmitted from the master board 2 to the bit stream to a personal computer; A personal computer 5 for decoding the bit stream transmitted by the MPEG standard decoding program to check the performance of the encoding system; And a 6-channel A / D converter 7 for converting an audio signal, which is analog-outputted from a source 6 such as a CD player or a DAT, into 16-bit PCM digital data and transmitting the digital data to the slave boards 1 Realtime processing device of HDTV audio coder featuring. The system of claim 1, wherein the slave boards (1) comprise two processors-a, b (11), 12, a dual port RAM (13) for transferring information between the processors, A dual port RAM 15 for data transfer between the slave board 1 and the master board 2 and a decoding circuit 16 for decoding the memory address to change the number of weights, Wherein the real-time processing device of the HDTV audio coder is characterized by comprising: The master board 2 according to claim 1, wherein the master board 2 comprises two processors -a, b (21) 22 for performing bit allocation, quantization and bit column formatting for a maximum of five channels, , A 64K RAM 24, a reset circuit and clock circuits 25 and 26, an address decoding circuit and a slave board 1 through a backplane connector for data exchange between the slave board 1 and the dual port RAM 27) for real-time processing of the HDTV audio coder. Processing the audio data in a parallel structure; A step of fast processing the subband analysis with the FAST DCT algorithm to increase the calculation speed; Exchanging data using a dual port RAM between the slave boards; Transferring the results of each slave board to the master via the dual port RAM; The master board hardware receiving data from the slave board and collectively processing the data; Using the efficient algorithm for bit allocation in the master board hardware; And finally through an interface with a PC. The method as claimed in claim 4, wherein the step of using the dual port RAM between the slave boards comprises the steps of processing from the processor-a to the subband in the slave board, then passing the result to the processor-b in the slave board using the dual port RAM, And performing a real-time processing method of the HDTV audio coder. The method as claimed in claim 4, wherein the step of transferring each of the slave board results to the master board hardware using the dual port RAM includes collecting respective audio data that have already been subjected to subband analysis and psychoacoustic modeling together and performing bit allocation and quantization, And performing a formatting process for the HDTV audio coder. The method as claimed in claim 4, wherein the efficient algorithm used at the time of bit allocation in the master board hardware includes statistically measuring the degree of bit allocation for each subband, allocating a number of allocated bits of the allocated subband in advance, Wherein the real-time processing method of the HDTV audio encoder is characterized in that the real-time processing method of the HDTV audio encoder is reduced. 5. The method as claimed in claim 4, wherein the interface to the PC finally sends the encoded bit stream to the decoder, creates the interface card so that it can be sent to the PC, and processes the encoded bit stream together with other data in the PC Wherein the real-time processing method of the HDTV audio encoder is characterized by comprising: