KR19990081025A - Liquid crystal display - Google Patents

Abstract

In the thin film transistor substrate according to the present invention, a gate line and a data line are formed to cross each other to define a pixel region. In this case, the data line includes an external data line having a protrusion formed wider than another portion inside the pixel area and an internal data line formed narrower than the external data line and formed in a boundary line of the external data line. In the pixel area, pixel electrodes in which boundary lines adjacent to the external data lines are formed at regular intervals along the boundary lines of the external data lines are formed. At this time, in order to accurately measure the distance between the pixel electrode and the data line, the distance between the boundary line of the pixel electrode and the boundary line of the protrusion among the external data lines adjacent thereto, and the distance between the boundary line of the protrusion and the internal data line adjacent to the protrusion is 2 μm or more. desirable. This is because the distance limit of the accuracy of the interval measuring device that measures the gap with the waveform appearing through the step is about 2 μm, so it is necessary to create a step with a larger gap.

Description

Liquid crystal display

The present invention relates to a liquid crystal display device.

In general, a liquid crystal display device has a structure in which a liquid crystal is injected between two substrates on which an electrode is formed, and a light transmission amount is controlled by adjusting the intensity of a voltage applied to the electrode.

In the liquid crystal display, each unit pixel is made of a transparent conductive material, and a pixel electrode for performing a display operation is formed. The pixel electrode is driven by a signal applied through a wiring. The wiring includes a gate line and a data line crossing each other to define a unit pixel region, and the wiring is connected to the pixel electrode through a switching element such as a thin film transistor. . At this time, the switching element controls the image signal from the data line transmitted to the pixel electrode via the scan signal from the gate line.

In this case, in order to maximize the aperture ratio of the liquid crystal display device, the pixel electrodes and the wirings are formed close to each other, and a desired color is displayed by applying gray voltages corresponding to red, green, and blue to the three unit pixels. It is effective to minimize the width of the data line.

In addition, in order to prevent disconnection of the data line, auxiliary wiring made of silicon is used together. Here, the auxiliary wirings are formed simultaneously when forming the semiconductor layer of the thin film transistor.

On the other hand, when a stepper is used as an exposure machine in a photographic process during the manufacturing process, one display area is divided into several blocks to perform an exposure process. Even though the exposure machine is precise, alignment errors occur. In particular, when the pixel electrode and the data line are formed in different layers, the exposure process is different from each other, so that the gap between the pixel electrode and the data line is larger than the designed value. In particular, the distance between the pixel electrode and the data line is different in units of blocks, which causes a difference in parasitic capacitance generated between the pixel electrode and the data line in units of blocks. This difference in parasitic capacitance varies the pixel potential applied to the pixel electrode differently through the coupling effect.

Among the methods for minimizing the range of such variation, the most basic method is to measure the distance between the pixel electrode and the data line and correct the coordinates of the exposure machine based on this distance.

In practice, the gap between the pixel electrode and the data line is managed within the allowable value through this method.

In order to measure the distance between the pixel electrode and the data line, a critical dimension meter is used, which is a device that generates a waveform at a portion having a step by irradiating a laser.

However, as the distance between the pixel electrode and the data line and the width of the data line become narrow, it becomes difficult to measure them. This will be described with reference to FIGS. 1 and 2 as follows.

1 is a diagram illustrating a distance between a data line and a pixel electrode in a thin film transistor substrate according to the related art, and FIG. 2 is a waveform diagram when measuring a gap between the data line and a pixel electrode.

As shown in FIG. 1, the pixel electrode 1 and the data line 2 are formed adjacent to each other, and an auxiliary line 3 made of silicon is formed in the width of the data line 2.

However, as the distance between the pixel electrode 1 and the data line 2 and the width of the data line 2 become narrower, the laser line is irradiated using a distance measuring device. In the irradiation area A, the boundary line of the pixel electrode 1 is provided. Not only the boundary line 2a of (1a) and the data line 2 but also the boundary line 3a of the auxiliary line 3 adjacent to the pixel electrode 1 are included. Therefore, waveforms 1b, 2b, and 3b as shown in FIG. 2 appear, and at this time, the interval measuring device recognizes the waveform 3b as noise due to the step difference of the auxiliary wiring 3, and thus the pixel electrode 1 The distance between the data line and the data line 2 cannot be measured accurately.

SUMMARY OF THE INVENTION An object of the present invention is to provide a thin film transistor substrate capable of accurately measuring the distance between a pixel electrode and a data line even when the distance between the pixel electrode and the data line and the width of the data line are narrowed.

1 and 2 illustrate a method of measuring a gap between a data line and a pixel electrode in a thin film transistor substrate according to the related art.

3 is a layout view illustrating a structure of a unit pixel in a thin film transistor substrate according to an exemplary embodiment of the present invention.

4 is a cross-sectional view illustrating IV-IV in FIG. 3,

5 and 6 illustrate a method of measuring a gap between a data line and a pixel electrode in a thin film transistor substrate of the present invention.

In order to solve this problem, a gate line and a data line are formed on the thin film transistor substrate according to the present invention so as to cross each other to define a pixel region. In this case, the data line includes an external data line having a protrusion formed wider than another portion inside the pixel area and an internal data line formed narrower than the external data line and formed in a boundary line of the external data line. In the pixel area, pixel electrodes in which boundary lines adjacent to the external data lines are formed at regular intervals along the boundary lines of the external data lines are formed.

Here, the interval between the boundary line of the pixel electrode and the boundary line of the protrusion among the external data lines adjacent thereto and the boundary line between the boundary line of the protrusion and the internal data line adjacent to the protrusion is preferably 2 μm or more.

The internal data line may be formed of the same material as the channel layer of the thin film transistor formed at the intersection of the gate line and the data line, and may be formed of the same transparent conductive material as that of the pixel electrode. It may be formed of the same low resistance metal material.

Next, embodiments of the liquid crystal display according to the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art to which the present invention pertains can easily practice the present invention.

First, a structure of a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention will be described with reference to FIGS. 3 and 4.

3 is a layout view illustrating a structure of a unit pixel in a thin film transistor substrate according to an exemplary embodiment of the present invention, and FIG. 4 is a cross-sectional view illustrating IV-IV in FIG. 3.

A gate pattern including the gate electrode 210 and the gate line 200 including the gate electrode 210 is formed in the horizontal direction on the transparent insulating substrate 100. A gate insulating layer 300 is formed on the gate patterns 200 and 210, and a hydrogenated amorphous silicon (a-Si: H) layer 400 and n + are disposed on the gate insulating layer 300 on the gate electrode 210. Hydrogenated amorphous silicon layers 510 and 520 heavily doped with impurities are formed on both sides of the gate electrode 210. Here, the amorphous silicon layer 400 is a channel layer of the thin film transistor, and the n ⁺ amorphous silicon layer 510 has a function as a contact resistance layer for reducing the contact resistance between the amorphous silicon layer 400 and the metal electrode. Instead of silicon, other materials may be used that can act as channels.

On the gate insulating layer 300, a data line 600 vertically intersecting with the gate line 200 and defining the pixel region P is formed vertically, and a source electrode 610 which is a branch of the data line 600 is formed. A doped amorphous silicon layer 510 is formed on one side, and a drain electrode 620 is formed on the doped amorphous silicon layer 520 opposite to the source electrode 610 with respect to the gate electrode 210. .

Here, the data line 600 is formed of internal and external data lines 601 and 602, and the external data line 602 is formed to have a wider width than the internal data line 601 to form the internal data line 601. Covering. In this case, the internal data line 601 is an auxiliary line which serves to prevent the external data line 602 from being disconnected. The internal data line 601 may be formed of amorphous silicon, which is the same material as the channel layer of the thin film transistor, and is a transparent conductive material. (indium tin oxide), low-resistance aluminum or alloys thereof.

At this time, the inner data line 601 is formed to have a constant width, but the outer data line 602 has a protrusion M formed to be wider than other portions. This is to accurately measure the distance between the pixel electrode and the external data line 602 formed later. This will be described later in detail.

A passivation layer 700 is formed on the data patterns 600, 610, and 620 and the amorphous silicon layer 400 not covered by the data pattern, and the passivation layer 700 has a contact hole exposing the drain electrode 620. 710 is formed.

Lastly, a pixel electrode 800 connected to the drain electrode 620 through the contact hole 710 and formed of a transparent conductive material such as ITO is formed in the pixel area P on the passivation layer 700. In this case, the boundary line 800a of the pixel electrode 800 adjacent to the data line 600 is formed along the boundary line 602a of the external data line 602 adjacent to the pixel electrode 800.

Although the pixel electrode 800 is formed on the passivation layer 700, the pixel electrode 800 may be formed directly on the gate insulating layer 300.

The reason for forming the protrusion M in order to accurately measure the distance between the pixel electrode 800 and the data line 600 will be described below.

In general, because the step occurs in the boundary area, the gap between the step and the boundary is considered to be the same.

When designing the thin film transistor substrate according to the present invention, the gap between the pixel electrode 800 and the data line 600 is narrowed and the line width of the data line 600 is minimized to improve the aperture ratio. As a result, the distance L between the boundary line 602a of the external data line 602 and the boundary line 601a of the internal data line 601 also becomes closer.

The parasitic capacitance generated between the pixel electrode 800 and the data line 600 depends on the distance between the boundary line 800a of the pixel electrode 800 and the boundary line 602a of the external data line 602. The gap between the pixel electrode 800 and the external data line 602 is measured through the measurement. In this case, when the distance L between the two boundary lines 602a and 601a is smaller than 2 μm, noisy is generated in the interval measuring device at this portion, and thus the accurate interval cannot be measured. Therefore, in order to accurately measure the distance between the pixel electrode 800 and the data line 600, the protrusion M is disposed on the external data line 602 so that the two boundary lines 602a and 601a have a distance L of 2 μm or more. It is desirable to form a part.

This will be described in detail below.

FIG. 5 is a view illustrating the protrusion M in detail in FIG. 3, and FIG. 6 is a waveform diagram measured at the protrusion M through the gap meter of FIG. 5.

The interval measuring device is a device that irradiates a laser beam to a fine pattern, converts laser diffraction generated at the stepped portion of the fine pattern into an electrical signal, outputs it as a waveform, and calculates an interval between the waveforms. However, there is a limit of precision in accurately irradiating a laser beam to a desired area, which is about 2 μm. Therefore, if there are other steps in addition to the step to be measured within the limit area, no noise is generated in this part, and thus the gap measurement is impossible.

Accordingly, in the thin film transistor substrate according to the present invention, the protrusion M is formed on the external data line 602 so that the distance between the two boundary lines 601a and 602a is 2 μm or more, and the pixel electrode 800 and the data line 600 are formed. The laser beam is irradiated to measure the interval L of. Then, as shown in FIG. 5, the irradiation area A may be adjusted to include only the boundary line 800a of the pixel electrode 800 and the boundary line 602a of the external data line 602.

In addition, in order to accurately measure the distance between the pixel electrode 800 and the external data line 602, the distance between the boundary line 800a of the pixel electrode 800 and the boundary line 602a of the protrusion M of the external data line 602. Naturally, it should be designed to always be 2μm or more.

The gap measurement between the pixel electrode 800 and the data line 600 using the gap gauge is performed after forming the photosensitive resist pattern formed to pattern the pixel electrode 800. Next, a value to move the exposure machine based on the spacing design value is calculated and input to the exposure machine, the photosensitive resist pattern is removed, and the photosensitive resist is coated again. Subsequently, the exposure is performed using an exposure machine based on the value to be moved, the coated photosensitive resist is developed, and then again, the interval measuring device is used to check whether the desired interval is reached. This process may be repeated until the pixel electrode 800 can be formed at intervals within a desired error.

Therefore, in the thin film transistor substrate according to the present invention, the gap between the pixel electrode and the data line can be precisely measured while improving the aperture ratio. As a result, a display device having good image quality may be implemented by correcting a gap between the pixel electrode and the data line.

Claims (6)

Gate Line, An external data line defining a pixel region crossing the gate line and having a protrusion formed wider than another portion inside the pixel region; An internal data line formed to be narrower than the external data line and formed in a boundary line of the external data line; A thin film transistor substrate comprising a pixel electrode formed in the pixel area, wherein a boundary line adjacent to the external data line is formed at regular intervals along a boundary line of the external data line. In claim 1, The thin film transistor substrate of claim 2, wherein a distance between a boundary line of the protrusion adjacent to the pixel electrode and a boundary line of the internal data line is 2 μm or more. In claim 1, The thin film transistor substrate of claim 2, wherein a distance between a boundary line of the protrusion and a boundary line of the pixel electrode adjacent to the protrusion is 2 μm or more. In claim 1, The internal data line is a thin film transistor substrate made of amorphous silicon. In claim 1, The internal data line is a thin film transistor substrate made of ITO, a transparent conductive material. In claim 1, The internal data line is a thin film transistor substrate made of aluminum or an alloy thereof.