KR19990066259A - Binary Convolutional Encoder of Cable Modem Downstream System TCM Encoder - Google Patents

Abstract

The present invention relates to a binary convolutional encoder having characteristics of G1 (= 010101), G2 (= 011111) generation code, 16 states, and 1/2 bit rate in a cable modem downstream system TCM encoder.

The apparatus of the present invention is composed of four memories 51 to 54 connected in series and four exclusive logic operation units 55 to 58. Each of the memories 51 to 54 delays the input signal by one clock, The first and second exclusive logic operation units 55 and 56 perform an exclusive logic operation on the input signal of the encoder, the output of the second memory 52, and the output of the fourth memory 54 according to the G1 generation code. To output the Y1 signal, and the third and fourth exclusive logic calculators 57 and 58 perform an exclusive logic operation on the output of the first memory 51 and the output of the third memory 53, and again perform the second exclusive logic sum. An exclusive logical sum operation with the output of the calculating section 56 outputs the Y2 signal.

Therefore, the present invention does not design the exclusive logic operator for convolutional coding separately for the output signals Y1 and Y2, and uses the exclusive logic operator for Y1 again for the calculation of Y2, thereby making the binary convolutional encoder with only minimal components. There is an effect that can be designed efficiently.

Description

A binary convolutional coder of TCM encoder in a cablemodem downstream system

The present invention relates to a binary convolutional encoder provided in a TCM encoder of a cable modem downstream system and performing binary convolutional coding on an input signal according to characteristics of a TCM encoder.

Cable modem network is a network system of remote access area such as Integrated Information Communication Network (ISDN) and Multi-Digital Subscriber Line (xDSL) .It is connected to the Internet and intranet to provide subscribers at home with high speed data transmission speed of Mbps. Provide various services such as search.

The concept of a cable modem network is similar to a cable TV network in data communication. In terms of using coaxial cable, cable TV connects an external coaxial cable to a set-top box and connects the TV to the set-top box. Cable modem networks, on the other hand, use a cable modem to connect a coaxial cable to a PC. At this time, there may be one PC or multiple PCs connected to the cable modem.

1 is a diagram illustrating a network constructed using a general cable modem, in which a plurality of cable modems (CM) 11 to 14 are connected to the cable network 20, and a PC is connected to the cable modems 11 to 14, respectively. The subscriber is provided with services such as the Internet from the backbone network 40, and the cable modem terminal system 30 (CMTS: Cable Modem Termination System) is located at the head end and serves to provide an uplink channel and a downlink channel. . The CMTS 30 broadcasts broadband data at a transmission rate of 500 kbps to 30 Mbps in a downlink channel, and each CM transmits narrowband query data in a point-to-point manner at a rate of 96 kbps to 10 Mbps in an uplink channel. .

In the hierarchical structure of the communication method using the cable modem, the transport layer transmits a bitstream consisting of a series of 188 byte MPEG-2 packets downstream. The 188 bytes are divided into one byte for synchronization, three bytes for service definition, scrambling, and control information, and 184 bytes for MPEG-2 data or auxiliary data.

Fig. 2 is a block diagram showing the cable transmission process in the cable modem system, in which the MPEG frame unit 21, the FEC encoder 22, the QAM modulation unit 23, the MPEG frame unit 27, and the FEC unit of the transmission unit are shown. It consists of a decoder 26, a QAM demodulator 25, and a channel 24.

The MPEG frame unit 21 of the transmitter receives an MPEG-2 data stream consisting of a series of 188-byte fixed length packets, transmits the synchronization of the MPEG packets to the receiver, and the Forward Error Correction (FEC) encoder 22 Reed-Solomon coding, interleaving, randomization, and trellis coding are performed to reliably transfer data through the cable channel 24, and the QAM modulator 23 uses 64 QAM or 256 QAM modulation. do. The MPEG frame unit 27, the FEC decoder 26, and the QAM demodulator 25 of the receiver perform the opposite functions of the transmitter.

As shown in FIG. 2, the FEC encoder 22 is a Reed Solomon encoder 22-1, an interleaver 22-2, a randomizer 22-3, and a trellis encoder 22-4. The FEC decoder 26 is composed of a trellis decoder 26-1, a derandom equalizer 26-2, a deinterleaver 26-3, and a Reed Solomon decoder 26-4.

The ReedSolomon encoder 22-1 performs ReedSolomon encoding using (128,122) codes. Error correction is possible up to three symbols. The RS code is used for both 64QAM and 256QAM. The interleaver 22-2 prevents cluster noise that causes an error, and has a programmable structure in the case of 64QAM and 256QAM. The randomizer 22-3 randomizes data for synchronization of the QAM demodulator 25, and the trellis encoder 22-4 internal code of a concatenated coding scheme. The inner code is used to perform binary convolutional encoding to encode a transmitted signal. In addition, the TCM decoder 26-1, the reverse randomizer 26-2, the deinterleaver 26-3, and the Reed Solomon decoder 26-4 of the FEC decoder 26 are opposite to the FEC encoder 22. Perform the function.

The TCM encoder 22-4 receives the bitstream from the randomizer 22-3 and performs QAM mapping to output the QAM modulator 23. The TCM encoder for 64 QAM is shown in FIG. 3. As described above, the apparatus comprises an input symbol distributor (Parser) 31, a code processor (Coded block) 32, and a QAM mapper 33.

The input symbol distribution unit 31 is an A (1) symbol (A10, A8, A7, A5, A4, A2, A1) and A (2) symbols by 7 bits from the randomization unit (22-3 in FIG. 2). (A9, A6, A3, A0, A13, A12, A11), B (1) Symbols (B10, B8, B7, B5, B4, B2, B1), B (2) Symbols (B9, B6, B3, B0 And receives a 28-bit stream consisting of B13, B12, and B11, and distributes them to meet the QAM standard. The code processor 32 is a differential precoder 32-1 and two binary convolutional encoders (BCC). Binary Convolutional Coder (32-2, 32-3) and two puncturing blocks (32-4, 32-5), from the input symbol distribution unit (31) 4 bit A0, Four-bit B0, B3, B6, B9 of A3, A6, A9 and B (2) symbols are input, differentially encoded and half-convolutionally encoded, and then 5-bit encoded by the puncturing function of 4/5 code rate. 'U1, U2, U3, U4, U5' and 'V1, V2, V3, V4, V5' are outputted, and the QAM mapper 33 outputs uncoded 4 bits and the code processor 32 every clock. 2 bits encoded by 6 bits each (C5 ~ C0) Receiving input and outputs it to the 64 (= 2 ⁶⁾ was converted to the symbol level QAM modulator (23 in Fig. 2).

In addition, the TCM encoder for 256 QAM receives a 38-bit stream from the randomization unit 22-3, performs QAM mapping, and outputs the same to the QAM modulation unit 23. The configuration and operation are similar to those of the TQ encoder of 64 QAM. same. That is, the QAM mapper receives 8 bits (C7 to C0) from the input symbol distributor and the code processor every clock and converts them into 256 (= 2 ⁸ ) level symbols.

The binary convolutional coder in such a TCM encoder is a 16-state, 1 / 2-rate coder with generation codes G1 = [010101] and G2 = [011111], the configuration of which is as shown in FIG.

Referring to FIG. 4, the binary convolutional coder convolutionally encodes an input signal X of 1 bit input from the differential precoder for each clock and outputs 2 bits of Y1 and Y2. Exclusive logical sum operation units 45 and 46 represent the 16 states of '0000' to '1111', and perform exclusive logic sum operations according to the G1 and G2 generation codes to output Y1 and Y2.

At this time, in order to actually obtain the output Y1, two exclusive logic operators are required to exclusively combine the input bits output from the differential precoder, the output of the second memory 42 and the output of the fourth memory 44, and likewise In order to obtain the output Y2, four exclusive logical sum operators are required to exclusively sum the input bits from the differential precoder and the outputs of the four memories. However, when six exclusive logic sum operators are used to obtain Y1 and Y2 in this manner, the area is increased. Therefore, it is necessary to design a binary convolutional encoder for encoding more efficiently according to the characteristics of the binary convolutional encoder of the cable modem system.

Accordingly, the present invention has been made in view of the above necessity, and provides a binary convolutional encoder of a cable modem downstream system TCM encoder capable of convolutionally encoding the output of a differential precoder according to a 16 state 1/2 bit rate. The purpose is.

The apparatus of the present invention for achieving the above object is provided in the code processing unit of the TCM encoder, and outputs Y1, Y2 by half-convolutional coding of the 1-bit input signal X inputted every clock from the differential precoder. In the binary convolutional encoder of a cable modem downstream system, a plurality of memories connected in series to each other, delaying an input signal by a predetermined clock, and outputting them to a memory of a next stage, an input signal of a binary convolutional encoder, and an output of the second memory A second exclusive logic operation unit configured to perform an exclusive logical sum operation, a second exclusive logic operation unit performing an exclusive logic operation on an output of the first exclusive logic operation unit and an output of the fourth memory, an output of the first memory, and an output of the third memory. Exclusive logic for the third exclusive logic operation unit for performing the exclusive logic operation, and the output of the third exclusive logic operation unit and the output of the second exclusive logic operation unit It characterized in that the configuration includes a fourth exclusive-OR operation part for computing.

1 is a diagram illustrating a network constructed using a general cable modem;

2 is a block diagram showing a cable transmission processing step in a cable modem system;

3 is a block diagram showing the configuration of a TCM encoder for 64 QAM;

4 is a block diagram showing the configuration of a conventional binary convolutional encoder of a TCM encoder;

5 is a block diagram showing the configuration of a binary convolutional encoder of a cable modem downstream system TCM encoder according to the present invention.

＊ Explanation of symbols for main parts of drawing

51 to 54: memory 55 to 58: exclusive logic operation unit

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

First, according to the characteristics of the G1 (= [010101]), G2 (= [[011111]) generation codes, 16 states, and 1/2 rate of the binary convolutional encoder of the cable modem downstream system described above, the first of the binary convolutional encoder The output signal Y1 is a value obtained by performing an exclusive logic operation on the input signal from the differential precoder, the output signal of the second memory, and the output signal of the fourth memory, and the second output signal Y2 is the input signal from the differential precoder, It is a value obtained by performing an exclusive logic sum operation on the output signal of the first memory, the output signal of the second memory, the output signal of the third memory, and the output signal of the fourth memory, respectively. That is, the second output signal Y2 may perform an exclusive logic sum operation on the output signals of the first memory and the third memory in an exclusive logic operation for Y1.

Therefore, the present invention does not separately design an exclusive logical OR operator for Y1 and an exclusive logical OR operator for Y2, but designs an exclusive logical OR operator for Y1 and then uses them again for the calculation of Y2 to perform exclusive convolutional coding. To reduce the number of logical OR operators.

FIG. 5 is a block diagram showing the configuration of a binary convolutional encoder of a cable modem downstream system TCM encoder according to the present invention. The first to fourth memories 51 to 54 and the first to fourth exclusive logic operation units 55 to 55 are shown in FIG. 58).

The first to fourth memories 51 to 54 are connected to each other in series, and store one bit of an input signal and delay one clock to output to a memory connected to a next stage, and each of '0000' to '1111'. 16 states corresponding to If the state stored in the memory 51 to 54 during the clock time t is a and k is input to the encoder at the clock time t + 1, the first memory 51 receives the k from the differential precoder. The second memory 52 receives a value stored in the first memory 51, the third memory 53 receives a stored value in the second memory 52, and the fourth memory 54 receives the value stored in the second memory 52. The storage value of the third memory 53 is received. In this way, as the clock time changes, the stored value of the memory changes so that the state of the encoder changes from a to another state b.

The first to fourth exclusive logic operation units 55 to 58 perform an exclusive logical sum operation on the output of the corresponding memory according to the G1 (= [010101]) and G2 (= [011111]) generation codes of the binary convolutional encoder. Outputs Referring to FIG. 4, Y1 is obtained by performing an exclusive logic operation on I _O , I ₂ , I ₄ , and Y2 is obtained by performing an exclusive logic operation on I _O , I ₁ , I ₂ , I ₃ , I ₄ . I ₀ represents the input signal X input from the differential precoder, I ₁ represents the output of the first memory 51, I ₂ represents the output of the second memory 52, and I ₃ represents the third memory 53. The output, I _4, represents the output of the fourth memory 54, respectively.

That is, the first exclusive logic calculation unit 55 performs an exclusive logic operation on the input signal I _O from the differential precoder and the output I ₂ of the second memory 52, and the second exclusive logic operation unit 56 performs the first exclusive operation. The exclusive OR operation of the output of the OR operation unit 55 and the output I ₄ of the fourth memory 54 is performed to output the first output signal Y1 of the encoder, and the third exclusive logic operation unit 57 of the first memory 51 performs an exclusive logic operation. An exclusive logic sum operation is performed on the output I ₁ and the output I ₃ of the third memory 53, and the fourth exclusive logic operation unit 54 outputs the output of the _third exclusive logic operation unit 53 and the second exclusive logic operation unit 56. An exclusive logical sum operation is performed on the output of the second output signal Y2 of the encoder.

As described above, the apparatus of the present invention has the effect of efficiently designing a binary convolutional coder with only a minimum of components by using the exclusive logical sum operator required for binary convolutional coding without using them separately.

Claims (1)

A cable modem downstream system provided in the code processing unit 32 of the TCM encoder and outputs Y1 and Y2 by convolutionally encoding the 1-bit input signal X inputted every clock from the differential precoder 32-1. In binary weaving encoder, A plurality of memories 51 to 54 connected in series with each other and outputting a predetermined clock delay to the next memory; A first exclusive logic sum calculator (55) for performing an exclusive logic sum operation on an input signal of a binary convolutional encoder and an output of the second memory (52); A second exclusive logic operation unit (56) for performing an exclusive logic operation on the output of the first exclusive logic operation unit (55) and the output of the fourth memory (54); A third exclusive logical sum calculating unit (57) for performing an exclusive logic sum operation on the output of the first memory (51) and the output of the third memory (53); And Cable modem downstream system TCM characterized in that it comprises a fourth exclusive logic sum calculation unit 58 for performing exclusive logic sum calculation of the output of the third exclusive logic calculation unit 57 and the output of the second exclusive logic calculation unit 56. Binary Weaving Encoder of Encoder.