KR19990066217A - Operational amplifier - Google Patents

Abstract

The operational amplifier according to the present invention comprises: a differential input stage for receiving differential input signals; A first constant current source connected to the differential input terminal and supplying a predetermined amount of current to the differential input terminal; A second constant current source connected to said differential input stage for flowing a constant amount of current from said differential input stage to ground; A first switch controlled to a first bias voltage; A second switch controlled to a second bias voltage; A pair of output stages, a first output stage of the output stages is commonly connected to the first constant current source and the differential input stage, and a second output stage of the output stages is connected to the second constant current source through the first switch; A connected first current mirror; Having a pair of output stages, a first output stage of the output stages is connected to the second constant current source, and a second output stage of the output stages is common to the first constant current source and the differential input stage through the second switch; A second current mirror connected. And the first current mirror constantly supplies a first current to the first output stage and constantly supplies a current corresponding to 1 / n of the first current to a second one of the output stages; The second current mirror constantly supplies the same amount of current as the first current to the first output stage, and constantly provides a current corresponding to 1 / n of the first current to a second output stage among the output stages. Supply.

Description

OPERATIONAL AMPLIFIER

The present invention relates to an operational amplifier, and more particularly, to an operational amplifier having a constant transconductance regardless of the DC change.

1 is a circuit diagram showing a circuit configuration of an operational amplifier according to a first embodiment of the prior art.

Referring to Fig. 1, the operational amplifier of the first embodiment is composed of three NMOS transistors M1, M2, and M3. The transistor M1 has a source, a drain and a gate. The drain of the transistor M1 is connected to a power supply voltage Vdd and its gate is controlled to the first input signal Vin1. The NMOS transistor M3 has a source, a drain and a gate. The drain of the transistor M3 is connected to the source of the transistor M1, its source is grounded, and its gate is controlled to the signal Vb. The NMOS transistor M2 has a source, a drain and a gate. The drain of the transistor M2 is connected to the power supply voltage Vdd, its source is grounded through the transistor M2, and its gate is controlled to the second input signal Vin2.

As shown in Fig. 1, since the input terminal is composed of a single pair (for example, a PMOS transistor or an NMOS transistor), the input range is configured to be limited by a threshold voltage (Vth) on the power supply and ground sides, respectively. .

In Fig. 1, as long as the common mode voltage (hereinafter referred to as Vcm) is large compared to the ground voltage Vss, all the transistors M1, M2, and M3 are saturated. A minimum drain to source voltage (hereinafter referred to as Vds.sat) for maintaining the NMOS transistor M3 in a saturation state is represented by Equation 1 below.

[Equation 1]

Here, Vtn means the threshold voltage of the NMOS transistor and the symbol Kn is (UnCoxW / 2L).

Therefore, in order for all the transistors M1-M3 to operate in the saturation region, the gate-source voltage Vgs2 of the NMOS transistor M2 must be at least greater than the voltage Vds3.sat. As a result of the threshold voltage for turning on the transistor, the input range cannot be used over the full range. This phenomenon is much more of an issue when used at low voltages.

In order to solve such a problem, a new operational amplifier has been developed. The circuit configuration of the operational amplifier related to this is shown in FIG. FIG. 3 is a diagram illustrating a change in input transconductance gm according to an input change in the circuit of FIG. 2. As shown in Fig. 2, a new conventional op amp structure uses a pair of NMOS and PMOS transistors M1, M1a, M2, and M2a simultaneously as an input stage.

The characteristic of this structure is that it extends the range that operates only in a certain section, which is a disadvantage of using a single pair, to all sections. That is, it has three operating ranges, where 1) only the PMOS transistor pairs M1 and M1a operate when the common mode voltage Vcm is near the ground voltage. 2) Only pairs of NMOS transistors M2 and M2a operate when the common mode voltage is near the power supply voltage. And 3) all input transistors M1, M1a, M2, and M2a operate when the common mode voltage is an intermediate region between the ground voltage and the power supply voltage.

Since the transconductance gm of the MOS transistor is (2uCox (W / L) Id) 1/2, the transconductance gm is proportional to the square root of the drain current Id. Therefore, the control of the drain current Id is difficult, and different application circuits are required because the increase and decrease of the transconductance gm varies depending on the type of transistor.

The total transconductance gmt of the parallel input stage may be expressed by Equation 2 below.

[Equation 2]

Here, assuming that the currents In and Ip are supplied from a constant current source, respectively, the currents In and Ip are changed to have independent satisfactory values, respectively. Therefore, when the common mode voltage Vcm varies between rails, the total transconductance gmt is not constant.

Problems of the operational amplifier of the above-described structure is as follows. As can be seen in Figure 3, because the ratio of the transconductance (gm) of each of the PMOS and NMOS transistors increases or decreases at a certain DC point, there is an area where the entire input transconductance is irregular, such an irregular region In this case, it has a very bad effect on the whole circuit.

Accordingly, an object of the present invention is to provide an operational amplifier capable of maintaining a constant transconductance even when the DC point changes.

1 is a circuit diagram showing a circuit configuration of an operational amplifier according to a first embodiment of the prior art;

2 is a circuit diagram showing a circuit configuration of an operational amplifier according to a second conventional embodiment;

FIG. 3 is a view illustrating a change in input transconductance according to the level change of the input signals of FIG. 2; FIG. And

4 is a circuit diagram showing a circuit configuration of an operational amplifier according to a preferred embodiment of the present invention.

* Explanation of symbols on the main parts of the drawings

100, 120: current mirror 140: input terminal

(Configuration)

According to an aspect of the present invention for achieving the above object, a differential input stage for receiving differential input signals; A first constant current source connected to the differential input terminal and supplying a predetermined amount of current to the differential input terminal; A second constant current source connected to said differential input stage for flowing a constant amount of current from said differential input stage to ground; A first switch controlled to a first bias voltage; A second switch controlled to a second bias voltage; A pair of output stages, a first output stage of the output stages is commonly connected to the first constant current source and the differential input stage, and a second output stage of the output stages is connected to the second constant current source through the first switch; A connected first current mirror; Having a pair of output stages, a first output stage of the output stages is connected to the second constant current source, and a second output stage of the output stages is common to the first constant current source and the differential input stage through the second switch; A second current mirror connected; The first current mirror constantly supplies a first current to the first output stage and constantly supplies a current corresponding to 1 / n of the first current to a second one of the output stages; The second current mirror constantly supplies the same amount of current as the first current to the first output stage, and constantly provides a current corresponding to 1 / n of the first current to a second output stage among the output stages. Supply.

In this embodiment, the first and second bias voltages are applied so as not to overlap each other.

(Action)

With such a device, an operational amplifier can be implemented so that the transconductance remains constant even if the DC point changes.

(Example)

Hereinafter, reference will be made in detail with reference to FIG. 4 according to an embodiment of the present invention.

In the following description, specific details are set forth by way of example and in detail in order to provide a more thorough understanding of the present invention. However, for those of ordinary skill in the art, the present invention may be practiced only by the above description without these details.

In general, the transconductance (gm) is the drain current because the transconductance (gm) of a metal-oxide-semiconductor (MOS) transistor is (2 uCox (W / L) Id) ^1/2 . It is proportional to the square root of (Id). Therefore, the control of the drain current Id is difficult, and different application circuits are required because the increase and decrease of the transconductance gm varies depending on the type of transistor.

The total transconductance gmt of the parallel input stage may be expressed by Equation 2 below.

[Equation 2]

Here, assuming that the currents In and Ip are supplied from a constant current source, respectively, the currents In and Ip are changed to have independent satisfactory values, respectively. Therefore, when the common mode voltage Vcm varies between rails, the total transconductance gmt is not constant.

Therefore, the present invention is to make the overall transconductance gmt constant, i.e., to make the increase of the current Ip constant with the increase of the current In. First, assuming that Kn and Kp match, the overall transconductance gmt may be expressed as Equation 3 below.

[Equation 3]

4 is a circuit diagram showing a circuit configuration of an operational amplifier according to a preferred embodiment of the present invention. In Fig. 4, the same reference numerals are given to components having the same function as that in Fig. 2, and the description thereof will be omitted.

Referring again to FIG. 4, an operational amplifier according to the invention comprises two current mirrors 100 and 120, one PMOS transistor M3 and one NMOS transistor M4. The current mirrors have a 3: 1 structure.

Suppose that the currents Ip, In, and Iref are only two operations of the same or safely turn off. The PMOS transistor M3 and the NMOS transistor M4 are biased to the signals Vb1 and Vb2, respectively. If the common mode voltage (Vcm) is near the mid rail, both pairs of differential pairs operate in the saturation region, and transistors M3 and M4 are completely turned off and currents Ip Since (In) and (Iref) are the same, the following equation (4) can be established.

[Equation 4]

Next, when the common mode voltage Vcm is near the power supply voltage, the voltage Vb increases and the transistor M3 is turned off. Here, the voltage Vb is independent of the input voltage and the transistor M4 is turned off because the voltage Va increases. Therefore, the total current flowing through the pair of NMOS transistors M2 and M2a flows in a current of 4 * Iref by a 1: 3 current source, and Equation 5 below is established.

[Equation 5]

Finally, when the common mode voltage Vcm is near the ground voltage, Equation 6 below is established in the same manner as the above-described operation.

[Equation 6]

In conclusion, it can be seen that the total transconductance gmt remains constant at (8Iref * K) ^1/2 when one or both are operating. Note that the bias voltages Vb1 and Vb2 must be adjusted so that the two switching transistors M3 and M4 are never turned on at the same time.

While the invention has been described using exemplary preferred embodiments, it will be understood that the scope of the invention is not limited to the disclosed embodiments. Rather, the scope of the present invention is intended to include all of the various modifications and similar configurations. Accordingly, the claims should be construed as broadly as possible to cover all such modifications and similar constructions.

As described above, it is possible to implement an operational amplifier in which the overall transconductance can be kept constant even if the DC point changes.

Claims (2)

A differential input stage for receiving differential input signals; A first constant current source connected to the differential input terminal and supplying a predetermined amount of current to the differential input terminal; A second constant current source connected to said differential input stage for flowing a constant amount of current from said differential input stage to ground; A first switch controlled to a first bias voltage; A second switch controlled to a second bias voltage; A pair of output stages, a first output stage of the output stages is commonly connected to the first constant current source and the differential input stage, and a second output stage of the output stages is connected to the second constant current source through the first switch; A connected first current mirror; Having a pair of output stages, a first output stage of the output stages is connected to the second constant current source, and a second output stage of the output stages is common to the first constant current source and the differential input stage through the second switch; A second current mirror connected; The first current mirror constantly supplies a first current to the first output stage and constantly supplies a current corresponding to 1 / n of the first current to a second one of the output stages; The second current mirror constantly supplies the same amount of current as the first current to the first output stage, and constantly provides a current corresponding to 1 / n of the first current to a second output stage among the output stages. Op amp supply. The method of claim 1, And the first and second bias voltages are applied so as not to overlap each other.