KR19990059035A - Method and apparatus for singulation of ball grid array semiconductor package manufactured using flexible circuit board strip - Google Patents

Method and apparatus for singulation of ball grid array semiconductor package manufactured using flexible circuit board strip Download PDF

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KR19990059035A
KR19990059035A KR1019970079230A KR19970079230A KR19990059035A KR 19990059035 A KR19990059035 A KR 19990059035A KR 1019970079230 A KR1019970079230 A KR 1019970079230A KR 19970079230 A KR19970079230 A KR 19970079230A KR 19990059035 A KR19990059035 A KR 19990059035A
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circuit board
flexible circuit
singulation
grid array
ball grid
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KR1019970079230A
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Korean (ko)
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KR100362502B1 (en
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하선호
다비욱스 로버트
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마이클 디. 오브라이언
앰코 테크놀로지 코리아 주식회사
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Priority to KR1019970079230A priority Critical patent/KR100362502B1/en
Publication of KR19990059035A publication Critical patent/KR19990059035A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

본 발명은 가요성(可撓性) 회로기판 스트립을 이용하여 제조되는 볼 그리드 어레이(Ball Grid Array) 반도체 패키지의 싱글레이션(Singulation) 방법 및 장치에 관한 것으로, 수지봉지부의 측단 하방에 인접한 가요성 회로기판 부분에 펀치를 이용하여 가요성 회로기판 및 에폭시 양면 접착테이프에 노치(Notch)를 형성시킨 다음, 싱글레이션 툴(Tool)을 이용하여 수지봉지부의 상방으로 부터 압력을 가하여 금속 캐리어 프레임을 탈락시킴과 동시에, 낱개의 볼 그리드 어레이 반도체 패키지로 분리시킬 때 상기한 싱글레이션 툴의 저면이 수지봉지부의 상면에 순차적으로 접촉되도록 하여 충격에 의한 집중응력의 발생을 방지하여 신뢰성을 향상시키고, 나아가 크랙 등의 불량을 방지할 수 있도록 된 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a method and apparatus for singulation of a ball grid array semiconductor package manufactured using a flexible circuit board strip. A notch is formed on the flexible circuit board and the epoxy double-sided adhesive tape using a punch on the circuit board part, and then a pressure is applied from the upper side of the resin encapsulation part using a singulation tool to drop the metal carrier frame. At the same time, when separating into a single ball grid array semiconductor package, the bottom of the above-mentioned singleization tool is brought into contact with the upper surface of the resin encapsulation part in order to prevent the occurrence of concentrated stress due to impact, thereby improving reliability and further cracking. It is to be able to prevent such defects.

Description

가요성 회로기판 스트립을 이용하여 제조되는 볼 그리드 어레이 반도체 패키지의 싱글레이션 방법 및 장치Method and apparatus for singulation of ball grid array semiconductor package manufactured using flexible circuit board strip

본 발명은 가요성(可撓性) 회로기판 스트립을 이용하여 제조되는 볼 그리드 어레이(Ball Grid Array) 반도체 패키지의 싱글레이션(Singulation) 방법 및 장치에 관한 것이다.The present invention relates to a method and apparatus for singulation of a Ball Grid Array semiconductor package manufactured using a flexible circuit board strip.

일반적으로 볼 그리드 어레이 반도체 패키지는, 통상 PCB기판의 상면에 하나 또는 그 이상의 반도체칩이 장착되고, 마더 보드(Mother Board)와 같은 도전성 재료에 대한 전기적 접속이 반도체칩이 부착된 PCB기판면의 대향면상에 위치하는 솔더볼의 어레이에 의해 이루어지는 구조의 반도체 패키지로서, 볼 그리드 어레이 반도체 패키지는 200핀 이상의 다핀 디바이스 또는 고집적화된 대규모 집적회로(VLSI), 마이크로 프로세서 등의 용도로서 각광받고 있다.In general, a ball grid array semiconductor package generally includes one or more semiconductor chips mounted on an upper surface of the PCB substrate, and an electrical connection to a conductive material such as a mother board is opposite to the PCB substrate surface on which the semiconductor chip is attached. BACKGROUND OF THE INVENTION A semiconductor package having a structure formed by an array of solder balls positioned on a surface, a ball grid array semiconductor package has been in the spotlight for applications such as 200-pin or more multi-pin devices, highly integrated large-scale integrated circuits (VLSIs), microprocessors, and the like.

그러나, 이러한 볼 그리드 어레이 반도체 패키지에 있어서는, PCB기판의 두께가 적어도 수백 미크론에 이르므로 열 저항률이 높아서 실장된 반도체칩의 작동시 발생되는 열의 방출성이 열등하고, 경박화에 있어서 충분히 만족스럽지 못하며, 봉지부의 외부로 노출되는 회로패턴을 절연시키기 위하여 전체 PCB기판 및 그 회로패턴 상에 솔더마스크를 형성시켜야 하는 문제가 있고, PCB기판이 다층 구조인 경우 상하의 회로패턴을 상호 전기적으로 접속시키기 위한 비아 홀(Via Hole)을 형성하여야 함으로서 공정이 번거로운 문제점이 있을 뿐만 아니라, 가격이 고가인 단점이 있다.However, in such a ball grid array semiconductor package, since the thickness of the PCB substrate is at least several hundred microns, the heat resistivity is high, so that the heat dissipation generated during the operation of the mounted semiconductor chip is inferior, and it is not satisfactorily sufficient in lightening. In order to insulate the circuit pattern exposed to the outside of the encapsulation part, a solder mask must be formed on the entire PCB and the circuit pattern. When the PCB is a multilayer structure, a via for electrically connecting the upper and lower circuit patterns to each other is provided. Since holes must be formed, not only the process is cumbersome but also disadvantageously expensive.

이러한 문제점을 해소하기 위하여 본 출원인은 대한민국 특허출원 제97-4430호(출원일:1997년2월14일)의 "가요성 회로기판을 이용한 볼 그리드 어레이 반도체 패키지 및 그 제조방법"과 대한민국 특허출원 제97-2504호(출원일:1997년1월28일)의 "가요성 회로기판 스트립을 이용하여 제조되는 볼 그리드 어레이 반도체 패키지의 싱귤레이션 방법"을 출원한 바 있다.In order to solve such a problem, the applicant of the Korean Patent Application No. 97-4430 (Application Date: February 14, 1997) of the "ball grid array semiconductor package using a flexible circuit board and its manufacturing method" and Korean Patent Application No. No. 97-2504, filed Jan. 28, 1997, filed "Method of singulating a ball grid array semiconductor package manufactured using a flexible circuit board strip."

상기한 출원의 가요성 회로기판 스트립을 이용하여 제조된 연속적인 볼 그리드 어레이 반도체 패키지에 있어서의 싱글레이션 방법은, 펀치나 커터 등을 이용하여 가요성 회로기판이 부착된 금속 캐리어 프레임을 절단하는데, 가요성 회로기판에 형성되어 있는 회로패턴 외곽의 미세한 구리 회로선들이 절단시의 충격에 의하여 변형 또는 손상되는 것을 최대한 방지함은 물론, 쇼트될 가능성을 최소화 할 수 있도록 하기 위하여, 수지봉지부의 측단 하방에 인접한 가요성 회로기판 부분에 펀치를 이용하여 가요성 회로기판 및 에폭시 양면 접착테이프에 노치(Notch)를 형성시킨 다음, 싱글레이션 툴(Tool)을 이용하여 수지봉지부의 상방으로 부터 압력을 가하여 금속 캐리어 프레임을 탈락시킴과 동시에, 낱개의 볼 그리드 어레이 반도체 패키지로 분리시키도록 된 것이다.The singulation method in a continuous ball grid array semiconductor package manufactured using the flexible circuit board strip of the above application cuts a metal carrier frame to which the flexible circuit board is attached using a punch or a cutter. In order to prevent the fine copper circuit lines outside the circuit pattern formed on the flexible circuit board from being deformed or damaged by the impact at the time of cutting, and to minimize the possibility of short-circuit, the bottom side of the resin encapsulation part is A notch is formed on the flexible circuit board and the epoxy double-sided adhesive tape using a punch on the flexible circuit board portion adjacent to the metal, and then pressurized from the upper side of the resin encapsulation using a single tool. Drop the carrier frame and separate it into a single ball grid array semiconductor package It is a lock.

그러나, 종래에는 도 2에 도시된 바와같이 저면이 평평한 면을 가지고 있는 싱글레이션 툴(7)을 이용함으로써, 수지봉지부(40)의 상방으로 부터 압력을 가할 때 상기한 싱글레이션 툴(7)의 저면이 수지봉지부(40)의 상면에 전체적으로 접촉되므로 싱글레이션 툴(7)의 충격이 수지봉지부(40)에 한순간에 전달되어 집중응력이 발생될 수 있어 신뢰성을 크게 저하시키고, 나아가 크랙 등의 불량을 발생할 수 있었던 것이다.However, conventionally, by using the singulation tool 7 having a flat bottom surface as shown in FIG. 2, the above-mentioned singulation tool 7 is applied when pressure is applied from above the resin encapsulation portion 40. FIG. Since the bottom surface of the resin encapsulation portion 40 contacts the entire surface of the resin encapsulation portion 40 as a whole, the impact of the singleization tool 7 is transmitted to the resin encapsulation portion 40 at a moment, so that a concentrated stress can be generated, which greatly reduces the reliability and further cracks. It could have caused such a defect.

본 발명의 목적은 이와같은 문제점을 해소하기 위하여 발명된 것으로서, 수지봉지부의 측단 하방에 인접한 가요성 회로기판 부분에 펀치를 이용하여 가요성 회로기판 및 에폭시 양면 접착테이프에 노치(Notch)를 형성시킨 다음, 싱글레이션 툴(Tool)을 이용하여 수지봉지부의 상방으로 부터 압력을 가하여 금속 캐리어 프레임을 탈락시킴과 동시에, 낱개의 볼 그리드 어레이 반도체 패키지로 분리시킬 때 상기한 싱글레이션 툴의 저면이 수지봉지부의 상면에 순차적으로 접촉되도록 하여 충격에 의한 집중응력의 발생을 방지하여 신뢰성을 향상시키고, 나아가 크랙 등의 불량을 방지할 수 있도록 된 가요성 회로기판 스트립을 이용하여 제조되는 볼 그리드 어레이 반도체 패키지의 싱글레이션 방법을 제공함에 있다.An object of the present invention is to solve such a problem, by forming a notch in the flexible circuit board and the epoxy double-sided adhesive tape using a punch in the flexible circuit board portion adjacent to the lower side end of the resin encapsulation. Next, when the metal carrier frame is dropped by applying pressure from above the resin encapsulation part using a single tool, the bottom surface of the above-mentioned singulation tool is separated from the individual ball grid array semiconductor package. The ball grid array semiconductor package is manufactured by using a flexible circuit board strip which is in contact with the upper surface of the negative side to prevent the generation of concentrated stress due to impact, thereby improving reliability and further preventing defects such as cracks. To provide a method of singulation.

또한, 이러한 방법을 위한 본 발명의 장치는, 수지봉지부의 측단 하방에 인접한 가요성 회로기판 부분에 상기한 가요성 회로기판 및 에폭시 양면 접착테이프에 노치(Notch)를 형성시키는 펀치와, 수지봉지부의 상방으로 부터 압력을 가하여 금속 캐리어 프레임을 탈락시킴과 동시에, 낱개의 볼 그리드 어레이 반도체 패키지로 분리시키돌 된 싱글레이션 툴(Tool)로 이루어진 것에 있어서, 상기한 싱글레이션 툴의 저면이 수지봉지부의 상면에 순차적으로 접촉되도록 싱클레이션 툴의 저면에 경사면이 형성된 것이다.In addition, the apparatus of the present invention for this method, a punch for forming a notch in the above-described flexible circuit board and the epoxy double-sided adhesive tape in the flexible circuit board portion adjacent to the side end below the resin encapsulation portion, and the resin encapsulation portion The bottom surface of the above-mentioned singulation tool is formed on the upper surface of the resin encapsulation part, in which the metal carrier frame is dropped by applying pressure from above and made into a single ball grid array semiconductor package. An inclined surface is formed on the bottom of the sinking tool so as to sequentially contact the.

도 1은 가요성 회로기판 스트립을 이용하여 제조된 볼 그리드 어레이 반도체 패키지에 대한 본 발명의 싱글레이션 방법을 설명하는 설명도1 is an explanatory diagram illustrating a singulation method of the present invention for a ball grid array semiconductor package manufactured using a flexible circuit board strip.

도 2는 가요성 회로기판 스트립을 이용하여 제조된 볼 그리드 어레이 반도체 패키지에 대한 종래의 싱글레이션 방법을 설명하는 설명도2 is an explanatory diagram illustrating a conventional singulation method for a ball grid array semiconductor package manufactured using a flexible circuit board strip.

- 도면의 주요부분에 대한 부호의 설명 --Explanation of symbols for the main parts of the drawings-

10 - 반도체칩 11 - 접착수단10-semiconductor chip 11-bonding means

20 - 가요성 회로기판 스트립 21 - 다이패드20-Flexible Circuit Board Strip 21-Die Pad

22 - 회로패턴 23 - 금속 캐리어 프레임22-circuit pattern 23-metal carrier frame

24 - 양면 접착테이프 25 - 노치24-double sided adhesive tape 25-notch

30 - 와이어 40 - 수지 봉지부30-wire 40-resin encapsulation

50 - 솔더볼 60 - 펀치50-Solder Ball 60-Punch

70 - 싱글레이션 툴 71 - 경사면70-Singleization Tool 71-Slope

이하, 본 발명을 첨부된 도면을 참조하여 상세히 설명하면 다음과 같다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

도 1은 가요성 회로기판 스트립을 이용하여 제조된 볼 그리드 어레이 반도체 패키지에 대한 본 발명의 싱글레이션 방법을 설명하는 설명도로서, 먼저 볼 그리드 어레이 반도체 패키지의 구조에 대하여 간단히 설명하기로 한다.FIG. 1 is an explanatory diagram illustrating a singulation method of the present invention for a ball grid array semiconductor package manufactured using a flexible circuit board strip. First, the structure of the ball grid array semiconductor package will be briefly described.

반도체칩(10)은 금속 캐리어 프레임(23)의 저면에 부착된 가요성 회로기판 스트립(20)의 상면에 형성된 다이패드(21)상에 에폭시나 접착테이프 등과 같은 열 전도성 접착수단(11)에 의하여 실장되고, 상기 반도체칩(10)과 가요성 회로기판 스트립(20) 사이의 전기적 접속은 반도체칩(10)에 형성된 본드패드(도시하지 않음)와 가요성 회로기판 스트립(20)의 상면에 형성된 회로패턴(22)을 와이어(30)로 본딩되며, 상기 반도체칩(10)과 와이어(30) 및 선택적 요소인 수동소자 등과 같은 주변 구성요소들(도시하지 않음)은 습기나 먼지 또는 외부적 충격이나 진동 등과 같은 유해한 외부환경으로 부터 보호하기 위하여 수지봉지부(40)로 몰딩된다. 또한, 반도체칩(10)이 실장되는 가요성 회로기판 스트립(20)의 저면에는 다수의 솔더볼(40)이 융착되며, 이러한 솔더볼(40)은 입출력 단자로서 기능을 한다.The semiconductor chip 10 is attached to a thermally conductive adhesive means 11 such as epoxy or adhesive tape on a die pad 21 formed on the upper surface of the flexible circuit board strip 20 attached to the bottom surface of the metal carrier frame 23. Electrical connection between the semiconductor chip 10 and the flexible circuit board strip 20 is formed on the upper surface of the bond pad (not shown) and the flexible circuit board strip 20 formed on the semiconductor chip 10. The formed circuit pattern 22 is bonded to the wire 30, and peripheral components such as the semiconductor chip 10, the wire 30, and an optional passive element (not shown) may be moist, dusty or external. In order to protect from harmful external environment such as shock or vibration is molded into the resin encapsulation 40. In addition, a plurality of solder balls 40 are fused to the bottom of the flexible circuit board strip 20 on which the semiconductor chip 10 is mounted, and the solder balls 40 function as input / output terminals.

이어서, 본 발명의 싱글레이션 방법에 대하여 설명하면, 수지봉지부(40)의 측단 하방에 인접한 가요성 회로기판 스트립(20) 부분에 펀치(60)를 이용하여 가요성 회로기판 스트립(20) 및 에폭시 양면 접착테이프(24)에 노치(25)를 형성시킨 다음, 싱글레이션 툴(Tool)을 이용하여 수지봉지부(40)의 상면을 순차적으로 접촉되도록 순간적으로 타발하는 것에 의하여 금속 캐리어 프레임(23)이 탈락시킨과 동시에, 낱개의 볼 그리드 어레이 반도체 패키지로 분리시키는 것이다.Next, the singulation method of the present invention will be described. The flexible circuit board strip 20 and the punch 60 are used for the portion of the flexible circuit board strip 20 adjacent to the lower side end portion of the resin encapsulation portion 40. The notch 25 is formed on the epoxy double-sided adhesive tape 24, and then the metal carrier frame 23 is instantaneously punched to sequentially contact the upper surface of the resin encapsulation portion 40 using a single tool. At the same time as), they are separated into individual ball grid array semiconductor packages.

이와같은 싱글레이션을 위한 장치는, 수지봉지부(40)의 측단 하방에 인접한 가요성 회로기판 스트립(20) 부분에 상기한 가요성 회로기판 스트립(20) 및 에폭시 양면 접착테이프(24)에 노치(Notch)를 형성시키는 펀치(60)가 하부에 구비되고, 상기 수지봉지부(40)의 상방으로 부터 압력을 가하여 금속 캐리어 프레임(23)을 탈락시킴과 동시에, 낱개의 볼 그리드 어레이 반도체 패키지로 분리시키돌 된 싱글레이션 툴(70)이 상부에 구비된 것으로, 상기한 싱글레이션 툴(70)의 저면이 수지봉지부(40)의 상면에 순차적으로 접촉되도록 싱글레이션 툴(70)의 저면에 경사면(71)이 형성된 것이다.The device for such a single unit is notched in the flexible circuit board strip 20 and the epoxy double-sided adhesive tape 24 described above in the portion of the flexible circuit board strip 20 adjacent to the lower side end of the resin encapsulation portion 40. A punch 60 for forming a notch is provided in the lower portion, and the metal carrier frame 23 is dropped by applying pressure from above the resin encapsulation portion 40, and at the same time, into a single ball grid array semiconductor package. A separation tool 70 is provided on the upper side, and the bottom surface of the singulation tool 70 is in contact with the top surface of the resin encapsulation part 40 in sequence. The inclined surface 71 is formed.

이러한 싱글레이션 툴(70)에 수지봉지부(40)의 상면을 타발하게 되면, 상기한 싱글레이션 툴(70)의 경사면(71)에 의해 볼 그리드 어레이 반도체 패키지는 순간적으로 일측이 먼저 분리되고, 이어서 타측이 분리되는 것이다.When the upper surface of the resin encapsulation portion 40 is punched on the single tool 70, the ball grid array semiconductor package is momentarily separated by one side of the ball grid array semiconductor package by the inclined surface 71 of the single tool. Then the other side is separated.

이상의 설명에서 알 수 있듯이 본 발명에 의하면, 가요성 회로기판 스트립을 이요하여 제조되는 볼 그리드 어레이 반도체 패키지의 싱글레이션시, 충격에 의한 집중응력의 발생을 방지하여 신뢰성을 향상시키고, 나아가 크랙 등의 불량을 방지할 수 있는 효과가 있다.As can be seen from the above description, according to the present invention, in the singulation of a ball grid array semiconductor package manufactured by using a flexible circuit board strip, it is possible to prevent the occurrence of concentrated stress due to impact, thereby improving reliability, There is an effect that can prevent the defect.

Claims (2)

수지봉지부의 측단 하방에 인접한 가요성 회로기판 부분에 펀치를 이용하여 가요성 회로기판 및 에폭시 양면 접착테이프에 노치(Notch)를 형성시킨 다음, 싱글레이션 툴(Tool)을 이용하여 수지봉지부의 상방으로 부터 압력을 가하여 금속 캐리어 프레임을 탈락시킴과 동시에, 낱개의 볼 그리드 어레이 반도체 패키지로 분리시키는 싱글레이션 방법에 있어서, 상기한 싱글레이션 툴의 저면이 수지봉지부의 상면을 순차적으로 접촉되면서 타발하도록 된 것을 특징으로 하는 가요성 회로기판 스트립을 이용하여 제조되는 볼 그리드 어레이 반도체 패키지의 싱글레이션 방법.A notch is formed in the flexible circuit board and the epoxy double-sided adhesive tape by using a punch in the flexible circuit board portion adjacent to the lower side of the resin encapsulation portion, and then, using a singulation tool, upwards to the resin encapsulation portion. In the singulation method in which the metal carrier frame is dropped by applying pressure from the same and separated into individual ball grid array semiconductor packages, the bottom surface of the singulation tool is caused to be blown while sequentially contacting the upper surface of the resin encapsulation portion. A method of singulation of a ball grid array semiconductor package fabricated using a flexible printed circuit board strip. 수지봉지부의 측단 하방에 인접한 가요성 회로기판 부분에 상기한 가요성 회로기판 및 에폭시 양면 접착테이프에 노치(Notch)를 형성시키는 펀치와, 수지봉지부의 상방으로 부터 압력을 가하여 금속 캐리어 프레임을 탈락시킴과 동시에, 낱개의 볼 그리드 어레이 반도체 패키지로 분리시키돌 된 싱글레이션 툴(Tool)로 이루어진 것에 있어서, 상기한 싱글레이션 툴의 저면이 수지봉지부의 상면에 순차적으로 접촉되도록 싱클레이션 툴의 저면에 경사면을 형성한 것을 특징으로 하는 가요성 회로기판 스트립을 이용하여 제조되는 볼 그리드 어레이 반도체 패키지의 싱글레이션 장치.A punch for forming a notch in the above-described flexible circuit board and the epoxy double-sided adhesive tape on the flexible circuit board portion adjacent to the lower side end of the resin encapsulation portion, and a metal carrier frame is dropped by applying pressure from above the resin encapsulation portion. At the same time, it consists of a singulation tool separated into a single ball grid array semiconductor package, wherein the bottom of the singulation tool is placed on the bottom of the sinking tool so as to sequentially contact the top surface of the resin encapsulation portion. A singulation device of a ball grid array semiconductor package manufactured using a flexible circuit board strip, wherein the inclined surface is formed.
KR1019970079230A 1997-12-30 1997-12-30 Singulation method of ball grid array semiconductor package which is manufactured by flexible circuit board strip and apparatus thereof KR100362502B1 (en)

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