KR19990043411A - Symbol Mapping Device for Cable Modem - Google Patents

Abstract

The present invention relates to a symbol mapping apparatus that simultaneously supports a QPSK modulation mode and a 16QAM modulation mode in a cable modem.

According to the present invention, in a system employing two or more modulation modes, symbols are allocated for each mode. The symbol is delayed by a predetermined clock by demultiplexing the input bitstream in the order in which the input bitstreams are input. A first symbol generator for generating a; A second symbol generator which demultiplexes the input bit stream in order of inputting and delays each bit by a predetermined clock to generate one symbol of n bits every n / 2 periods; And a mode selector for selectively selecting an output of the first symbol generator or an output of the second symbol generator according to a modulation mode selection signal. The present invention simultaneously generates symbols for each mode using the same signal constellation in the cable modem supporting QPSK and 16QAM, and then supports the QPSK and 16QAM modes by selecting the corresponding mode symbol according to the mode selection signal. do.

Description

Symbol mapper in a cable modem

The present invention relates to a symbol mapping apparatus that simultaneously supports a QPSK modulation mode and a 16QAM modulation mode in a cable modem.

Cable modem network is a system that attracts interest in the field of remote access together with ISDN, Multi-Digital Subscriber Line (xDSL), etc., and provides various services such as telecommuting, video conferencing, web search, etc. Provide service. Cable modem networks have data rates of Mbps similar to xDSL. If a cable modem is installed at home, individuals can receive data at speeds of 500 Kbps to 30 Mbps and service providers can receive data up to 45 Mbps. In addition, since it acts like a hub on a local area network (LAN), a LAN can be easily constructed.

The concept of a cable modem network is similar to a cable TV network in data communication. In terms of using coaxial cable, cable TV connects an external coaxial cable to a set-top box and connects the TV to the set-top box. Cable modem networks, on the other hand, use a cable modem to connect a coaxial cable to a PC. At this time, there may be one PC or multiple PCs connected to the cable modem.

FIG. 1 is a diagram illustrating a network constructed using a general cable modem, and illustrates a cable modem terminal system (hereinafter referred to as CMTS) connected to a backbone network 1 provided by a cable modem network service provider. Provides various services and two-way communication to subscribers belonging to the cable network (3) through the cable network (3) has a plurality of cable modems (CM1 ~ CM4) to act as a relay between the subscriber and the cable modem terminal system (CMTS, 2) )It is connected. The cable modems CM1 to CM4 may be divided into workgroups, multiusers, and individuals. For example, a workgroup cable modem targets small groups with four or eight ports that can be connected to a PC. This allows a small LAN to be built. A multiuser cable modem can be used in libraries, schools, and factories. Etc. It is used in relatively large places.

In particular, the CMTS 2 is located at the head end and serves to provide an uplink channel and a downlink channel. The upstream transmitted from each cable modem (CM) to the CMTS (2) transmits the query and request narrowband data of each subscriber in a point-to-point manner at 96 kbps to 10 Mbps on an uplink channel. Downstream transmitted from the CMTS 2 to each cable modem CM broadcasts broadband service data at a transmission rate of 500 kbps to 30 Mbps in a downlink channel. The upstream is modulated through the cable modem (CM) with information about the query or request of the subscriber and demodulated through the CMTS.

Since the modulation method of the cable modem (CM) does not have much information, two types of QPSK mode and 16QAM mode are provided depending on the channel condition. Therefore, according to the modulation mode, the input bit should be generated to have the phase and amplitude of the symbol corresponding to each modulation mode.

Accordingly, an object of the present invention is to provide a symbol mapping apparatus that simultaneously generates symbols corresponding to each modulation mode in a system employing two or more modulation modes such as a cable modem. There is this.

The apparatus of the present invention for achieving the above object is to assign an input stream to a symbol corresponding to each modulation mode in a system employing two or more modulation modes, each of which is demultiplexed in the order in which the input bitstreams are input. A first symbol generator for generating one symbol of n bits every n periods by delaying the bits by a predetermined clock, and demultiplexing in the order in which the input bitstreams are input to delay each bit by a predetermined clock, n every n / 2 periods. And a second symbol generator for generating one symbol of a bit, and a mode selector for selectively selecting an output of the first symbol generator or an output of the second symbol generator according to a modulation mode selection signal. Should be

1 is a diagram illustrating a typical cable modem network and peripheral devices thereof;

2 is a block diagram showing a signal processing procedure for uplink transmission of a cable modem;

3 is a constellation diagram of a QPSK symbol and a 16QAM symbol for uplink transmission of a cable modem;

4 is a symbol constellation diagram for simultaneously mapping QPSK / 16QAM symbols according to the present invention;

5 is a circuit diagram of an apparatus for mapping QPSK symbols and 16QAM symbols of a cable modem according to the present invention;

FIG. 6 is a timing diagram of input / output signals of respective units shown in FIG. 5.

* Explanation of symbols for main parts of the drawings

50: control signal generator 50-1: counter 50-2: register

51: first symbol generator (16QAM symbol)

51-1: Demultiplexer 51-2 to 51-4: Register

52: second symbol generator (QPSK symbol)

52-1: Demultiplexer 52-2 to 51-3: Register

53: mode selector

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

First, the hierarchical structure of a communication method using a cable modem to help understand the present invention will be described with reference to Table 1.

Hierarchy Tier Network layer - Data connection layer Logical Link Control (LLC) sublayer Connection security sublayer Media access control (MAC) sublayer Physical layer Transmission Convergence (TC) Sublayer Physical Media Dependent (PMD) Sublayer

The protocol handled by the cable modem is the Internet Protocol (IP), and the cable modem system has a hierarchical structure as shown in Table 1 above for transparent transmission of IP messages. The hierarchical structure of the cable modem system is divided into vertical structures such as network layer, data connection layer, and physical layer. The data link layer is divided into a logical link control (LLC) sublayer, a link-security sublayer, and a medium access control (MAC) sublayer. The physical layer is divided into a transmission convergence sublayer and a physical medium dependent (PMD) sublayer.

In the above, the network layer transmits IP traffic through a cable system as an Internet protocol (IP) layer. The medium access control (MAC) sublayer of the data connection layer supports a variable length protocol data unit (hereinafter referred to as a PDU). The MAC protocol is characterized by controlling the bandwidth allocation by the CMTS, dividing the stream into minislots of predetermined time intervals from the upstream, and increasing the efficiency of bandwidth allocation by supporting packets of variable length.

The transmit convergence (TC) layer of the physical layer is present only in the downward direction to provide additional services such as digital video. The PMD sublayer supports functions such as 64QAM and 256QAM modulation schemes, error correction codes of Reed Solomon and Trellis in the downward direction, and QPSK and 16QAM modulation schemes, TDMA and fixed length frames in the upward direction. And variable length PDUs.

The CMTS 2 and the cable modems CM1 to CM4 illustrated in FIG. 1 exchange data by using a medium access control (MAC) frame which is a basic transmission unit in upstream and downstream. The structure of a MAC frame consists of a MAC header defining the contents of the MAC frame and a PDU whose length and presence are determined according to the MAC header. The MAC frame is transmitted with a physical medium dependent (PMD) sublayer overhead in front of the MAC header in the upstream and an MPEG transmission header in the downstream.

2 is a block diagram illustrating a signal processing procedure for uplink transmission of a cable modem.

The processing for upstream modulation converts the input data in the packet unit into the information block unit (21), and then codes the forward error correction (FEC) so that the error can be corrected on the communication path (22). FEC encoding applies Reed Solomon code, a kind of block code. The FEC code is scrambled to randomize the input bit stream so as not to have a specific pattern (23). The preamplifier symbol 24 pre-defined with the receiving side is added to the output data of the scrambler 23 and output to the symbol mapper 26. At this time, adding a preamble symbol to the front of the information data after the scrambled bit stream is intended to prevent interference with other channels.

The symbol mapper 26 converts the data stream into modulation symbols, performs signal shaping through the filter 27, and modulates them at the correct timing and transmits them to the cable. The controller 20 receives various parameters such as power level, frequency offset, offset range, burst length, etc. from the CMTS, and includes the block converter 21, the FEC encoder 22, the scrambler 23, and the preamplifier 24. ), The symbol mapper 26, the filter 27, and the modulator 28 are controlled.

The upstream physical media dependent (PMD) sublayer uses an FDMA / TDMA burst modulation scheme with five symbol rates and two modulation (QPSK, 16QAM) formats. Symbol rate supports 10,320,640,1280,2560ksym / sec in each QPSK mode / QAM mode. The symbol mapping rule transmits symbols by mapping input bits to I / Q constellations as shown in Table 2.

Modulation mode Input bits QPSK I ₁ Q ₁ 16QAM I ₁ Q ₁ I ₀ Q ₀

In Table 2, I ₁ is the most significant bit (MSB) of the symbol map, Q ₁ is the least significant bit (LSB) of QPSK, and Q ₀ is the LSB of 16QAM. And Q ₁ and I ₀ are placed in the middle bit position at 16QAM. The MSB corresponds to the first bit of serial data input to the symbol mapper.

3 is a constellation diagram of a QPSK symbol and a QAM symbol for uplink transmission of a cable modem. QPSK symbol mapping loads information on phase and maps 2 input bits to 1 symbol (I ₁ Q ₁ ) with 90 ° phase difference, and 16QAM symbol mapping carries information on amplitude and phase so that 4 input bits are 1 symbol (I ₁ Q ₁ I ₀ Q ₀ ).

Therefore, the input stream input according to the bit clock generates one symbol every two bit clocks in the QPSK mode, one symbol every four bit clocks in the QAM mode, and the symbol constellations of each mode are also separated separately. A symbol mapper for and a symbol mapper for QAM mode had to be provided separately.

Accordingly, the present invention implements a symbol mapper that can simultaneously map a QPSK symbol and a QAM symbol by using one mapper.

4 is a symbol constellation diagram for simultaneously mapping QPSK / QAM symbols according to the present invention, and is separately displayed to distinguish 16QAM symbols and QPSK symbols. 16QAM symbol _{(= S QAM) I 1 Q} 1 I 0 Q 0 4 -bit is assigned to, and was expressed, separated by I ₀ Q ₀ Q ₁ I ₁ to determine the phase and for determining the distance. 4 bits of I ₁ Q ₁ I ₀ Q ₀ are assigned to the QPSK symbol (= S _QPSK ), and are divided into I ₁ Q ₁ which determines the phase and I ₀ Q ₀ which determines the distance.

As shown in FIG. 4, the QPSK symbol uses four symbols (0000, 1010, 1111, 0101) among the QAM symbols. Note that the QPSK symbol assigns two input bits to one symbol, so I ₁ = I ₀ and Q ₁ = Q ₀ .

FIG. 5 is a circuit diagram of an apparatus for mapping QPSK symbols and QAM symbols of a cable modem according to the present invention, and FIG. 6 is a timing diagram of input / output signals of each part of FIG. 5.

Referring to FIG. 5, the symbol mapping apparatus includes a control signal generator 50, a first symbol generator 51 generating 16QAM symbols, a second symbol generator 52 generating QPSK symbols, and a mode selector. It consists of 53.

The control signal generator 50 includes a 2-bit counter 50-1 for counting the bit clock and a register 50-2 for storing the counter output bit C ₁ C _{0. The} output bit C ₁ C ₀ ) is provided to the QAM symbol generator 51, and the lower output bit C _{0 is} provided to the QPSK symbol generator 52.

The first symbol generator 51 may demultiplexer 51-1 for demultiplexing in four clock cycles in the order in which the input bitstreams are input, and first to delay the output of the demultiplexer 51-1 by a predetermined clock. 3rd registers 51-2 to 51-4. By each register, the first bit of the four clock periods is delayed three clocks, the second bit is delayed two clocks, the third bit is delayed one clock, and the fourth bit is delayed zero. As a result, 4 bits of 16QAM symbols are generated every 4 clock cycles. At this time, the demultiplexer 51-1 demultiplexes the clock signal in four clock cycles according to the output bit C ₁ C ₀ of the control signal generator 50.

The second symbol generator 52 is configured to demultiplex the demultiplexer 52-1 and demultiplexer 52-1 in two clock cycles in the order in which the input bitstreams are input. 2nd registers 52-2 to 52-3. The first input bit of two clocks is delayed by one clock by the first and second registers 52-2 to 52-3 and allocated to the first (I ₁ ) and third (I ₀ ) bits of the QAM symbol, and the second input bit. 0 is delayed and allocated to the second (Q ₁ ) and fourth (Q ₀ ) bits of the QAM symbol. As a result, four bits of QPSK symbols (I ₁ Q ₁ I ₀ Q ₀ ) are generated every two clock cycles. At this time, the demultiplexer 52-1 demultiplexes the clock by 2 clock cycles according to the output bit C ₀ of the control signal generator 50.

The mode selector 53 selectively outputs the 16 QAM symbol of the first symbol generator 51 or the QPSK symbol of the second symbol generator 52 according to a mode selection signal indicating whether the mode is QPSK or QAM. .

Referring to FIG. 5, 16QAM symbol and QPSK symbol mapping for an input bitstream b _i = 10100111.

(a) is a bit clock, and (b) is an input bit stream input in synchronization with the (a) bit clock. (c) is an output value (C ₁ C ₀ ) of the 2-bit counter 50-1 that counts the bit clock, and 00,01,10,11,00,... Occurs repeatedly.

16 QAM symbol generation is performed in accordance with the input bitstream 10100111... In this case, it is mapped as shown in (d). That is, (b) the input stream is input to the demultiplexer 51-1 of the QAM symbol generator 51, and the demultiplexer 51-1 receives the selection control signal of the output (C ₁ C ₀ ) of the counter (c). Demultiplex sequentially. QAM symbol generation unit 51 when the counter 00 output at the first symbol period from the output of the first register 51-2 outputs I ₁ = _1, the second register (51-3) when the counter output is 01 days The output Q ₁ = 1 of the third register 51-4 when I ₀ = 0, the counter output is 10, and the last output bit Q ₀ = 0 when the counter output is 11.

As a result, the QAM symbol generated during the first symbol period (4 bit clock) is 1100 (= I ₁ Q ₁ I ₀ Q ₀ ), and in the second symbol period, the QAM symbol is 0111 (= I ₁ Q _1). I ₀ Q ₀ ).

QPSK symbol generation is performed in accordance with the input bit stream 10100111... In this case, it is mapped as shown in (d). (b) The input stream is input to the demultiplexer 52-1 of the QPSK symbol generator 52, and the demultiplexer 52-1 receives the control signal of only the lower bit (C ₀ ) of the output of the counter (c). Demultiplex sequentially. Since the lower bit is 0 when the counter output is 00 in the first symbol period, the output of the first and second registers 52-2 to 52-3 is demultiplexed through the QPSK symbol generator 52 so that I ₁ = I ₀ = When the counter output is 01, the lower bit is 1, so it is demultiplexed to output the second and fourth bits Q ₁ = Q ₀ = 0 of the QPSK symbol.

As a result, the QPSK symbol generated during the first symbol period (4-bit clock) is 1010 (= I ₁ Q ₁ I ₀ Q ₀ ), and the QPSK symbol is 1010 (= I ₁ Q ₁ I ₀ Q ₀ ) even in the second symbol period. In the third symbol period, the QPSK symbol is 0101 (= I ₁ Q ₁ I ₀ Q ₀ ), and in the fourth symbol period, the QPSK symbol is 1111 (= I ₁ Q ₁ I ₀ Q ₀ ).

In this way, using a demultiplexer and a delay register, it generates 4 bits of 16QAM symbols every 4 bit clock cycles, generates 4 bits of QPSK symbols every 2 bit clock cycles, and generates either one of these two symbols according to the mode selection signal. Optionally output

As described above, in the cable modem supporting QPSK and 16QAM, the present invention simultaneously generates symbols for each mode using the same signal constellation, and then selects a symbol of the corresponding mode according to the mode selection signal. The present invention is implemented by a simple logic circuit such as a counter, a demultiplexer, etc., and can simultaneously support QPSK and 16QAM modes.

Claims (5)

In a system employing two or more modulation modes, the input streams are assigned to symbols of each mode in each modulation mode. A first symbol generator which demultiplexes the input bit stream in order of input and delays each bit by a predetermined clock to generate one symbol of n bits every n periods; A second symbol generator which demultiplexes the input bit stream in order of inputting and delays each bit by a predetermined clock to generate one symbol of n bits every n / 2 periods; And And a mode selection unit for selectively selecting an output of the first symbol generator or an output of the second symbol generator in accordance with a modulation mode selection signal. 2. The method of claim 1, wherein when the first symbol is a 16QAM symbol, the first input bit of 4 clocks is delayed by 3 clocks by demultiplexing in 4 clock cycles in the order in which the input bitstream of the first symbol generator is inputted to the first bit of the QAM symbol. The second bit is delayed by two clocks and allocated to the second bit of the QAM symbol, the third bit is delayed by one clock and assigned to the third bit of the QAM symbol, and the fourth bit is delayed by 0 clock and assigned to the fourth bit of the QAM symbol. The symbol mapping device of the cable modem, characterized in that for generating each 16-bit QAM symbols. 2. The method of claim 1, wherein when the second symbol is a QPSK symbol, the second input signal is demultiplexed in two clock cycles in the order in which the input bitstream of the second symbol generator is input. And assigning a third bit and a second input bit of 2 clocks delaying 0 clocks to allocate the second and fourth bits of a QPSK symbol to generate 4 bits of QPSK symbols every 2 clock cycles. 2. The cable of claim 1, wherein when the first symbol is a 16QAM symbol, a control signal for demultiplexing the input bitstream of the first symbol generator in four clock cycles is an output of a 2-bit counter counting a bit clock. Symbol mapping device for the modem. The control signal for demultiplexing the input bitstream of the second symbol generator by two clock cycles when the second symbol is a QPSK symbol uses a lower bit among the outputs of a 2-bit counter that counts the bit clock. Symbol mapping device of a cable modem, characterized in that.