KR19990035338A - Manufacturing method of thin film type optical path control device - Google Patents

Abstract

According to an aspect of the present invention, there is provided a driving substrate including M × N (M, N is an integer) transistors (not shown) embedded in a matrix and including a drain pad on one side thereof; Forming a protective layer on the driving substrate; Forming an etch stop layer on top of the protective layer; Forming a sacrificial layer on top of the etch stop layer; Etching a portion of the sacrificial layer in which the drain pad is formed to expose a portion of the etch stop layer; Forming a layer of membrane material on top of the exposed etch stop layer and on top of the sacrificial layer; Forming a lower electrode material layer on top of the membrane material layer; Forming a strained material layer on top of the lower electrode material layer; Forming an upper electrode material layer on top of the strained material layer; Patterning the upper electrode material layer pixel by pixel to form an upper electrode; Patterning the deformable material layer, the lower electrode material layer and the membrane material layer pixel by pixel to form a deformable layer, the lower electrode and the membrane; Removing the sacrificial layer to form an air gap.

Description

Manufacturing method of thin film type optical path control device

The present invention relates to a method for manufacturing a thin film type optical path control device, and in particular, a thin film type optical path capable of preventing damage to a driving substrate around an iso-cut by forming a membrane and an etch preventing layer with nitride having different etching selectivity. It relates to a manufacturing method of the adjusting device.

In general, a spatial light modulator, which is an apparatus for projecting optical energy onto a screen, may be variously applied to optical communication, image processing, and information display apparatus. Such devices are classified into a direct view type image display device and a projection type image display device according to a method of projecting a light beam incident from a light source onto a screen. The direct view image display device includes a CRT (Cathod Ray Tube), and the projection image display device includes a liquid crystal display (hereinafter referred to as an LCD), a DMD (deformable mirror device), or an AMA (Actuated). Mirror Arrays).

The above-described CRT apparatus is an excellent display apparatus which is guaranteed an average brightness of 100 ft-L (white display) or more, a contrast ratio of 30: 1 or more, a lifetime of 10,000 hours or more. However, since the CRT has a large weight and volume and maintains high mechanical strength, it is difficult to make the screen completely flat, which causes distortion of the peripheral part. In addition, since CRTs excite phosphors with an electron beam to emit light, there is a problem that a high voltage is required to produce an image.

Therefore, LCDs have been developed to solve the above-mentioned problems of CRT. The advantages of such LCDs are explained in comparison with CRTs. LCDs operate at low voltages, consume less power, and provide images without distortion.

However, despite the above-mentioned advantages, the LCD has a low light efficiency of 1 to 2% due to the polarization of the light beam, and there is a problem that the response speed of the liquid crystal material therein is slow.

Accordingly, in order to solve the problems of the LCD as described above, a device such as a DMD or an AMA has been developed. Currently, AMA can achieve a light efficiency of 10% or more, while DMD has a light efficiency of about 5%. In addition, the AMA is not only affected by the polarity of the incident luminous flux but also does not affect the polarity of the luminous flux.

Typically, the respective actuators formed inside the AMA cause deformation depending on the electric field generated by the applied image signal and bias voltage. When this actuator causes deformation, each of the mirrors mounted on top of the actuator is inclined in proportion to the magnitude of the electric field.

Thus, these inclined mirrors can reflect light incident from the light source at a predetermined angle. Piezoelectric ceramics such as PZT (Pb (Zr, Ti) O ₃ ), or PLZT ((Pb, La) (Zr, Ti) O ₃ ) are used as a constituent material of the actuator for driving the respective mirrors. As the constituent material of this actuator, electrodistorted ceramics such as PMN (Pb (Mg, Nb) O ₃ ) can be used.

The AMA is classified into a bulk type and a thin film type. Currently, AMA is the main trend of the thin-film optical path control device.

1 is a plan view of a conventional thin film type optical path control device.

Referring to FIG. 1, one side of the actuator 140 has a concave portion having a rectangular shape at the center thereof, and the concave portion is formed in a shape that becomes stepped toward both edges. The other side of the actuator 140 has a quadrangular protrusion that narrows down stepwise toward the center portion corresponding to the concave portion. Therefore, the concave portion of the actuator 140 is fitted with a rectangular protrusion of the adjacent actuator, and the rectangular protrusion is fitted with the concave portion of the adjacent actuator.

The actuators 140 are connected to adjacent actuators in a row (or column) direction. Each actuator 140 is electrically separated by neighboring actuators and the insulator 150. Thus, each actuator 140 is provided with an independent image signal. In addition, around the insulating part 150, a membrane 70 is formed of the same silicon nitride on the etch stop layer 40 shown in FIG. 2. Thus, when the membrane 70 is patterned, the etch stop layer 40 is also damaged at the same time.

2 is a cross-sectional view taken along line AA ′ of the apparatus shown in FIG. 1.

Referring to FIG. 2, the thin film type optical path control apparatus includes a driving substrate 10 having a drain pad 20 formed on one side thereof, and an actuator 140 formed thereon.

M × N (M, N is an integer) transistors are embedded in the drive substrate 10 in a matrix form. In addition, the driving substrate 10 includes a protective layer 30 and an etch stop layer 40 formed on the drain pad 20.

The actuator 140 is formed such that one side of the etch stop layer 40 is in contact with a portion where the drain pad 20 is formed, and the other side is parallel to the etch stop layer 40 through an air gap 60. (membrane: 70), the lower electrode 80 formed on the membrane 70, the strained layer 90 formed on the lower electrode 80, the upper electrode 100 formed on the strained layer 90, From the other side of the stripe 110 and the deformable layer 90 formed on a predetermined portion of the upper electrode 100, the drain pads may be formed through the lower electrode 80, the membrane 70, the etch stop layer 40, and the protective layer 30. A distribution hole 120 vertically formed up to 20, and a distribution unit 130 formed to electrically connect the lower electrode 80 and the drain pad 20 to each other in the distribution hole 120.

3A to 3D are manufacturing process diagrams of the apparatus shown in FIG. 2. 3A to 3D, the same reference numerals are used for the same members as in FIG.

Referring to FIG. 3A, MxN (M, N is an integer) insulator glass (Phospho) is formed on an upper portion of a driving substrate 10 having a matrix embedded therein and a drain pad 20 formed on one side thereof. A protective layer 30 composed of Silicate Glass (PSG) is formed.

The protective layer 30 is formed to have a thickness of about 1.0 to 2.0 μm using a chemical vapor deposition (CVD) method. The protective layer 30 protects the drive substrate 10 during subsequent processing.

The etch stop layer 40 is formed of silicon nitride (Si ₃ N ₄ ) on the upper portion of the protective layer 30. The etch stop layer 40 is formed to a thickness of about 1000 to 2000 kPa by Low Pressure Chemical Vapor Deposition (LPCVD). The etch stop layer 40 prevents the protective layer 30 and its lower portion from being damaged during the subsequent etching process.

The sacrificial layer 50 is formed on the etch stop layer 40. The sacrificial layer 50 is formed of a silicate glass having a high concentration of phosphorus (P) to a thickness of about 1.0 to 2.0 μm by an Atmospheric Pressure Vapor Deposition (APCVD) method. In this case, since the sacrificial layer 50 covers the upper portion of the driving substrate 10 in which the transistor is embedded, the flatness of the surface thereof is very poor. Therefore, the surface of the sacrificial layer 50 is planarized by using spin on glass (SOG) or chemical mechanical polishing (CMP). Subsequently, a portion of the sacrificial layer 50 in which the drain pad 20 is formed is etched to expose a portion of the etch stop layer 40.

Referring to FIG. 3B, the membrane material layer 70 ′ is stacked on top of the exposed etch stop layer 40 and on top of the sacrificial layer 50. The membrane material layer 70 ′ is formed to have a thickness of about 0.1 to 1.0 μm of silicon nitride by low pressure chemical vapor deposition.

The lower electrode material layer 80 'is formed of a material having excellent electrical conductivity such as platinum / tantalum (Pt / Ta) on the membrane material layer 70'. The lower electrode material layer 80 'is formed to a thickness of about 500 to 2000 micrometers by a sputtering method.

Referring to FIG. 3C, the strain material layer 90 ′ is formed of PZT or PLZT, which is a piezoelectric material, on the lower electrode material layer 80 ′. The deformable material layer 90 ′ is formed to have a thickness of 0.1 μm to 1.0 μm by a sol-gel method. Subsequently, the deformable material layer 90 'is phase-shifted by a rapid thermal annealing (RTA) method.

The upper electrode material layer 100 ′ is formed on the strained material layer 90 ′. The upper electrode material layer 100 ′ is formed to have a thickness of about 500 to about 2000 microseconds by sputtering a metal having excellent electrical conductivity and reflectivity such as aluminum.

Subsequently, the upper electrode material layer 100 ′ is patterned for each pixel to form the upper electrode 100. At the same time, a stripe 110 is formed in the center of the upper electrode 100. The stripe 110 uniformly operates the upper electrode 100 to prevent the incident light beam from being diffusely reflected.

Referring to FIG. 3D, the strained material layer 90 ′, the lower electrode material layer 80 ′, and the membrane material layer 70 ′ are sequentially patterned for each pixel to form the strained layer 90, the lower electrode 80, and the membrane. Form 70. However, when the membrane material layer 70 'is patterned pixel by pixel, the membrane material layer 70' and the etch stop layer 40 are formed of the same silicon nitride. The etch stop layer 40 around the insulating portion 150 shown in FIG. 1 is damaged. This is because the membrane 70 is formed on the etch stop layer 40 around the insulating portion 150. Next, the strained layer 90, the lower electrode 80, the membrane 70, the etch stop layer 40, and the protective layer 30 are sequentially formed from the upper portion of the strained layer 90 to the upper portion of the drain pad 20. Etching forms a distribution hole 120 vertically from the strained layer 90 to the drain pad 20.

Subsequently, the inside of the distribution hole 120 is filled with a metal such as tungsten, platinum or titanium to form the power distribution 130. The distributor 130 is formed by a sputtering method and electrically connects the drain pad 20 and the lower electrode 80. Therefore, the distributor 130 is vertically formed from the lower electrode 80 to the upper portion of the drain pad 20 in the distribution hole 120.

Finally, the sacrificial layer 50 is removed with hydrofluoric acid (HF) gas to form an air gap 60 to complete the thin film type optical path control device.

However, in the conventional thin film type optical path control device, since the etch stop layer and the membrane are formed of the same silicon nitride, the etch stop layer around the insulating part where the etch stop layer and the membrane are sequentially formed is damaged in the process of patterning the membrane to remove subsequent sacrificial layers. There was a problem in that the driving substrate is damaged by the hydrofluoric acid in the process.

The present invention has been made to solve the conventional problems as described above, an object of the present invention is to form a membrane around the insulating portion formed by sequentially forming the etch stop layer and the membrane of the etch stop layer and the membrane is formed of a nitride having different etching selectivity. The present invention provides a method of manufacturing a thin film type optical path control device that can prevent the etch stop layer from being damaged during the patterning process.

In order to achieve the above object, the present invention provides a driving substrate including an M × N (M, N is an integer) transistor (not shown) in a matrix form and including a drain pad on one side. Providing; Forming a protective layer on the driving substrate; Forming an etch stop layer on top of the protective layer; Forming a sacrificial layer on top of the etch stop layer; Etching a portion of the sacrificial layer in which the drain pad is formed to expose a portion of the etch stop layer; Forming a layer of membrane material on top of the exposed etch stop layer and on top of the sacrificial layer; Forming a lower electrode material layer on top of the membrane material layer; Forming a strained material layer on top of the lower electrode material layer; Forming an upper electrode material layer on top of the strained material layer; Patterning the upper electrode material layer pixel by pixel to form an upper electrode; Patterning the deformable material layer, the lower electrode material layer and the membrane material layer pixel by pixel to form a deformable layer, the lower electrode and the membrane; Removing the sacrificial layer to form an air gap.

The above objects and various advantages of the present invention will become more apparent from the preferred embodiments of the invention described below with reference to the accompanying drawings by those skilled in the art.

1 is a plan view of a conventional thin film type optical path control device,

FIG. 2 is a cross-sectional view taken along line AA ′ of the apparatus shown in FIG. 1; FIG.

3a to 3d is a manufacturing process diagram of the apparatus shown in FIG.

4 is a plan view of a thin film type optical path control apparatus according to the present invention,

5 is a cross-sectional view taken along line B-B 'of the apparatus shown in FIG. 4;

6A to 6D are manufacturing process diagrams of the apparatus shown in FIG.

<Description of Symbols for Main Parts of Drawings>

510: driving substrate 520: drain pad

530: protective layer 540: etching prevention layer

550: sacrificial layer 560: air gap

570: membrane 580: lower electrode

590 strain layer 600 upper electrode

610: stripe 620: power distribution hole

630: distributor 640: actuator

650: insulation

Hereinafter, with reference to the accompanying drawings will be described in detail the thin-film optical path control apparatus according to the present invention.

4 is a plan view of a conventional thin film type optical path control device.

Referring to FIG. 4, one side of the actuator 640 has a concave portion having a rectangular shape at the center thereof, and the concave portion is formed to have a stepped shape toward both edges. The other side of the actuator 640 has a quadrangular protrusion that narrows stepwise toward the center portion corresponding to the concave portion. Therefore, the concave portion of the actuator 640 is fitted with the rectangular protrusion of the adjacent actuator, and the rectangular protrusion is fitted with the concave portion of the adjacent actuator.

The actuators 640 are connected to adjacent actuators in a row (or column) direction. Each actuator 640 is electrically separated by neighboring actuators and the insulator 650. Thus, the respective actuators 640 are provided with independent image signals. In addition, around the insulating part 650, the membrane 570 is formed of a nitride having an etching selectivity different from that of the etch stop layer 540 on the etch stop layer 540 illustrated in FIG. 4. Thus, when the membrane 570 is patterned, the etch stop layer 540 is not damaged.

FIG. 5 is a cross-sectional view of the apparatus shown in FIG. 4 taken along line BB '.

Referring to FIG. 5, the thin film type optical path control apparatus includes a driving substrate 510 having a drain pad 520 formed on one side thereof, and an actuator 640 formed thereon.

In the driving substrate 510, M × N transistors (M and N are integers) are embedded in a matrix form. In addition, the driving substrate 510 includes a protective layer 530 and an etch stop layer 540 formed on the drain pad 520.

The actuator 640 is formed such that one side of the etch stop layer 540 contacts the portion where the drain pad 520 is formed, and the other side is parallel to the etch stop layer 540 through an air gap 560. (membrane: 570), the lower electrode 580 formed on the membrane 570, the strained layer 590 formed on the lower electrode 580, the upper electrode 600 formed on the strained layer 590, The drain pad 610 may be formed through the stripe 610 formed on a predetermined portion of the upper electrode 600, the lower electrode 580, the membrane 570, the etch stop layer 540, and the protective layer 530 from the other side of the deformation layer 590. A distribution hole 620 vertically formed up to 520, and a distribution 630 formed in the distribution hole 620 so that the lower electrode 580 and the drain pad 520 are electrically connected to each other.

6A to 6D are manufacturing process diagrams of the apparatus shown in FIG. 5. In Figs. 6A to 6D, the same reference numerals are used for the same members as in Fig. 5.

Referring to FIG. 6A, Phospho is formed on an upper portion of a driving substrate 510 in which M × N (M, N is an integer) transistors are formed in a matrix and a drain pad 520 is formed on one side. A protective layer 530 composed of Silicate Glass (PSG) is formed.

The protective layer 530 is formed to have a thickness of about 1.0 to 2.0 μm using a chemical vapor deposition (CVD) method. The protective layer 530 protects the driving substrate 510 during the subsequent process.

The etch stop layer 540 is formed of one of nitrides, such as Si ₃ N ₄ , AlN, TiN, or BN, on the upper portion of the protective layer 530, but is formed of a nitride different from the membrane 570 formed subsequently. The etch stop layer 540 is formed to a thickness of about 1000 to 2000 kPa by Low Pressure Chemical Vapor Deposition (LPCVD). The etch stop layer 540 prevents the protective layer 530 and its lower portion from being damaged during the subsequent etching process.

The sacrificial layer 550 is formed on the etch stop layer 540. The sacrificial layer 550 is formed of a silicate glass having a high concentration of phosphorus (P) to a thickness of about 1.0 to 2.0 μm by an Atmospheric Pressure Vapor Deposition (APCVD) method. In this case, since the sacrificial layer 550 covers the upper portion of the driving substrate 510 in which the transistor is embedded, the flatness of the surface thereof is very poor. Accordingly, the surface of the sacrificial layer 550 is planarized by using spin on glass (SOG) or chemical mechanical polishing (CMP). Subsequently, a portion of the sacrificial layer 550 in which the drain pad 520 is formed is etched to expose a portion of the etch stop layer 540.

Referring to FIG. 6B, a membrane material layer 570 ′ is stacked over the exposed etch stop layer 540 and over the sacrificial layer 550. The membrane material layer 570 ′ is formed of one of nitrides such as Si ₃ N ₄ , AlN, TiN, or BN to have a thickness of about 0.1 μm to 1.0 μm by a low pressure chemical vapor deposition method. However, the membrane material layer 570 ′ is formed of a nitride that is different from the etch stop layer 540. Accordingly, the membrane material layer 570 ′ and the etch stop layer 540 have different etching selectivity.

Subsequently, the lower electrode material layer 580 'is formed of a material having excellent electrical conductivity such as platinum / tantalum (Pt / Ta) on the membrane material layer 570'. The lower electrode material layer 580 'is formed to a thickness of about 500 to 2000 micrometers by a sputtering method.

Referring to FIG. 6C, the strain material layer 590 ′ is formed of PZT or PLZT, which is a piezoelectric material, on the lower electrode material layer 580 ′. The deformable material layer 590 ′ is formed to have a thickness of 0.1 μm to 1.0 μm by a sol-gel method. Subsequently, the deformable material layer 590 ′ is phase-shifted by a rapid thermal annealing (RTA) method.

The upper electrode material layer 600 ′ is formed on the strained material layer 590 ′. The upper electrode material layer 600 'is formed to have a thickness of about 500 to about 2000 kPa by sputtering a metal having excellent electrical conductivity and reflectivity such as aluminum.

Subsequently, the upper electrode material layer 600 ′ is patterned for each pixel to form the upper electrode 600. At the same time, a stripe 610 is formed at the center of the upper electrode 600. The stripe 610 operates the upper electrode 600 uniformly to prevent the incident light beam from being diffusely reflected.

Referring to FIG. 6D, the strain material layer 590 ′, the lower electrode material layer 580 ′, and the membrane material layer 570 ′ are sequentially patterned for each pixel to form the strain layer 590, the bottom electrode 580, and the membrane. 570 is formed. As such, when the membrane material layer 570 'is patterned pixel by pixel, the membrane material layer 570' and the etch stop layer 540 are formed of different silicon nitride, thereby patterning the membrane material layer 570 '. In FIG. 4, the etch stop layer 540 around the insulating part 650 shown in FIG. 4 is not damaged. This is because the etch stop layer 540 and the membrane 570 are formed of different nitrides having different etching selectivity. Next, the strained layer 590, the lower electrode 580, the membrane 570, the etch stop layer 540, and the protective layer 530 are sequentially formed from the top of the other side of the strained layer 590 to the top of the drain pad 520. By etching, a distribution hole 620 is vertically formed from the strained layer 590 to the drain pad 520.

Subsequently, the inside of the distribution hole 620 is filled with a metal such as tungsten, platinum, or titanium to form the power distribution 630. The distributor 630 is formed by a sputtering method and electrically connects the drain pad 520 and the lower electrode 580. Accordingly, the power distribution unit 630 is vertically formed from the lower electrode 580 to the top of the drain pad 520 in the distribution hole 620.

Finally, the sacrificial layer 550 is removed with hydrofluoric acid (HF) gas to form an air gap 560 to complete the thin film type optical path control device.

As described above, in the thin film type optical path control apparatus according to the present invention, the etching prevention layer and the membrane are formed of nitride having different etching selectivity, so that the etching prevention layer around the insulating part is not damaged in the process of patterning the membrane, thereby removing the sacrificial layer. There is an effect that can prevent the driving substrate from being damaged by gas or the like.

As described above, although the present invention has been described with reference to the drawings, those skilled in the art may variously modify and change the present invention without departing from the spirit and scope of the invention as set forth in the claims below. I can understand that you can.

Claims (2)

Providing a driving substrate 510 having M × N (M, N is an integer) transistors (not shown) embedded in a matrix and including a drain pad 520 on one side thereof; Forming a protective layer (530) on the drive substrate (510); Forming an etch stop layer (540) on the protective layer (530); Forming a sacrificial layer (550) on the etch stop layer (540); Etching a portion of the sacrificial layer 550 in which the drain pad 520 is formed to expose a portion of the etch stop layer 540; Forming a membrane material layer (570 ') having an etch selectivity with the etch stop layer (540) on top of the exposed etch stop layer (540) and on the sacrificial layer (550); Forming a lower electrode material layer (580 ') on top of the membrane material layer (570'); Forming a strained material layer (590 ') on the bottom electrode material layer (580'); Forming an upper electrode material layer (600 ') on top of the strain material layer (590'); Patterning the upper electrode material layer 600 'for each pixel to form an upper electrode 600; The strained material layer 590 ′, the lower electrode material layer 580 ′, and the membrane material layer 570 ′ are patterned for each pixel to form the strained layer 590, the lower electrode 580, and the membrane 570. Making a step; And removing the sacrificial layer (550) to form an air gap (560). The thin film type optical path control device of claim 1, wherein the protective layer 540 and the membrane material layer 570 ′ are made of Si ₃ N ₄ , AlN, TiN, or BN, and are formed of different materials. Manufacturing method.