KR19990029463A - Cacheable Device - Google Patents

Abstract

The invention relates to a cacheable structure in which an optical memory reading and / or writing device 2, a cache processor 5 and a large capacity recording and reading device 3 are each connected to a data bus 1. Optical memory read and / or write devices exchange information directly with the cache processor via a data bus. The cache uses a large recording and reading device 3 as cache memory.

Description

Cacheable Device

The present invention relates to a cacheable device in which information is cacheable at the output and / or input of the memory reading device and / or the recording device. The cacheable device may for example be executed in a computer system connected to the memory reading device and / or the recording device. Typically the connection is accomplished via a data bus.

Caching information from storage is a known technique. More detailed examples include well-known cache random access memory, hard disk drives, and other mass storage devices. These memory devices are used in unusual ways or in combination with computers. The prerequisite for caching a memory device is basically to provide memory where the information can be accessed more effectively from the memory device, and to copy the determined information from the memory device to faster memory and vice versa. will be. The determined information may be, for example, information that is most likely needed and information that is needed most often. Copying and identification of the determined information among the information stored in the memory device (or faster memory) is performed in the cache processor. The cache processor may be, for example, a software program that runs a computer. Therefore, cache performance improves the overall performance of an information processing system such as a microprocessor that processes information stored in RAM, or a computer that processes information stored in a large amount of peripheral storage.

Computers are typically used with auxiliary devices such as magnetic and / or optical storage devices. Such a storage device is connected to the data bus directly or indirectly. The microprocessor performs information exchange over the data bus between the data bus and the connected devices. The performance in terms of access time in the information stored in the storage device varies depending on the characteristics of the storage device. For example, magnetic hard disk drive devices typically outperform optical disk devices. It is known to cache optical disk devices that use magnetic disk drive devices as faster memory.

In one embodiment of performing a cache, the cache processor performs the cache using a direct link between the hard disk drive device and the optical disk device where information exchange is performed. The need for a direct link is that there is no other way for information to be exchanged between the optical disk device and the magnetic hard disk drive device without the involvement of a microprocessor, and thus the computer's processing speed is actually slow. On the other hand, a direct link is a piece of hardware that can be added to the production cost of a computer with auxiliary memory because it does not belong to a standard computer device.

Modern computer hardware includes a data bus over two auxiliary devices that can exchange data without any interference from other auxiliary devices connected to the data bus. This means that a microprocessor, already known as a central processing unit, can also perform tasks other than performing information exchange between two auxiliary units. For example, a microprocessor can process data stored in RAM. The data bus is based on bus IEEE 1394, for example.

It is an object of the present invention to find a solution for allowing the optical memory auxiliary device to be cached using another auxiliary memory device but precluding the condition that the optical memory auxiliary device itself must be directly connected between the two auxiliary devices. The solution should be to make the most of your computer hardware, if possible.

The solution to the above-mentioned problem according to the invention can be found in a cacheable device at the output and / or input of the optical memory reading device and / or the recording device, wherein the device is based on one or more magnetic hard disk drives. A large-capacity recording and reading device, a data bus to which a large-capacity recording and reading device is directly or indirectly connected and through which instructions are directed to reach the large-capacity recording and reading device sent from the data bus and other devices except optical storage devices, And a cache processor for caching information using a large recording and reading device. The cache processor is directly connected to a large recording and reading device. The output and / or input of the optical recording device and the cache processor are connected via a data bus to directly exchange information between the output and / or input and the cache processor.

Another solution to the above mentioned problem according to the invention is a magnetic hard disk drive device used in a computer system. The magnetic hard disk drive future includes one or more central processing units, optical memory reading and / or writing devices and data buses, and optical memory reading and / or writing devices connected directly or indirectly to the central processing unit and data buses. The magnetic hard disk drive device receives from the data bus connection circuitry for connecting the magnetic hard disk drive device to the data bus, and a request to read and / or write information to the optical storage reading and / or writing device. And a cache processor for performing information exchange between the optical memory read and / or write device and the magnetic hard disk drive device over a data bus sufficient to cache the optical memory read and / or write device.

Other objects and features of the invention will become apparent from the embodiments described below in conjunction with the accompanying drawings in which FIG. 1 includes a schematic representation of a cacheable structure.

The described embodiments are not limited thereto and other embodiments may be considered by those skilled in the art within the scope of the invention.

1 is a diagram of a data bus 1 that may be part of a computer.

Explanation of symbols for the main parts of the drawings

1: data bus 2: optical memory read and / or write device

3: multiple record and read device 5: cache processor

4, 6: Link 7: Additional Devices

The data bus 1 may be, for example, an IEEE 1394 based bus. The bus IEEE 1394 is a high speed serial bus capable of transmitting digital data. Moreover, the bus IEEE 1394 enables direct communication and data exchange between devices connected to the bus.

The optical memory reading and / or writing device 2 is connected to the data bus 1 via an output and / or input connector link 22. The optical memory reading and / or writing device 2 may for example be a CD-ROM, DVD-ROM / RAM or CD-RW drive, ie optically or magneto-optically read / write data. Optical disk drive devices provide a processing method for accessing and storing large amounts of information in a relatively inexpensive manner.

The plurality of recording and reading devices 3 are connected with the data bus 1 via a link 4. The large capacity recording and reading device 3 may for example be a magnetic hard disk drive. Magnetic hard disk drives offer an advantage in price / function ratio and are used in most computers.

The cache processor 5 is connected via the link 6 to the large capacity recording and reading device 3 and via the link 4 to the data bus 1.

The function of the plurality of recording and reading apparatuses 3 is usually superior to that of the optical memory reading and / or recording apparatus 2 in terms of access time according to information and transmission ratio. The cache processor 5 performs information exchange between the optical memory reading and / or writing device 2 directly through the data bus 1. The cache processor 5 may, for example, send a request for information to the optical memory reading and / or writing device 2, which transmits the requested information to the cache processor 5. The cache processor 5 sends the received request information to a large recording and reading apparatus for storing the received request information.

Therefore, no direct dedicated link is required between the optical memory reading and / or recording device and the large capacity recording and reading device. Cacheable structures exploit the possibility of two devices for exchanging information between each structure over a data bus.

Typically, the further device 7 is connected with the data bus 1. The further device 7 may for example be a microprocessor. The further device 7 is sent to both the large-capacity recording and reading device 3 and the cache processor 5 in place of the optical storage reading and / or recording device 2 for the request for information. The cache processor 5 processes the request for such information and obtains the requested information from the large-capacity recording and reading device 3 if the requested information is stored therein, or reads the optical memory if the requested information is not stored there. And / or obtain the required information from the recording device 2 and finally transmit the required information to the further device 7.

The cache processor 5 may also analyze the demand for information over a period of time and may analyze the demand for information according to a cache strategy. Cache strategies are well known to those skilled in the art. According to the analysis, the cache processor 5 may determine whether the determined information is requested more frequently by the further device 7 than other information. The cache processor 5 may maintain the determined information stored in the mass reading and writing device as often as required. The cache processor 5 may also execute the known cache strategy as described above, in anticipation of the need for additional device 7 information.

In a further embodiment, the cache processor 5 may be used to receive information sent by the further device 7 to the data bus 1 and be stored in the optical memory reading and / or writing device 2. have. The cache processor 5 is a large-capacity recording and reading device that stores the received information before first copying the information received from the large-capacity recording and reading device 3 to the optical memory reading and / or recording device 2. 3) will send the received information. Therefore, the recording function of the optical memory reading and / or recording device is actually increased by utilizing the recording function of the large capacity recording and reading device 3.

Devices connected to the data bus 1 exchange information using a communication protocol. In a preferred embodiment the communication protocol used between the optical memory reading and / or writing device 2 and the cache processor 5 is used between the additional device 7 and the cache processor 5 to increase unity and functionality. Could be the best version of the communication protocol.

Typically, the large capacity recording and reading device 3 may comprise a proprietary dedicated cache processor that caches the large capacity recording and reading device 3 itself. In a preferred embodiment, the cache processor 5 may include the functionality of a dedicated cache processor, thereby eliminating the need for physically distinct dedicated cache processors and further reducing costs.

Claims (4)

In a cacheable structure for caching information at the output and / or input of an optical memory reading device and / or recording device 2, One or more large capacity recording and reading devices based on magnetic hard disk drives, The large-capacity recording and reading device is indirectly or directly connected, through which instructions sent from additional devices 7 except the optical memory reading and / or recording device are sent to the large-capacity recording and reading device. A data bus (1) to reach, A cache processor 5 for caching the information using the mass recording and reading device directly connected with the mass recording and reading device, the output between the output and / or input and the cache processor. And the outputs and / or inputs of the optical memory reading device and / or recording device are connected via the data bus to convey information directly. 2. The cacheable structure of claim 1, wherein the cache processor is an essential element of the mass write and read device. 3. A cacheable structure as claimed in any preceding claim, wherein the data bus is based on a bus IEEE 1394. Magnetic hard disk drive for use in a computer system comprising one or more central processing units, optical memory reading and / or recording devices and data buses, optical memory reading and / or recording devices directly or indirectly connected to the central processing unit and data buses. As a device, in the magnetic hard disk drive device, Circuitry for connecting the magnetic hard disk drive device to the data bus; Receive the request from the data bus to read and / or write information intended for the optical memory read and / or write device, and via the data bus to cache the optical memory read and / or write device. And a cache processor for exchanging information between the memory read and / or write device and the magnetic hard disk drive device.