KR19990027857A - Current-Output Digital / Analog Converters Using Separate Current Sources - Google Patents

Abstract

Disclosed is a current output digital / analog converter using a separate current source. The current output digital / analog converter using the separate current source according to the present invention includes N switches that are inputted with first to Nth bit data and are turned on / off in response to the first to Nth bit data, and N It is connected between one side of the switches and the reference power supply and is driven when the N switches are turned on, and includes N current sources each of which is separated into quarters, each of which includes M (0≤M≤N). When the position of one of the four separated current sources constituting the (th) current source is K (≤N), the remaining separated current sources are arranged at positions of 2M-K + 1, 2M + K, and 4M-K + 1, respectively. It is done.

Description

Current-Output Digital / Analog Converters Using Separate Current Sources

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital / analog converter (DAC), and more particularly to a current output type digital / analog converter using a separate current source capable of independently canceling an inclination error and a symmetry error by using a separate current source switching. It is about.

In the conventional current output type D / A converter using a unit current source, when the current sources are arranged in one dimension, the current output value output from the unit current source is linear in one direction due to the voltage drop of the power line. Increasing or decreasing GRADED ERROR will occur. In addition, due to heat generation during operation of the D / A converter, a symmetric error (SYMMETRICAL ERROR) occurs in which the output current is symmetrical from the center in both directions. These error components generate differential non-linearity (DNL) and accumulate to increase integrated non-linearity (INL).

1 (a) and 1 (b) are diagrams for explaining the sequential cancellation of the inclination error and the generation of the symmetry error using symmetrical switching of a current output type D / A converter using a unit current source. Fig. 1 (a) shows the offset error cancellation and 1 (b) shows the occurrence of the symmetry error.

Referring to Fig. 1A, reference numeral 11 denotes an average value of a current source, and 10 denotes an inclination error. 1 (b), reference numeral 13 denotes a symmetry error.

Fig. 2 is a circuit diagram for explaining a current output type D / A converter using a conventional unit current source. The first to nth bit data B1 to Bn are input and responded to the n bit data input. N-th switches S21 to S29 to be turned on and off, and first to n-th current sources I21 to I29 connected between one side of the n switches S21 to S29 and the reference power supply GND. Therefore, the current corresponding to the n-bit data B0 to Bn to be input is output to the current output terminal IOUT.

In order to offset the tilt or symmetry error described above, a symmetrical switching technique has been used to control the switching order of the current source arrays shown in FIG. 1 (a) or 1 (b). However, in the conventional symmetrical switching technique, the slope error component is canceled out, but the symmetric error component is not canceled out. Therefore, a hierarchical switching technique is used as a method that can offset the symmetry error.

3 (a) and 3 (b) are diagrams for explaining the sequential cancellation of the inclination error and the symmetry error using the conventional hierarchical switching. 3 (a) shows the cancellation of the inclination error 30, and 3 ( b) indicates the cancellation of the symmetry error 33, and reference numeral 31 indicates the average value of the current source.

That is, in the conventional symmetrical switching technique shown in FIGS. 1 (a) and 1 (b), the inclination error component is canceled only when two unit current sources are driven. In addition, in the hierarchical switching technique illustrated in FIGS. 3A and 3B, two unit current sources must be driven to cancel the symmetric error component, and four unit current sources must be driven to cancel the gradient error. do. The conventional D / A converter using the unit current source can improve the INL by preventing the accumulation of errors, but there is a problem that the DNL increases because the error of each unit current source cannot be reduced.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a current output type D / A converter using a separate current source capable of independently canceling an inclination error and a symmetrical error by dividing one unit current source into separate current sources and symmetrically disposing them. .

1 (a) and 1 (b) are diagrams for explaining an inclination error and a symmetry error using symmetrical switching of a current output type digital / analog converter using a unit current source.

2 is a circuit diagram for explaining a current output digital / analog converter using a conventional unit current source.

3 (a) and 3 (b) are diagrams for explaining the sequential cancellation of the tilt error and the symmetry error using a conventional hierarchical symmetrical switching.

4 (a) and 4 (b) are diagrams for explaining the independent offset of the inclination error and the symmetry error using the separation current source switching of the current output type analog / digital converter using the separation current source according to the present invention.

5 is a circuit diagram of a preferred embodiment for explaining a current output type digital to analog converter using a separate current source according to the present invention.

In order to achieve the above object, the current output type D / A converter using a separate current source according to the present invention, the first to N-bit data is input, the N is turned on / off in response to the first to N-bit data It is preferable that the switch is connected between one side of the N switches and the reference power supply and driven when the N switches are turned on, each consisting of N current sources each consisting of a 1/4 separated current source.

Hereinafter, a current output type D / A converter using a separate current source according to the present invention will be described with reference to the accompanying drawings.

4 (a) and 4 (b) are diagrams for explaining independent offsets of the inclination error and the symmetry error using the switching current source switching of the current output type D / A converter using the separation current source according to the present invention. ) Denotes the offset of the inclination error 40, and 4 (b) denotes the offset of the symmetry error 43.

4 (a) and 4 (b), reference numeral 41 denotes an average value of a current source, 40 denotes an inclination error, and 43 denotes a symmetry error.

FIG. 5 is a circuit diagram of a preferred embodiment for explaining a current output type D / A converter using a separate current source according to the present invention, wherein first to nth bit data are input and inputted to the first to nth bit data. N unit current sources I51 to I59 which are connected in response to n switches S51 to S59, one side of the n switches and the reference power supply GND, and each of which is separated into quarters. Is done.

In the current output type D / A converter having the separated current source shown in Fig. 5, if the number of unit current sources I51 to I59 is n, the total number of N of the separated current sources is 4n. The D / A converter has 2 ⁿ output levels if the number of input bits is n, and therefore, 2 for current control that can control n current sources I5 to I59 from the n switches S51 to S59. ⁿ control signals are obtained. That is, since n bits of data are input to turn on / off the switch, the current source is driven or blocked accordingly. Therefore, when the total current control signals are combined, 2 ⁿ control signals are generated. When the current of the most significant bit (MSB) is I / 2, when the first bit data B1 is input and the switch S51 is turned on, I / 2 flows in the current source I51. When the two-bit data B2 is input and the switch S52 is turned on, I / 4 flows through the current source I52. In this way, the n-th bit data Bn, which is the least significant bit LSB, is input and the nth When the switch S59 is driven, a current of I / 2 ⁿ flows in the current source I59. That is, a current corresponding to the input n-bit data is generated and output through the current output terminal IOUT.

The D / A converter having a separate current source according to the present invention divides one unit current source into four unit current sources having an output of 1/4 LSB (Least Significant Bit) in FIGS. 4 (a) and 4 (b). Place symmetrically as shown. A and b shown in FIG. 4 are separate current sources constituting one of the current sources I51 to I59 of FIG. 5, respectively, and a or b are symmetrically arranged in any order.

That is, since four separate current sources constituting one unit current source are simultaneously driven to obtain a value of 1LSB, each 1LSB output is not canceled sequentially as in the conventional symmetrical switching technique. The tilt error 40 shown in Fig. 4 and the symmetry error 43 shown in Fig. 4 (b) are independently canceled. Therefore, INL and DNL can be improved at the same time. That is, in the D / A converter having a separate current source, the switching order is irrelevant, and four separate current sources forming one unit current source are arranged in the following positions.

First, the current output type D / A converter having a separate current source according to the present invention shown in FIG. 5 has 4n separated current sources when the number of unit current sources is n as described above. At this time, if one of four separate current sources constituting any m-th unit current source among the n unit current sources I51 to I59 is k (k≤n), the remaining three separated current sources are 2n-k + 1, 2n + k and 4n-k + 1.

For example, when the position of one of the four separate current sources constituting the first current source, that is, the current sources I51 of the unit current sources I51 to I59 illustrated in FIG. 5 is 0, the remaining three separate current sources are shown in FIG. As shown in a) or (b), they are arranged at positions 2n + 1, 2n, 4n + 1. Similarly, if the position of one of the four separate current sources constituting the second current source I52 is 1, the remaining three separate current sources of the current source I52 are disposed at positions 2n, 2n + 1, and 4n, respectively.

Further, in the D / A converter according to the present invention, the symmetrical arrangement of the separated current sources as shown in FIGS. 4 (a) and 4 (b) is applied to not only one-dimensional arrays of current sources but also two-dimensional arrays. It is also possible. In the case of a two-dimensional array, 16 separate current sources with an output of 1 / 16LSB operate as one unit current source, so that four separate current sources on the x-axis and four separate current sources on the y-axis are symmetrical in the same manner as in the one-dimensional case. Is placed.

According to the present invention, instead of canceling the error sequentially by the switching order of the unit current sources, the INL and the DNL can be improved simultaneously because each of the four separate unit current sources cancels the error independently.

Claims (1)

N switches for inputting first to Nth bit data and turned on / off in response to the first to Nth bit data; And Connected between one side of the N switches and a reference power source and driven when the N switches are turned on, each including N current sources consisting of a separate current source divided into quarters; When the position of one of four separate current sources forming the M (0≤M≤N) th current source among the N current sources is K (≤N), the remaining current sources are 2M-K + 1, 2M + K, and 4M, respectively. A current output digital / analog converter using a separate current source, characterized in that it is disposed at the position of -K + 1.