KR19990013609U - Chamber of Semiconductor Etching Equipment - Google Patents

Chamber of Semiconductor Etching Equipment Download PDF

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Publication number
KR19990013609U
KR19990013609U KR2019970026919U KR19970026919U KR19990013609U KR 19990013609 U KR19990013609 U KR 19990013609U KR 2019970026919 U KR2019970026919 U KR 2019970026919U KR 19970026919 U KR19970026919 U KR 19970026919U KR 19990013609 U KR19990013609 U KR 19990013609U
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focus ring
chamber
plasma
wafer
etching
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KR2019970026919U
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Korean (ko)
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KR200177296Y1 (en
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이창환
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구본준
엘지반도체 주식회사
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32798Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
    • H01J37/32853Hygiene
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32623Mechanical discharge control means
    • H01J37/32642Focus rings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67069Apparatus for fluid treatment for etching for drying etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32715Workpiece holder
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Analytical Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Health & Medical Sciences (AREA)
  • Epidemiology (AREA)
  • Public Health (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

본 고안은 반도체 식각장비의 챔버에 관한 것으로, 종래에는 플라스마가 웨이퍼 상에 입사될 때 임피던스(impedance)가 낮은 외측 포커스 링의 내측부쪽으로 쏠리면서 식각을 촉진시켜 석영성 파티클을 발생시키는 문제점이 있었던바, 본 고안의 반도체 식각장비의 챔버는 플라스마가 접하게 되는 외측 포커스 링의 상면 면적을 하면의 면적보다 작게 함으로써, 식각공정 중 발생하는 장비이물을 억제하고 파티클을 감소시킬 수 있게 한 것이다.The present invention relates to a chamber of a semiconductor etching apparatus, and in the related art, when plasma is incident on a wafer, a problem of generating quartz particles by promoting etching while being directed toward an inner side of an outer focus ring having a low impedance is low. , The chamber of the semiconductor etching equipment of the present invention is to make the upper surface area of the outer focus ring in contact with the plasma smaller than the area of the lower surface, thereby suppressing the foreign material generated during the etching process and to reduce the particles.

Description

반도체 식각장비의 챔버Chamber of Semiconductor Etching Equipment

본 고안은 반도체 제조장비에 관한 것으로, 특히 반도체 식각장비의 챔버에 관한 것이다.The present invention relates to a semiconductor manufacturing equipment, and more particularly to a chamber of a semiconductor etching equipment.

반도체 공정이 고집적화됨에 따라 요구되어 지는 조건 중 하나인 장비이물의 저감은 생산성과 밀접한 관계를 맺고 있기 때문에 제어가 필요한 항목이다.As the semiconductor process is highly integrated, the reduction of equipment foreign material, which is one of the requirements, is an item that needs to be controlled because it is closely related to productivity.

이에 따라 식각 반응이 이루어지는 챔버(chamber) 내의 부품들은 챔버내 이물발생을 최대한 억제하기 위해서 식각이 최소화되는 것을 사용하고 있다.Accordingly, the components in the chamber where the etching reaction is performed are used to minimize the etching in order to minimize foreign matter generation in the chamber.

첨부한 도 1은 종래의 반도체 식각장비의 챔버를 개략적으로 도시한 종단면도로서, 종래의 챔버는 탑 파워(top power)(1)가 인가되는 상부 전극(upper electrode)(2)과, 이 상부 전극(2)의 고정 및 플라스마(plasma)를 가두는 용도로 사용되는 쉴드 링(shield ring)(3)과, 웨이퍼(4)를 정전기적인 힘으로 고정시키는 정전척(electro static chuck)(5)과, 이 정전척(5) 주변에서 플라스마를 가두는 용도로 설치되는 이중 포커스 링(focus ring)과, 하부 전극 역할을 하는 정전척(5)에 파워를 인가해주는 보텀 파워(bottom power)(6)로 구성된다.1 is a longitudinal cross-sectional view schematically showing a chamber of a conventional semiconductor etching equipment, which includes an upper electrode 2 to which a top power 1 is applied, and an upper portion thereof. Shield ring 3 used for fixing electrode 2 and confining plasma, and electrostatic chuck 5 for fixing wafer 4 with electrostatic force And a double focus ring installed for confining the plasma around the electrostatic chuck 5 and a bottom power 6 for applying power to the electrostatic chuck 5 serving as a lower electrode. It is composed of

상기 쉴드 링(3)은 석영 재질로 되어 있고, 상기 이중 포커스 링은 내측 포커스 링(7)과 외측 포커스 링(8)으로 이루어지는데, 내측 포커스 링(7)은 도체성 물질(Si)로 제작되어 웨이퍼(4)의 주변부까지 플라스마를 가두고, 웨이퍼(4) 가장자리부의 식각률이 저하되는 것을 방지하여 웨이퍼(4) 전표면에 걸쳐 균일한 식각이 이루어 질 수 있도록 균일성(uniformity)를 개선하는 역할을 한다.The shield ring 3 is made of quartz, and the double focus ring consists of an inner focus ring 7 and an outer focus ring 8, and the inner focus ring 7 is made of a conductive material Si. To confine the plasma to the periphery of the wafer 4 and to prevent the etching rate of the edge of the wafer 4 from decreasing, thereby improving uniformity so that uniform etching is performed over the entire surface of the wafer 4. Play a role.

외측 포커스 링(8)은 부도체인 석영재질로 되어 있고 플라스마를 가두는 동시에 정전척(5)을 플라스마의 습격(attack)에서 보호해주며 보텀 파워(6)의 확산에 의한 파워 로스(power loss)를 줄여주는 역할을 한다.The outer focus ring 8 is made of quartz material which is a non-conductor, which traps the plasma and protects the electrostatic chuck 5 from the plasma attack and prevents power loss due to the diffusion of the bottom power 6. It serves to reduce.

상기 내측 포커스 링(7)은 凸자의 단면형상으로 되어 있고, 이 내측 포커스 링(7)에 결합되어 있는 외측 포커스 링(8)은 'ㄱ'자의 단면형상으로 되어 있다.The inner focus ring 7 has a cross-sectional shape of a U-shape, and the outer focus ring 8 coupled to the inner focus ring 7 has a cross-sectional shape of a '-'.

상기와 같은 구성의 반도체 식각장비의 챔버를 이용하여 식각공정을 진행하는 공정조건은 첫째, 파워를 인가하지 않은 상태에서 조건을 맞추어주는 안정화 단계(stabilization step), 둘째, 파워를 인가하여 식각을 진행하는 단계(etching step), 셋째, 파워를 인가하지 않은 상태로 웨이퍼(4) 냉각매개체로 사용되는 웨이퍼(4) 뒷면의 헬륨(helium)을 펌핑(pumping)하고, 플라스마 오프(plasma off) 상태에서 정전척(5)의 척킹력(chucking force)을 없애기 위해 척(5)에 인가된 직류 전압(DC voltage)을 오프(off)시키는 단계(dechucking step), 넷째, 웨이퍼(4) 반송후 차지(charge)된 챔버내를 디스차지(discharge)시키는 단계(discharge step)로 나누어진다.Process conditions for performing the etching process using the chamber of the semiconductor etching equipment of the configuration as described above, first, a stabilization step to meet the conditions without applying power, second, applying the power to proceed the etching (Etching step), third, helium (pumping) of the back of the wafer (4) used as the cooling medium of the wafer (4) without applying power, and in the plasma off state (plasma off) Dechucking step of turning off the DC voltage applied to the chuck 5 in order to remove the chucking force of the electrostatic chuck 5, and fourth, the charge after the wafer 4 transfer ( It is divided into a discharge step of discharging the charged chamber.

상기와 같은 종래의 반도체 식각장비의 챔버는 외측 포커스 링(8)이 'ㄱ'자의 단면형상으로 되어 있어 내측부가 외측부에 비해 상대적으로 두께가 얇기 때문에 내측부가 외측부보다 낮은 임피던스(impedance)값을 나타내게 된다.In the chamber of the conventional semiconductor etching equipment as described above, since the outer focus ring 8 has a cross-sectional shape of the letter 'A', the inner part is relatively thinner than the outer part so that the inner part has a lower impedance than the outer part. do.

이와 같은 외측 포커스 링(8) 내측부의 낮은 임피던스 값은 하부 전극(6)상에 파워가 온(on)되어 플라스마가 웨이퍼(4) 상에 입사될 때 외측 포커스 링(8)의 내측부쪽으로 플라스마가 쏠리는 현상을 가져오고, 이는 링(8)의 식각을 촉진시켜 석영성 파티클을 발생시키는 문제점이 있었다.This low impedance value inside the outer focus ring 8 causes the plasma to move towards the inner side of the outer focus ring 8 when power is turned on on the lower electrode 6 and the plasma is incident on the wafer 4. This results in the phenomenon of pulling, which promotes the etching of the ring 8 has a problem of generating quartz particles.

이로 인해 웨이퍼(4) 상에 이물이 떨어지게 되고, 외측 포커스 링(8)의 내측부는 외측부에 비해 상대적으로 식각이 많이되어 부품의 교체주기도 빈번하게 되므로 이로인해 생산성과 장비가동률도 떨어지게 되는 문제점이 있었던바, 이에 대한 보완이 요구되어 왔다.As a result, foreign matters fall on the wafer 4, and the inner part of the outer focus ring 8 is more etched compared to the outer part, and thus the replacement cycle of parts is frequent, thereby reducing productivity and equipment utilization rate. Bars have been required to supplement this.

따라서, 본 고안은 상기와 같은 문제점을 감안하여으로서, 식각공정 중 발생하는 장비의 이물을 억제하여 파티클을 감소시킬 수 있는 반도체 식각장비의 챔버를 제공하는데 그 목적이 있다.Accordingly, an object of the present invention is to provide a chamber of semiconductor etching equipment capable of reducing particles by suppressing foreign substances in equipment generated during an etching process.

도 1은 종래의 반도체 식각장비의 챔버를 개략적으로 도시한 종단면도.1 is a longitudinal sectional view schematically showing a chamber of a conventional semiconductor etching equipment.

도 2는 본 고안의 반도체 식각장비의 챔버를 개략적으로 도시한 종단면도.Figure 2 is a longitudinal sectional view schematically showing a chamber of the semiconductor etching equipment of the present invention.

(도면의 주요부분에 대한 부호의 설명)(Explanation of symbols for the main parts of the drawing)

1; 탑 파워(top power) 2; 상부 전극One; Top power 2; Upper electrode

3; 쉴드 링(shield ring) 4; 웨이퍼3; Shield ring 4; wafer

5; 정전척 6; 보텀 파워(bottom power)5; Electrostatic chuck 6; Bottom power

10; 내측 포커스 링 20; 외측 포커스 링10; Inner focus ring 20; Outer focus ring

상기와 같은 목적을 달성하기 위하여 본 고안은 웨이퍼를 고정시키는 정전척과, 이 정전척의 주변에 설치되어 웨이퍼의 전표면에 걸쳐 식각이 균일하게 되도록 플라스마를 가두는 도체성 포커스 링과, 이 도체성 포커스 링의 외측에 결합되는 부도체성 포커스 링을 포함하여 구성되는 챔버에 있어서; 상기 부도체성 포커스 링은 상기 플라스마에 의해 일측이 식각되는 것을 방지하도록 상기 플라스마가 접하게 되는 상면의 면적이 하면의 면적보다 작은 것을 특징으로 하는 반도체 식각장비의 챔버가 제공된다.In order to achieve the above object, the present invention provides an electrostatic chuck for fixing a wafer, a conductive focus ring installed around the electrostatic chuck and confining plasma so that etching is uniform over the entire surface of the wafer, and the conductive focus. A chamber comprising a non-conductive focus ring coupled to an outer side of the ring; The non-conductive focus ring is provided with a chamber of the semiconductor etching equipment, characterized in that the area of the upper surface is in contact with the plasma is smaller than the area of the lower surface to prevent one side is etched by the plasma.

상기 도체성 포커스 링은 중앙에 단차부가 형성된 단면 형상이고, 상기 부도체성 포커스 링은 상기 단차부에 결합가능하도록 1차 절곡된 단면형상으로 된 것을 특징으로 한다.The conductive focus ring has a cross-sectional shape having a stepped portion at the center thereof, and the non-conductive focus ring has a cross-sectional shape that is primarily bent to be coupled to the stepped portion.

이하, 본 고안에 따른 반도체 식각장비의 챔버의 일실시예를 첨부한 도면을 참조로 하여 상세히 설명하면 다음과 같다.Hereinafter, with reference to the accompanying drawings, an embodiment of a chamber of a semiconductor etching apparatus according to the present invention will be described in detail as follows.

본 고안의 반도체 식각장비의 챔버는, 도 2에 도시한 바와 같이, 탑 파워(top power)(1)가 인가되는 상부 전극(upper electrode)(2)과, 이 상부 전극(2)의 고정 및 플라스마(plasma)를 가두는 용도로 사용되는 쉴드 링(shield ring)(3)과, 웨이퍼(4)를 정전기적인 힘으로 고정시키는 정전척(5)과, 이 정전척(5) 주변에서 플라스마를 가두는 용도로 설치되는 이중 포커스 링(focus ring)과, 하부 전극 역할을 하는 정전척(5)에 파워를 인가해주는 보텀 파워(bottom power)(6)로 구성되는 것으로, 전체적인 구성은 종래의 기술과 동일하다.As shown in FIG. 2, the chamber of the semiconductor etching apparatus of the present invention includes an upper electrode 2 to which a top power 1 is applied, a fixing of the upper electrode 2, and a top electrode 2. A shield ring (3) used for confining the plasma, an electrostatic chuck (5) for fixing the wafer (4) with an electrostatic force, and a plasma around the electrostatic chuck (5). The confinement consists of a double focus ring installed for use and a bottom power 6 for applying power to the electrostatic chuck 5 serving as the lower electrode. Is the same as

상기 이중 포커스 링은 내측 포커스 링(10)과, 이 내측 포커스 링(10)에 결합되는 외측 포커스 링(20)으로 이루어진다.The dual focus ring consists of an inner focus ring 10 and an outer focus ring 20 coupled to the inner focus ring 10.

상기 내측 포커스 링(10)은 도체성 물질(Si)로 된 것으로, 도 2에 도시한 바와 같이, 중앙에 단차부가 형성된 단면 형상이고, 상기 외측 포커스 링(20)은 상기 단차부에 결합가능하도록 1차 절곡된 'ㄴ' 자의 단면 형상이다.The inner focus ring 10 is made of a conductive material (Si), as shown in Figure 2, has a cross-sectional shape with a stepped portion in the center, the outer focus ring 20 is coupled to the stepped portion It is the cross-sectional shape of 'b' ruled first.

상기 외측 포커스 링(20)은 부도체성 물질인 석영재질이다.The outer focus ring 20 is made of quartz, which is a non-conductive material.

상기와 같은 구성을 가진 본 고안의 작용을 설명하면 다음과 같다.Referring to the operation of the present invention having the configuration as described above are as follows.

식각 공정을 진행하는 공정조건은 종래의 기술과 동일하며, 파워를 인가하는 단계에서 상부 전극(2)에 파워가 온(on)되어 플라스마를 형성시키고 하부 전극(5)에 파워가 온되어 발생된 플라스마를 상기 정전척(5) 상의 웨이퍼(4)로 입사시킬 때 주변에 설치되어 있는 이중 포커스 링도 웨이퍼(4)와 같이 플라스마에 노출되게 된다.Process conditions for the etching process are the same as in the prior art, the power is turned on (on) in the step of applying power to form a plasma and the power generated on the lower electrode (5) When the plasma is incident on the wafer 4 on the electrostatic chuck 5, the double focus ring provided at the periphery is exposed to the plasma like the wafer 4.

이때, 본 고안의 외측 포커스 링(20)은 플라스마가 접하게 되는 상면의 면적을 하면의 면적보다 작게 한 형태이기 때문에 플라스마에 노출되는 부분 중 상대적으로 두께가 얇은 부분이 없게 되고, 따라서 링(20)의 어느 일측도 낮은 임피던스(impedance)값을 갖지 않게 된다.At this time, since the outer focus ring 20 of the present invention has a shape smaller than the area of the lower surface of the upper surface that the plasma is in contact with, there is no relatively thin portion of the portion exposed to the plasma, and thus the ring 20 Neither side of has a low impedance value.

따라서, 플라스마가 링(20)의 일측으로 쏠리는 현상을 방지할 수 있으므로 링(20)의 식각을 방지하여 석영성 파티클이 발생하는 것을 막을 수 있게 된다.Therefore, since the plasma may be prevented from being concentrated toward one side of the ring 20, the etching of the ring 20 may be prevented to prevent the generation of quartz particles.

본 고안의 반도체 식각장비의 챔버에 의하면 식각 공정 중 발생되는 장비 이물을 억제하여 파티클 감소효과가 있으며 이에 따라 생산성이 향상되고 장비가동률을 향상시킬 수 있는 효과가 있다.According to the chamber of the semiconductor etching equipment of the present invention, there is an effect of reducing particles by suppressing equipment foreign substances generated during the etching process, thereby improving productivity and improving the equipment operation rate.

또한, 소모성 부품중의 하나인 포커스 링의 수명이 연장되어 생산 단가를 저감시킬 수 있는 효과가 있다.In addition, the life of the focus ring, which is one of the consumable parts, can be extended to reduce the production cost.

Claims (2)

웨이퍼를 고정시키는 정전척과, 이 정전척의 주변에 설치되어 웨이퍼의 전표면에 걸쳐 식각이 균일하게 되도록 플라스마를 가두는 도체성 포커스 링과, 이 도체성 포커스 링의 외측에 결합되는 부도체성 포커스 링을 포함하여 구성되는 챔버에 있어서; 상기 부도체성 포커스 링은 상기 플라스마에 의해 일측이 식각되는 것을 방지하도록 상기 플라스마가 접하게 되는 상면의 면적이 하면의 면적보다 작은 것을 특징으로 하는 반도체 식각장비의 챔버.An electrostatic chuck that holds the wafer, a conductive focus ring disposed around the electrostatic chuck and confining the plasma so that etching is uniform over the entire surface of the wafer, and a non-conductive focus ring coupled to the outer side of the conductive focus ring. A chamber comprising: The nonconductive focus ring is a chamber of the semiconductor etching equipment, characterized in that the area of the upper surface is in contact with the plasma is smaller than the area of the lower surface to prevent the side is etched by the plasma. 제 1 항에 있어서, 상기 도체성 포커스 링은 중앙에 단차부가 형성된 단면 형상이고, 상기 부도체성 포커스 링은 상기 단차부에 결합가능하도록 1차 절곡된 단면형상으로 된 것을 특징으로 하는 반도체 식각장비의 챔버.The semiconductor etching apparatus of claim 1, wherein the conductive focus ring has a cross-sectional shape having a stepped portion at the center thereof, and the non-conductive focus ring has a cross-sectional shape that is primarily bent to be coupled to the stepped portion. chamber.
KR2019970026919U 1997-09-27 1997-09-27 Chamber for semiconductor etching apparatus KR200177296Y1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110246741A (en) * 2018-03-07 2019-09-17 东京毅力科创株式会社 Substrate-placing tectosome and plasma processing apparatus

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110246741A (en) * 2018-03-07 2019-09-17 东京毅力科创株式会社 Substrate-placing tectosome and plasma processing apparatus
KR20190106694A (en) * 2018-03-07 2019-09-18 도쿄엘렉트론가부시키가이샤 Substrate mounting structure and plasma processing apparatus
CN110246741B (en) * 2018-03-07 2021-07-30 东京毅力科创株式会社 Substrate mounting structure and plasma processing apparatus

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