KR19990005817A - Fine Pattern Formation Method of Semiconductor Device - Google Patents

Abstract

Disclosed is a method for forming a fine pattern of a semiconductor device which enables to form a fine pattern outside the limit resolution of an exposure apparatus. The method of forming a micropattern of the present invention includes the steps of applying a photosensitive film to an etched layer formed on a semiconductor substrate; Forming an incomplete photosensitive film pattern having irregularities but not exposing the etched layer by applying exposure and development by applying a mask having a fine pattern exceeding a resolution limit of an exposure apparatus to the photosensitive film; Obtaining an incomplete etching pattern in which only an upper portion of the etched layer is recessed to a predetermined depth by performing dry etching using the incomplete photoresist pattern; Forming a buffer thin film having a high etching selectivity with the etched layer on the resultant of obtaining the incomplete etching pattern; Forming an upper buffer pattern by etching back the buffer thin film to planarize to leave only the buffer thin film formed on the recessed portion and to expose the remaining portion of the etched layer; And dry etching the etched layer by applying the upper buffer pattern as an etch mask. According to the present invention, a fine pattern deviating from the limit resolution of the exposure equipment can be formed while using the conventional exposure equipment as it is, and thus the manufacturing cost of the semiconductor device caused by the expensive exposure equipment can be prevented.

Description

Fine Pattern Formation Method of Semiconductor Device

The present invention relates to a method of forming a fine pattern of a semiconductor device, and more particularly to a method of forming a fine pattern in a semiconductor device by applying a mask having a fine pattern exceeding the resolution limit of the exposure equipment.

At present, with the progress of high speed and high integration of semiconductor devices, advances have been made in the production technology of semiconductor devices. Accordingly, the necessity of miniaturization of patterns of semiconductor devices is increasing. In general, in the manufacture of semiconductor devices, a pattern uses a lithography process of etching an underlayer film using a photosensitive polymer pattern as a mask. Such a conventional method of forming a pattern will be briefly described with reference to FIGS. 1 and 2. Is as follows.

First, an etching target layer 12, which is an etching target material layer, is formed on the semiconductor substrate 10 on which the underlying layer is formed. After the photoresist is applied on the etched layer 12 to a thickness of about 0.5 μm to 3 μm, an exposure process (indicated by an arrow 18 in the drawing) is applied through the exposure mask 16, and developed to form an etching mask. Phosphoric photosensitive film pattern 14 is obtained.

Then, by applying a dry etching process or a wet etching process, the etched layer of the exposed portion where the photoresist pattern 14 is not formed is removed, and the photoresist pattern 14 is removed to remove the final pattern 13 as shown in FIG. To form.

On the other hand, in the conventional lithography process to which the exposure equipment is applied as described above, the resolution is determined by the following Rayleigh's Equation.

Here, R is the resolution, λ is the exposure wavelength, NA is the numerical aperture of the lens of the exposure equipment, k is a process-related constant, a value that varies depending on process capability, but is about 0.7 in the mass production stage.

However, in exposure wavelength, g-line (g-line), which is a light source mainly used in the mass production stage, is 0.436 µm and i-line (i-line) is 0.365 µm, and deep ultraviolet rays recently introduced in the mass production stage (Deep Ultra Violet; hereinafter abbreviated as DUV) The light source is 0.248 mu m. When the numerical aperture of the lens is about 0.5, the values of 0.5 μm, 0.4 μm, and 0.3 μm for the g-line, i-line, and DUV, respectively, are substituted for each variable in Equation 1 above.

Therefore, in order to improve the resolution, it can be seen that the shorter the wavelength of the light source used in the exposure equipment is advantageous. For this purpose, equipment using i-rays rather than g-rays, rather DUV or soft X-rays is preferred. However, since it is difficult to obtain an exposure source having a short wavelength, the cost of the equipment increases exponentially as the equipment using the short wavelength light source increases the manufacturing cost of the semiconductor device. In addition, equipment using light sources with wavelengths shorter than that of DUVs is currently under development, requiring special technology to form the next generation of fine patterns.

An alternative to this is a method of forming a micropattern using sillation, which is briefly described as a method of forming a micropattern using a process of reacting a photoresist with silicon to form a mask. However, the process using the silylation has a problem that it is complicated to apply to the actual process because it must go through a complex chemical reaction.

In order to solve the above problems of the prior art, an object of the present invention is to provide a method of forming a fine pattern of a semiconductor device that forms a fine pattern outside the limit resolution of the exposure equipment while using the conventional exposure equipment as it is.

1 and 2 are cross-sectional views illustrating a method for forming a micropattern according to the prior art;

3 to 9 are cross-sectional views illustrating a process sequence for explaining a method for forming a fine pattern according to an embodiment of the present invention.

Explanation of Signs of Major Parts of Drawings

10, 20... Semiconductor substrate

12, 22... Etched layer

14, 24... Photoresist pattern

16, 26... Mask

18, 28... Exposure process

23. Etching pattern

30. Buffer thin film

32. Upper Buffer Pattern

13, 34... Final pattern

35. Flat Fine Pattern

The method of forming a fine pattern of a semiconductor device of the present invention for achieving the above object comprises the steps of: (a) applying a photosensitive film to the etched layer formed on the semiconductor substrate; (b) forming an incomplete photosensitive film pattern having irregularities but not exposing the etched layer by applying exposure and development by applying a mask having a fine pattern exceeding a resolution limit of an exposure apparatus to the photosensitive film; (c) obtaining an incomplete etching pattern in which only an upper portion of the etched layer is recessed to a predetermined depth by performing dry etching using the incomplete photoresist pattern; (d) forming a buffer thin film having a high etching selectivity with the etched layer on the resultant of step (c); (e) forming an upper buffer pattern by etching back the buffer thin film to planarize to leave only the buffer thin film formed on the recessed portion and to expose the remaining portion of the etched layer; (f) applying the upper buffer pattern as an etch mask to dry etch the etched layer.

In the present invention, the buffer thin film may be formed of a polysilicon layer, and the etch back of step (e) is preferably made through a chemical mechanical polishing (CMP) process.

In addition, after the step (f), (g) removing the upper buffer pattern to leave only the pattern of the etched layer; (h) further comprising the step of removing the protruding portion of the corner of the etched layer pattern may be left only the pattern of the etched layer, in this case, the step of removing the protruding portion in the blank (blank) etching or CMP process More preferably.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In addition, this embodiment does not limit the scope of the present invention, but is presented by way of example only.

3 to 9 are process cross-sectional views illustrating a method of implementing a method for forming a fine pattern of a semiconductor device according to an embodiment of the present invention.

3, after the photoresist is applied onto the etched layer 22 formed on the semiconductor substrate 20, an exposure process is performed through a mask 26 having a fine pattern exceeding the resolution limit of the exposure equipment (Fig. (Shown by arrow 28 in the drawing) is applied and developed to obtain a photosensitive film pattern 24 that is an etching mask. At this time, since the mask 26 has a fine pattern exceeding the resolution limit of the exposure equipment, the formed photoresist pattern 24 is in an incomplete state in which the etched layer 22 is not exposed while having unevenness.

In FIG. 4, the dry etching is performed using the incomplete photoresist pattern 24 to obtain an incomplete etching pattern 23 in which only an upper portion of the layer to be etched is recessed to a predetermined depth. In this case, the depth and width of the etched layer may be determined by variously selecting an etching time or an etching gas according to the width of the final fine pattern required.

5 shows a state in which the material constituting the etching pattern 23 and the buffer thin film 30 having a high etching selectivity are formed on the etching pattern 23. In this embodiment, the etching pattern 23 is formed. ) Is made of silicon oxide film, the buffer thin film 30 is formed of polycrystalline silicon, respectively.

In the step shown in FIG. 6, the buffer thin film 30 is etched back so that only the buffer thin film formed on the recessed portion of the etching pattern 23 is left, and the remaining portion of the etched layer is flattened to expose the upper buffer pattern 32. In this embodiment, the CMP process was used as the etch back. Since the upper buffer pattern 32 is made by using a recessed portion of the mask having a fine pattern exceeding the resolution limit of the exposure apparatus, the upper buffer pattern 32 also becomes a fine pattern exceeding the resolution limit of the exposure apparatus. do.

In FIG. 7, the etching pattern 23 is dry-etched by applying the upper buffer pattern 32 as an etching mask. At this time, since the upper buffer pattern 32 and the etching pattern 23 are each formed of a material having a high etching selectivity, only the etching pattern under the upper buffer pattern 32 remains, resulting in the final exceeding the resolution limit of the exposure equipment. The pattern 34 is finely formed.

8 shows a state where the upper buffer pattern is removed when it is necessary to remove the upper buffer pattern according to a process requirement.

In addition, the step shown in FIG. 9 shows a state where the flat fine pattern 35 is formed by applying a blank etching to remove the protruding portion of the edge remaining when only the upper buffer pattern is removed. Of course, the CMP process may be applied to remove the protrusions.

According to the present invention, it is possible to form a fine pattern out of the limit resolution of the exposure equipment while using the conventional exposure equipment as it is. Therefore, it is possible to prevent the increase in manufacturing cost of the semiconductor device caused by the expensive exposure equipment.

Claims (5)

(a) applying a photosensitive film to the etched layer formed on the semiconductor substrate; (b) forming an incomplete photosensitive film pattern having irregularities but not exposing the etched layer by applying exposure and development by applying a mask having a fine pattern exceeding a resolution limit of an exposure apparatus to the photosensitive film; (c) obtaining an incomplete etching pattern in which only an upper portion of the etched layer is recessed to a predetermined depth by performing dry etching using the incomplete photoresist pattern; (d) forming a buffer thin film having a high etching selectivity with the etched layer on the resultant of step (c); (e) forming an upper buffer pattern by etching back the buffer thin film to planarize to leave only the buffer thin film formed on the recessed portion and to expose the remaining portion of the etched layer; (f) applying the upper buffer pattern as an etch mask to dry etch the etched layer. The method of claim 1, wherein the buffer thin film is a polysilicon layer. The method of claim 1, wherein the etch back of step (e) is performed through a CMP process. The method of claim 1, further comprising, after the step (f): (g) leaving only the pattern of the etched layer by removing the upper buffer pattern; and (h) removing the protruding portion of the corner of the etched layer pattern. The method of claim 4, wherein the removing of the protrusions is performed by a blank etching or a CMP process.