KR19980079107A - Horizontal Output Transistor Protection Circuit in Multi-Mode Monitors - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a deflection circuit of a monitor, and receives a B + voltage and a horizontal driving signal of a flyback transformer and a driving power output from a voltage stabilization circuit to generate a sawtooth current by turning on / off a horizontal output transistor. In the horizontal deflection circuit of the monitor, a voltage sensing unit for outputting a control signal when the driving power decreases below a predetermined value when the monitor is powered off, and a B + voltage cannot be generated when a control signal is input from the voltage sensing unit. By providing a horizontal output transistor protection circuit composed of a controlling B + voltage generating cut-off part, it performs a mute function by the mute signal of the microcomputer when switching modes, and also performs a mute function when the monitor is powered off. So that all the voltage can be consumed And there is an effect to prevent the destruction of a horizontal output transistor and a peripheral circuit for generating.

Description

A circuit for protecting a horizontal-output-transistor in a multi-mode monitor

The present invention relates to a deflection circuit of a monitor, and more particularly to a horizontal output transistor protection circuit for protecting the horizontal output transistor from overvoltage in a multi-mode monitor.

In general, a monitor is a device that receives information from a computer video card and a synchronization signal and displays information on a CRT screen. The monitor includes a video system for processing a video signal, a deflection system for vertical and horizontal deflection, and a power supply. It consists of a system.

Here, the video card is classified into various modes. The classification of the monitor according to the mode of the video card will be described with reference to Table 1 below.

That is, the video mode outputs a horizontal frequency and a vertical frequency differently according to the resolution to be implemented. As the vertical frequency increases from a low frequency to a high frequency, screen flicker is prevented, thereby reducing eyestrain of users. .

Here, the multi-mode monitor is a monitor that is compatible with at least two video modes, and changes the size and position of images according to various horizontal frequencies (about 30 to 75 KHz) output from the video card, horizontal and vertical synchronization, and This means that the monitor can be used to optimize the deflection unit and to adjust various deflection correction circuits.

TABLE 1

Classification by video mode

Video mode Horizontal frequency (KHz) Vertical frequency (Hz) Resolution (H * V) CGA 15.75 60 640 * 200 EGA 21.8 60 640 * 350 VGA 31.5 60/70 720 * 350 640 * 480 SVGA 35 to 37 INTERLACE 1024 * 768 High resolution mode 64 to 75 60 to 70 1024 * 7681280 * 1024

In addition, the deflection system is a circuit for generating a raster in a water pipe (CRT). Looking at the deflection principle of a general monitor as follows. The electron beam emitted from the cathode of the monitor is accelerated through the grid, and moves the light spot of the fluorescent surface by changing its course by the electromagnetic action of the magnetic field of the deflection coil.

At this time, the deflection distance of the electron beam is proportional to the strength of the magnetic field, and the magnetic field uses the principle of electron deflection, which is proportional to the current of the deflection coil. In order to return to, the horizontal deflection coil for moving the light point in the horizontal direction (left and right) and the vertical deflection coil for moving the light point in the vertical direction (up and down) are used.

That is, a sawtooth current as shown in FIG. 1 flows through the horizontal deflection coil, and at the point a of the sawtooth current, a force that deflects the electron beam to the leftmost direction acts on the electron beam, and at the point b, the current Does not flow, the electron beam goes straight.

In addition, at point b, the current that causes the electron beam to bend to the right gradually increases, and at point c, the electron beam is deflected to the right, and the current rapidly decreases, and the above process is repeated from point a '.

FIG. 2 illustrates a horizontal deflection circuit of a monitor generating the sawtooth wave current as described above. The horizontal synchronizing signal output from a video card (not shown) is a horizontal drive signal (H.drive) at a horizontal oscillator (not shown). The signal is properly modulated and supplied to the horizontal driving transistor TR1.

The horizontal driving signal H.drive turns on the horizontal driving transistor TR1 and the driving power source V _CC output from the voltage stabilization circuit (for example, IC7812) 50, the horizontal driving transistor TR1, and the horizontal driving transistor TR1. The current is supplied to the base terminal of the horizontal output transistor TR2 by conducting the horizontal driving transformer HDT.

At this time, when the horizontal output transistor TR2 is turned on, the B + voltage of the flyback transformer FBT flows to the horizontal output transistor TR2 through the horizontal deflection coil HD.Y.

While the horizontal output transistor TR2 is turned on as described above, it corresponds to the second half of the effective syringe of the sawtooth wave (that is, between the point b and the point c), and the horizontal output transistor TR2 according to the horizontal drive signal H.drive. Is rapidly turned off, the current accumulated in the horizontal deflection coil (HD.Y) charges the retrace capacitor (RE.C).

In this case, when the retrace capacitor RE.C is fully charged, the discharge capacitor discharges back to the horizontal deflection coil HD.Y, and accordingly, current is accumulated in the horizontal deflection coil HD.Y.

At this time, the period between the charging and discharging of the retrace capacitor RE.C becomes a period corresponding to the retrace period (that is, between c point and a 'point).

In addition, when the energy is accumulated in the horizontal deflection coil HD.Y as described above, and the deflection coil voltage is such that the forward bias is applied to the damper diode DD, the damper diode DD is conducted and the horizontal deflection coil HD is applied. The current flowing in .Y) drops to zero.

At this time, the period in which the current flows through the damper diode D.D corresponds to the first half of the effective syringe of the sawtooth wave (that is, between point a and point b).

As described above, the horizontal output transistor TR2 is turned on again by the horizontal drive signal H.drive when the current flowing in the horizontal deflection coil HD.Y becomes zero. The saw-tooth wave current flows through the horizontal deflection coil HD.Y so that the horizontal deflection of the electron beam is achieved.

Here, the B + voltage of the flyback transformer (FBT) is usually generated by switching the DC voltage input from the SMPS in the chopper circuit, and the chopper circuit requires a switching element and a PWM control circuit for switching the DC voltage. Is required. For example, a dedicated power supply chip such as IC3842 (51) may be used here.

That is, the IC3842 (51) outputs a PWM signal by switching the DC voltage input from the SMPS to match the horizontal frequency, and the B + voltage is output as the PWM signal is stabilized in the DC-DC converter 52.

If the deflection circuit is driven as described above while the monitor is powered on, but the monitor is powered off, the drive power V _CC output from the voltage stabilization circuit 50 gradually decreases, and the drive power as described above. Since the horizontal output transistor TR2 is turned on while the V _CC is decreasing, the B + voltage applied to the retrace capacitor RE.C also gradually decreases.

However, if the driving power supply V _CC is reduced so as to be unable to drive the horizontal output transistor TR2, the B + voltage applied to the retrace capacitor RE.C is not consumed, and as shown in FIG. The voltage B + remains on the retrace capacitor RE.C.

As described above, when the monitor is turned on again while the residual B + voltage is present in the retrace capacitor RE.C, the residual B + voltage and the newly applied B + voltage are between the collector-emitter stage of the horizontal output transistor TR2. When applied, there is a problem that the horizontal output transistor TR2 is destroyed due to excessive overvoltage.

Accordingly, the present invention has been made to solve the above problems, and even when the monitor is powered off and the horizontal output transistor is turned off, the remaining B + voltage remaining on the retrace capacitor is consumed so that the horizontal when the monitor is powered on again. It is an object to provide a horizontal output transistor protection circuit that protects the output transistor from overvoltage.

In order to achieve the above object, the horizontal output transistor protection circuit of the multi-mode monitor according to the present invention receives the driving power output from the voltage stabilization circuit and the B + voltage and the horizontal driving signal of the flyback transformer. A horizontal deflection circuit of a multi-mode monitor which generates a sawtooth current by being turned on / off, comprising: a voltage sensing unit for outputting a control signal when the driving power decreases below a predetermined value when the monitor is powered off; And a B + voltage generation blocker which controls the B + voltage not to be generated when a control signal is input, so that the B + voltage is applied to the collector stage only while the horizontal output transistor is turned on.

1 is a graph for sawtooth current,

2 is a circuit diagram showing a horizontal deflection circuit of a general monitor;

FIG. 3 is a graph showing a relationship between a time when the monitor is powered off and a B + voltage in FIG. 2;

4 is a circuit diagram showing a horizontal output transistor protection circuit of a multi-mode monitor according to the present invention;

FIG. 5 is a graph illustrating a relationship between a time when the monitor is powered off and a B + voltage in FIG. 4.

* Explanation of symbols for the main parts of the drawings

1: Micom 2: End Gate

R1, R2: resistor R3: discharge resistor

R4, R5: Protective resistor C1: Capacitor

D1: Diode OP: Op Amp

Q1, Q2: pnp transistor

Hereinafter, an embodiment of an apparatus according to the present invention will be described with reference to the accompanying drawings.

4 is a circuit diagram illustrating a horizontal output transistor protection circuit of a multi-mode monitor according to the present invention, which is a voltage outputting a control signal when the driving power supply V _CC decreases below a predetermined value when the monitor is powered off. It is composed of a sensing unit and the B + voltage generation blocking unit for controlling the B + voltage is not generated when a control signal is input from the voltage sensing unit.

That is, before the horizontal output transistor TR2 is turned off and the driving power supply V _CC is reduced, the B + voltage is cut off so that the B + voltage is applied to the collector terminal only while the horizontal output transistor TR2 is turned on. Be sure to

Here, the voltage detection part driving power source (V _CC) receives a portion of the drive power supply (V _CC) smaller than the reference voltage (V _ref) the reference voltage generating portion and the driving power source (V _CC) and outputting the input terminal When the reference voltage (V _ref ) is input to the positive input terminal and the driving power supply (V _CC ) is greater than the reference voltage (V _ref ), a low level signal is output and the driving power supply (V _CC ) is the reference voltage ( V _ref ) is configured as an op amp (OP) for outputting a high level signal.

The reference voltage generator may include a first resistor R1 and a second resistor R2 for dividing the driving power supply V _CC when the monitor is powered on, and a reference voltage V _ref applied to the second resistor R2. The capacitor C1 accumulates and the reference voltage V _ref accumulated in the capacitor C1 are reversed between the capacitor C1 and the second resistor R2 such that the capacitor C1 is not discharged through the second resistor R2. It is composed of a diode (D1) connected to.

In addition, the reference voltage generator includes a discharge resistor R3 connected in parallel with the capacitor C1, which discharges the reference voltage V _ref accumulated in the capacitor C1 when the monitor is powered off. Outputs a high level signal from the operational amplifier (OP) when power is turned on again.

The B + voltage generation blocking unit includes first inverting means for inverting a mute signal output from the microcomputer 1, second inverting means for inverting a control signal output from the op amp OP, the first inverting means, and And an AND gate 2 which multiplies the output signal of the second inverting means and outputs it to the mute input terminal of the IC3842 (51).

Here, the first inverting means is a mute signal is input to the base terminal, the emitter terminal is grounded, the collector terminal is connected to the auxiliary voltage (V _BB ) through the first protection resistor (R4) at the same time the input of the AND gate (2) And a first pnp transistor Q1 connected to a terminal, wherein the second inverting means has a control signal of a voltage sensing unit input to a base terminal, an emitter terminal is grounded, and a collector terminal is connected to an auxiliary voltage through a second protection resistor R5. And a second ppn transistor Q2 connected to the V _BB and connected to the input terminal of the AND gate 2.

Next, the operation and effects of the apparatus according to the present invention configured as described above are as follows.

In general, when a mode is switched in a multi-mode monitor, the microcomputer 1 detects a change in the horizontal frequency and outputs a mute signal of the active high to the mute input terminal of the IC3842 (51). When the mute signal is input from (1), the PWM signal is not output so that the B + voltage is not supplied to the horizontal deflection circuit.

The present invention allows the control signal to be input to the mute input terminal of the IC3842 (51) when the mode is switched as well as when the monitor is powered off, thereby preventing the B + voltage from being supplied to the horizontal deflection circuit. Do not accumulate a large amount of B + voltage in C).

This will be described in detail when the monitor is powered off and when the mode is switched.

1.When the monitor is powered off:

The driving power supply V _CC output from the voltage stabilization circuit 50 while the monitor is powered on is divided by the first resistor R1 and the second resistor R2 and applied to the second resistor R2. The voltage is stored in the capacitor C1, and the reference voltage V _ref is stored in the capacitor C1.

While the monitor is operating normally, the operational amplifier V _CC input to the negative input terminal of the operational amplifier OP is greater than the reference voltage V _ref input to the positive input terminal of the operational amplifier OP. (OP) outputs a low level signal.

The low level signal output from the op amp OP is inverted by the second pnp transistor Q2 and then input to the AND gate 2.

On the other hand, the microcomputer 1 outputs a mute signal having a low level except when the mode is switched, which is inverted by the first pnp transistor Q1 and input to the AND gate 2.

That is, two input signals of high level are input to the AND gate 2 from the first ppn transistor Q1 and the second ppn transistor Q2, and the AND gate 2 transmits a high level signal to the IC3842 (51). Will output The truth table of the AND gate is shown in Table 2.

When the high level signal is input as described above, the IC3842 (51) normally drives and outputs a PWM signal to the DC-DC converter 52, and a B + voltage is applied to the horizontal deflection circuit to generate a sawtooth current.

TABLE 2

And Gate's Truth Table

Input signal Output signal Hi Hi Hi Hi low low low Hi low low low low

As described above, when the monitor is powered on and then powered off, the driving power V _CC output from the voltage stabilization circuit 50 and input to the negative input terminal of the operational amplifier OP gradually decreases.

At this time, when the driving power supply V _CC is lower than the reference voltage V _ref , the operational amplifier OP outputs a high level control signal, and the high level control signal is inverted by the second pnp transistor Q2. After input to the AND gate 2, the AND gate 2 outputs a low level signal to the mute input terminal of the IC3842 (51).

The IC3842 (51) does not output the PWM signal when a low level signal is input to the mute input terminal, thereby preventing the B + voltage from being supplied to the horizontal deflection circuit.

At this time, even when the driving power supply V _CC is lower than the reference voltage V _ref , the horizontal output transistor TR2 can be turned on, so that the supply of the new B + voltage is cut off and the existing B + voltage is It is possible to discharge through the horizontal output transistor (TR2).

That is, since the discharge of the B + voltage is performed until the horizontal output transistor TR2 is turned off, there is almost no residual B + voltage in the retrace capacitor RE.C.

In addition, the reference voltage V _ref accumulated in the capacitor C1 in the power-off state as described above is discharged through the discharge resistor R3. When the discharge is not performed as described above, when the monitor is powered on again, Until the driving power supply V _CC becomes higher than the reference voltage V _ref , the high-level signal is output from the op amp OP so that the B + voltage is not applied to the horizontal deflection circuit.

In summary, as shown in FIG. 5, when the monitor is turned off and the driving power is larger than the reference voltage (between t1 and t2), the B + voltage decreases in proportion to the reduction amount of the driving power. The voltage B + is drastically reduced from when the driving power supply is lower than the reference voltage until the horizontal output transistor is turned off (between t2 and t3). After that, when the horizontal output transistor is turned off, the B + voltage gradually decreases.

2. When the mode is switched

Since the monitor maintains the power-on state, the driving power supply (V _CC ) maintains a state larger than the reference voltage (V _ref ). The op amp (OP) outputs a low level signal, which is the second pnp transistor (Q2). Is reversed).

When the mode is switched, the microcomputer 1 outputs a high level mute signal, which is inverted by the first pnp transistor Q1 and input to the AND gate 2.

That is, the first ppn transistor Q1 outputs a low level signal to the AND gate 2, and the AND gate 2 outputs a low level signal to the mute input terminal of the IC3842 (51).

At this time, the IC3842 (51) does not output the PWM signal to the DC-DC converter 52 as in the case of the '1', so that the horizontal deflection circuit does not generate a sawtooth current.

As described above, the apparatus of the present invention can perform a mute function by the mute signal of the microcomputer when the mode is switched, and also perform a mute function when the monitor is turned off, so that the remaining B + voltage can be consumed when the monitor is turned off. This prevents the destruction of the horizontal output transistor and its surrounding circuits caused by the residual B + voltage.

Claims (6)

Sawtooth wave as the horizontal output transistor TR2 is turned on / off by receiving the B + voltage and the horizontal drive signal H.drive of the driving power supply Vcc and the flyback transformer FBT output from the voltage stabilization circuit 50. In a horizontal deflection circuit of a multi-mode monitor that generates a current, A voltage detector for outputting a control signal when the driving power supply Vcc decreases below a predetermined value when the monitor is powered off; When the control signal is input from the voltage sensing unit is composed of a B + voltage generation blocker for controlling the B + voltage is not generated, And the B + voltage is applied to the collector stage only while the horizontal output transistor (TR2) is turned on. The display device of claim 1, wherein the voltage sensing unit receives a driving power supply V _CC and outputs a reference voltage V _ref smaller than the driving power supply; When the driving power is input to the negative input terminal and the reference voltage is input to the positive input terminal, when the driving power is greater than the reference voltage, a low level signal is output; and when the driving power is less than the reference voltage, a high level signal is output. Horizontal output transistor protection circuit of a multi-mode monitor, characterized in that composed of an op amp (OP). 3. The display device of claim 2, wherein the reference voltage generator comprises: a first resistor R1 and a second resistor R2 for dividing the driving power when the monitor is powered on; A capacitor C1 accumulating a reference voltage applied to the second resistor R2; The horizontal mode of the multi-mode monitor, characterized in that consisting of a diode (D1) connected in the reverse direction between the capacitor and the second resistor so that the reference voltage accumulated in the capacitor (C1) is not discharged through the second resistor (R2) Output transistor protection circuit. 2. The apparatus of claim 1, wherein the B + voltage generation cut-off unit comprises: first inverting means for inverting a mute signal output from the microcomputer 1; Second inverting means for inverting the control signal output from the voltage sensing unit; And an AND gate (2) for multiplying the output signals of the first and second inverting means and outputting them to the mute input terminal of the IC3842 (51). 5. The first inverting means of claim 4, wherein the first inverting means is connected to the input terminal of the AND gate while the mute signal is inputted to the base terminal, the emitter terminal is grounded, and the collector terminal is connected to the auxiliary voltage through the first protection resistor R4. A first output ppn transistor (Q1). 5. The second inverting means of claim 4, wherein the control signal of the voltage sensing unit is input to the base terminal, the emitter terminal is grounded, and the collector terminal is connected to the auxiliary voltage through the second protective resistor R5. A horizontal output transistor protection circuit of a multi-mode monitor, characterized in that it is a second pnp transistor (Q2) connected to a terminal.