KR19980064869U - B + Overcurrent Protection Circuit in Monitors - Google Patents

Abstract

The present invention relates to a B + overcurrent protection circuit for detecting when a B + overcurrent flows and shutting down a DC-DC converter to prevent damage to a circuit element by overcurrent.

In the circuit of the present invention, when the voltage detection resistor R21 detects an overcurrent flowing in the B + line, the first transistor Q21 and the second transistor Q22 are sequentially turned on to shut down the PWM controller 102. The protection circuit may include latching means configured to configure the second transistor Q22 and the latch circuit so that the second transistor Q22 is turned on once to maintain the turned-on state.

Therefore, the B + overcurrent protection circuit according to the present invention detects when an overcurrent flows on the B + line and shuts down the operation of the DC-DC converter. Thus, even if the B + current is changed, a more stable shutdown is achieved, which causes circuit elements to be destroyed by the overcurrent. There is an effect that can be prevented.

Description

B + Overcurrent Protection Circuit in Monitors

The present invention relates to a DC-DC converter in a monitor, and in particular, a B + over-current protection circuit for detecting when a B + overcurrent flows and shutting down the DC-DC converter to prevent damage to a circuit element by an overcurrent. It is about.

In general, a monitor is a device that receives information from a computer video card and a synchronization signal and displays information on a CRT screen. The monitor includes a video system for processing a video signal, a deflection system for vertical and horizontal deflection, and a power supply. It consists of a system.

Here, the power supply system of the monitor serves to properly supply the voltage required in each part of the monitor, the AC power is input and rectified and guided to the secondary side through the transformer to supply various power required in the circuit The main power supply (SMPS) for providing a, DC-DC converter for receiving the DC voltage provided from the main power supply to provide the B + voltage to the FBT, and the high voltage, screen voltage, control grid voltage, etc. required by the CRT It consists of a high pressure generator (FBT) to provide.

Here, the DC-DC converter is a boost type (which is referred to as a boost up converter) that receives a low DC voltage and outputs a high DC voltage, and a step-down converter that receives a high DC voltage and outputs a low DC voltage ( This is also called a buck converter), and a flyback type converter using a transformer.

As an example of the step-down converter, the DC-DC converter generating the B + voltage in the monitor includes a switching element Q1 for switching the DC input voltage DCin according to a control signal, as shown in FIG. An inductor L1 for accumulating energy when a current flows through Q1, a diode D1 that is turned on when the switching element Q1 is turned off to provide a current path for the inductor L1, and an inverting buffer ( 104), a PWM controller 102 for generating a control signal for turning on and off the switching element Q1, an electrolytic capacitor C1 for removing ripple, and the like.

Here, the PWM controller 102 rectifies and smoothes the voltage induced in the tertiary coil of the FBT 110 in the rectifying diode D2 and the capacitor C2, and is then input through the split resistors R2 and R3. The high voltage is stabilized by generating a PWM pulse according to this feedback input to drive an inverting buffer to turn on / off the switching element Q1.

Referring to the operation of the DC-DC converter, when the control signal output from the PWM controller 102 becomes 'high', the switching element Q1 is turned on through the inverting buffer 104 and the drain of the switching element Q1 The source-to-source voltage V _Q1 transitions to a low level, and the current I _Q1 flowing through the switching element Q1 gradually rises.

In addition, a voltage is applied to the diode D1 in the reverse direction and is turned off. Therefore, a high voltage is applied between the both ends of the diode D1. The current I _L applied and flowing in the inductor L1 gradually increases during the turn-on period of the switching element Q1.

On the other hand, when the control signal of the PWM controller 102 becomes 'low' and the switching element Q1 is turned off, the voltage V _Q1 appears as 'high' between the drain and the source of the switching element Q1, and the inductor ( The counter electromotive force is generated at L) so that the diode D1 becomes conductive so that a current flowing through the switching element Q1 flows through the diode D1. At this time, since the voltage induced in the inductor L1 is in the opposite direction as when the switching element Q1 is turned on, the current flowing through the inductor L gradually decreases.

However, when the excessive B + current flows in the conventional DC-DC converter described above, a problem occurs that the circuit elements such as the switching element burn out, and the Korean Utility Model No. 96-43116 'B + overcurrent protection circuit in the monitor. Has been proposed to protect the circuit elements by detecting the B + overcurrent to shut down the DC-DC converter.

2 shows a power supply of a monitor to which a conventional overcurrent protection circuit is applied, the overcurrent protection circuit 50 and the DC-DC converter 100 shut down when the overcurrent protection circuit 50 detects an overcurrent. And, the B + voltage provided by the DC-DC converter 100 is connected to the primary winding, and induces high voltage on the secondary winding side according to the switching operation of the horizontal output unit 120, and feedback for high voltage regulation on the third winding. It is composed of the FBT (110) for inducing a voltage.

Here, the overcurrent protection circuit 50 includes a voltage detection resistor R21 for detecting an overcurrent flowing in a B + line, a first transistor Q21 that is turned on when the voltage detection resistor R21 detects an overvoltage, and When the first transistor Q21 is turned on, the zener diode ZD21 connected to the base is turned on, and when the zener diode ZD21 is turned on, the second transistor Q22 is turned on to shut down the PWM controller 102. .

Referring to the operation of the conventional B + overcurrent protection circuit configured as described above, when an overcurrent flows through the B + line, the voltage dropped to the voltage detection resistor R21 connected in series with the line increases, and thus the first transistor Q21. A forward bias is applied between the emitter and the base of the first transistor Q21 to turn on.

When the first transistor Q21 is turned on, a voltage higher than the rated voltage of the zener diode ZD21 is applied to the zener diode ZD21 through the division resistors R22 and R23 to conduct the zener diode ZD21.

When the zener diode ZD21 is turned on, a forward bias voltage is applied to the base of the second transistor Q22 so that the second transistor Q22 is turned on, and when the second transistor Q22 is turned on, a PWM connected to the collector terminal is turned on. The controller 102 is shut down, thereby temporarily blocking the B + voltage to protect the circuitry from the B + overcurrent.

However, the B + overcurrent protection circuit cannot realize a more complete shutdown because the first transistor turns on / off when the magnitude of the current flowing in the B + line changes, and damage of the second transistor and the zener diode due to the overcurrent occurs. There is a problem that cannot be prevented.

Therefore, the present invention was devised to solve the above problems, and even moreover, the DC-DC converter is shut down more completely by detecting the overcurrent that occurs temporarily even though the current flowing in the B + line is variable, thereby protecting circuit elements more safely from overcurrent. The objective is to provide a B + overcurrent protection circuit that can be enabled.

In order to achieve the above object, in the circuit of the present invention, when the voltage detection resistor R21 detects an overcurrent flowing in the B + line, the first transistor Q21 and the second transistor Q22 are sequentially turned on to provide a PWM controller ( 102. A B + overcurrent protection circuit for shutting down 102, comprising latching circuitry configured with the second transistor Q22 to latch the second transistor Q22 so that the second transistor Q22 can be turned on once. It features.

1 is a circuit diagram showing a DC-DC converter for supplying a B + voltage in a monitor;

2 is a circuit diagram showing a power supply of a monitor to which the overcurrent protection circuit according to the prior art is applied;

3 is a circuit diagram illustrating a power supply of a monitor to which an overcurrent protection circuit according to the present invention is applied.

* Description of the symbols for the main parts of the drawings *

10: B + overcurrent protection circuit 100: DC-DC converter

102: PWM controller 104: invert buffer

110: FBT120: horizontal output unit

Q31: latching transistor R31: latching resistor

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

3 shows a power supply of a monitor to which an overcurrent protection circuit according to the present invention is applied, which is an overcurrent protection circuit 10 and a DC-DC converter which is shut down when the overcurrent protection circuit 10 detects an overcurrent. 100 and the B + voltage provided by the DC-DC converter 100 are connected to the primary winding, induce high pressure on the secondary winding side according to the switching operation of the horizontal output unit 120, and regulate the high voltage on the third winding. It is composed of the FBT (110) for inducing a feedback voltage for.

Here, the overcurrent protection circuit 10 includes a voltage detection resistor R21 for detecting an overcurrent flowing in a B + line, a first transistor Q21 that is turned on when the voltage detection resistor R21 detects an overcurrent, and the When the first transistor Q21 is turned on, the zener diode ZD21 connected to the base terminal is turned on, and when the zener diode ZD21 is turned on, the second transistor Q22 turns on to shut down the PWM controller 102, and the second transistor Q22 is turned on. The second transistor Q22 and the latch circuit constitute a latching means for maintaining the turn-on state once the second transistor Q22 is turned on.

The latching means may include a turn-on sensing resistor R31 for detecting a turn-on state of the second transistor Q22 and a turn-on sensing resistor R31 when the second transistor Q22 is turned on so that an overvoltage drops to the turn-on sensing resistor R31. It consists of a latching transistor Q31 that applies a turn-on current to the base of the two transistors Q22.

In addition, the PWM controller 102 used in the present invention may be implemented as, for example, a 3842 chip, which is widely known as an error amplifier, a current sense comparator, and a PWM. It consists of a latch, oscillator, low voltage lockout (UVLO), and totem pole output stage.

Hereinafter, the operation and effects of the present invention constituted as described above are as follows.

First, the operation of the 3842, the PWM control chip of the DC-DC converter 100, will be described in brief. The terminal ① is a loop compensation terminal connected to the output terminal of the error amplifier, and the terminal ② is As a voltage feedback terminal connected to the inverting input of the error amplifier, a voltage fed back through the FBT 110 is generally received through the split resistors R2 and R3. ③ one terminal current sense (current sense) and a voltage proportional to the current fed back from the inductor (L1) of the converter is connected as a terminal, ④ one terminal R _T / C where the resistor and capacitor for determining the oscillating frequency connection _In the embodiment of the present invention as the _T terminal, the horizontal output terminal (H.out) is connected.

Terminal ⑤ is a ground terminal, terminal ⑥ is an output terminal for driving the switching element (Q1), in the embodiment of the present invention is to drive the switching element (Q1) through the inverting buffer (104). Terminal ⑦ is the Vcc power supply terminal to operate the chip, and terminal ⑧ is the reference voltage (V _REF ) terminal.

The PWM controller 102 generates a switching driving signal in which the duty ratio is variable according to the feedback voltage V _FB . The PWM controller 102 takes a predetermined reference voltage (for example, 1V) or less at terminal ① or a predetermined reference voltage at terminal ③. For example, when 1V) or more is applied, the operation of the PWM controller 102 is shut down, thereby stopping the entire operation of the DC-DC converter.

According to an embodiment of the present invention, when an overcurrent occurs, the PWM controller 102 is shut down by detecting and holding the ① terminal of the PWM controller 102 to the ground level.

That is, when an overcurrent flows through the B + line, a voltage dropping down the voltage detection resistor R21 connected in series with the line increases, so that a forward bias is applied between the emitter and the base of the first transistor Q21. The first transistor Q21 is turned on.

When the first transistor Q21 is turned on, a voltage higher than the rated voltage of the zener diode ZD21 is applied to the zener diode ZD21 through the division resistors R22 and R23 to conduct the zener diode ZD21.

When the zener diode ZD21 is turned on, a forward bias voltage is applied to the base terminal of the second transistor Q22 so that the second transistor Q22 is turned on, and when the second transistor Q22 is turned on, it is connected to the collector terminal. Terminal ① of the PWM controller 102 is held at the ground level so that the PWM controller 102 is shut down and a voltage drop is made at the latching resistor R31.

That is, since a forward bias is applied between the base and the emitter of the latching transistor Q31 and the latching transistor Q31 is turned on, the voltage between the emitter and collector stages of the latching transistor Q31 is set to 'low' level. As the transition occurs, the driving voltage Vcc is applied to the base terminal of the second transistor Q22, so that the second transistor Q22 can maintain the turn-on state.

That is, even if the B + current changes and the first transistor Q21 is turned off, the second transistor Q22 can maintain the turn-on state, so the PWM controller 102 can maintain the shutdown state more stably. This cuts off and protects the circuitry from B + overcurrent.

As described above, the B + overcurrent protection circuit according to the present invention detects when an overcurrent flows on the B + line and shuts down the operation of the DC-DC converter. There is an effect that can prevent the devices from being destroyed.

Claims (4)

In the B + overcurrent protection circuit in which the first transistor Q21 and the second transistor Q22 are sequentially turned on to shut down the PWM controller 102 when the voltage detecting resistor R21 detects an overcurrent flowing in the B + line. And latching means configured to configure the latch circuit with the second transistor (Q22) to maintain the turn-on state once the second transistor (Q22) is turned on once. The method of claim 1, wherein the latching means comprises: a turn-on sensing resistor (R31) for sensing the turn-on state of the second transistor (Q22), When the second transistor Q22 is turned on and the overvoltage drops to the turn-on sensing resistor R31, the second transistor Q22 is turned on to apply a turn-on current to the base terminal of the second transistor Q22. B + overcurrent protection circuit in a monitor. 3. The B + overcurrent protection circuit according to claim 2, wherein the second transistor (Q22) is an npn transistor. 3. The B + overcurrent protection circuit according to claim 2, wherein the latching transistor (Q31) is a pnp transistor.