KR19980033925U - Semiconductor inductor - Google Patents
Semiconductor inductor Download PDFInfo
- Publication number
- KR19980033925U KR19980033925U KR2019960046863U KR19960046863U KR19980033925U KR 19980033925 U KR19980033925 U KR 19980033925U KR 2019960046863 U KR2019960046863 U KR 2019960046863U KR 19960046863 U KR19960046863 U KR 19960046863U KR 19980033925 U KR19980033925 U KR 19980033925U
- Authority
- KR
- South Korea
- Prior art keywords
- inductor
- semiconductor
- metal layer
- via contact
- capacity
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 35
- 239000002184 metal Substances 0.000 claims abstract description 23
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 2
- 229920005591 polysilicon Polymers 0.000 claims description 2
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000036962 time dependent Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/645—Inductive arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5252—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
본 고안은 반도체 인덕터에 관한 것으로 특히, 인덕터의 용량을 임의로 조절할 수 있도록 한 반도체 인덕터에 관한 것이다.The present invention relates to a semiconductor inductor, and more particularly, to a semiconductor inductor capable of arbitrarily adjusting the capacity of the inductor.
이와 같은 본 고안에 의한 반도체 인덕터는 반도체 기판과, 상기 반도체 기판상에 일방향으로 일정한 간격을 가지고 형성되는 복수개의 제1금속층과, 상기 제1금속층들 각 끝단에 형성되는 비아 콘택과, 상기 비아 콘택에 형성되는 앤티퓨즈와, 그리고 상기 비아 콘택을 통해 상기 제1금속층과 전기적으로 연결되는 제2금속층을 포함하여 구성됨에 그 특징이 있다.The semiconductor inductor according to the present invention has a semiconductor substrate, a plurality of first metal layers formed at regular intervals in one direction on the semiconductor substrate, a via contact formed at each end of the first metal layers, and the via contact. And an antifuse formed at the second metal layer and a second metal layer electrically connected to the first metal layer through the via contact.
Description
본 고안은 반도체 인덕터에 관한 것으로 특히, 인덕터의 용량을 임의로 조절할 수 있도록 한 반도체 인덕터에 관한 것이다.The present invention relates to a semiconductor inductor, and more particularly, to a semiconductor inductor capable of arbitrarily adjusting the capacity of the inductor.
이하, 첨부된 도면을 참조하여 종래의 반도체 인덕터를 설명하면 다음과 같다.Hereinafter, a conventional semiconductor inductor will be described with reference to the accompanying drawings.
도 1은 종래의 반도체 인덕터를 나타낸 사시도이다.1 is a perspective view showing a conventional semiconductor inductor.
종래의 반도체 인덕터는 도 1에 도시된 바와 같이 반도체 기판(도면에 도시하지 않음)상에 일방향으로 일정한 간격을 가지고, 하나의 입력측과 하나의 출력측으로 갖는 복수개의 제1금속층(11)이 형성되고, 상기 제1금속층(11)들의 양끝단에 각각 비아 콘택(Via Contact)(12)이 형성된다.In the conventional semiconductor inductor, as shown in FIG. 1, a plurality of first metal layers 11 having a constant distance in one direction and having one input side and one output side are formed on a semiconductor substrate (not shown). Via vias 12 are formed at both ends of the first metal layers 11, respectively.
그리고 상기 각 비아 콘택(12)을 통해 상기 제1금속층(11)과 전기적으로 연결되는 제2금속층(13)이 형성된다.A second metal layer 13 electrically connected to the first metal layer 11 is formed through each of the via contacts 12.
상기와 같은 종래의 반도체 인덕터는 입력측으로 시변 전류(Time Dependnt Current)가 흐를때 플레밍의 법칙에 의해 A와 같은 방향으로 자기장이 형성되어 인덕터의 성질을 갖게 된다.In the conventional semiconductor inductor as described above, when a time dependent current flows to the input side, a magnetic field is formed in the same direction as A according to the law of Fleming, thereby having the property of the inductor.
상기와 같은 인덕터는 아날로그 회로에서 원하는 주파수를 통과시키는 필터, 예를 들면 고역 통과 필터, 저역 통과 필터, 대역 통과 필터에 많이 사용되는데 인덕터스 값을 변화시키기 위해서는 권선수(또는 감은수)를 변화시키거나 자기장이 흐르는 공간의 유전체의 유전율을 다르게하여 인덕턴스의 용량을 다르게 한다.Such inductors are frequently used in filters for passing a desired frequency in an analog circuit, for example, high pass filter, low pass filter, and band pass filter. By varying the dielectric constant of the dielectric in the space through which the magnetic field flows, the inductance capacity is varied.
그러나 상기와 같은 종래의 반도체 인덕터에 있어서 다음과 같은 문제점이 있었다.However, the above-described conventional semiconductor inductors have the following problems.
즉, 반도체 제작시 인덕터의 용량이 결정되어 고정된 값을 가지고 있으므로 사용자가 설계자가 인덕터의 용량을 가변하기 위해서는 새로운 마스크를 만들어 새로운 반도체를 제작해야 하므로 많은 시간이 소요된다.That is, since the capacity of the inductor is determined and has a fixed value when manufacturing a semiconductor, a user needs to make a new semiconductor by making a new mask in order to change the capacity of the inductor.
본 고안은 상기와 같은 문제점을 해결하기 위해 안출한 것으로 인덕터의 용량을 임의로 조절할 수 있는 반도체 인덕터를 제공하는데 그 목적이 있다.An object of the present invention is to provide a semiconductor inductor capable of arbitrarily adjusting the capacity of an inductor to solve the above problems.
도 1은 종래의 반도체 인덕터를 나타낸 사시도1 is a perspective view showing a conventional semiconductor inductor
도 2는 본 고안에 의한 반도체 인덕터를 나타낸 사시도2 is a perspective view showing a semiconductor inductor according to the present invention
*도면의 주요 부분에 대한 부호의 설명** Description of the symbols for the main parts of the drawings *
21: 제1금속층22: 비아 콘택21: first metal layer 22: via contact
23: 앤티 퓨즈24: 제2금속층23: anti-fuse 24: second metal layer
상기와 같은 목적을 달성하기 위한 본 고안에 의한 반도체 인덕터는 반도체 기판과, 상기 반도체 기판상에 일방향으로 일정한 간격을 가지고 형성되는 복수개의 제1금속층과, 상기 제1금속층들 각 끝단에 형성되는 비아 콘택과, 상기 비아 콘택에 형성되는 앤티 퓨즈와, 그리고 상기 비아 콘택을 통해 상기 제1금속층과 전기적으로 연결되는 제2금속층을 포함하여 구성됨에 그 특징이 있다.The semiconductor inductor according to the present invention for achieving the above object is a semiconductor substrate, a plurality of first metal layers formed at regular intervals in one direction on the semiconductor substrate, and vias formed at each end of the first metal layers And a second metal layer electrically connected to the first metal layer through the via contact, and an anti-fuse formed in the via contact.
이하, 첨부된 도면을 참조하여 본 고안에 의한 반도체 인덕터를 설명하면 다음과 같다.Hereinafter, a semiconductor inductor according to the present invention will be described with reference to the accompanying drawings.
도 2는 본 고안에 따른 반도체 인덕터를 나타낸 사시도이다.2 is a perspective view showing a semiconductor inductor according to the present invention.
본 고안에 의한 반도체 인덕터는 도 2에 도시된 바와같이 반도체 기판(도면에 도시하지 않음)상에 일방향으로 일정한 간격을 갖고, 하나의 입력측과 하나의 출력측을 갖는 복수개의 제1금속층(21)이 형성되고, 상기 제1금속층(21)들 표면의 각각 끝단에 비아 콘택(22)이 형성된다.According to the semiconductor inductor according to the present invention, as shown in FIG. 2, a plurality of first metal layers 21 having a constant distance in one direction and having one input side and one output side are provided on a semiconductor substrate (not shown). The via contact 22 is formed at each end of the surface of the first metal layers 21.
그리고 상기 비아 콘택(22)의 일정부분에 폴리 실리콘으로 이루어진 앤티퓨즈(Antifuse)(23)가 각각 형성되고, 상기 비아 콘택(22)을 통해 상기 제1금속층(21)과 전기적으로 연결되는 제2금속층(24)이 형성된다.An antifuse 23 made of polysilicon is formed on a portion of the via contact 22, and a second second electrically connected to the first metal layer 21 through the via contact 22. The metal layer 24 is formed.
본 고안에 의한 반도체 인덕터는 반도체가 완성된 후 사용자나 설계자가 인덕터의 권선수를 변화시켜 인덕터의 용량을 가변시키고자 할때 원하는 권선수에 해당하는 앤티퓨즈(23)를 프로그래밍(Programming)하면 얻고자 하는 인덕턴스 용량을 갖는 반도체 인덕터를 사용한다.The semiconductor inductor according to the present invention is obtained by programming an antifuse 23 corresponding to the desired number of turns when a user or a designer changes the number of turns of the inductor to change the capacity of the inductor after the semiconductor is completed. A semiconductor inductor having an inductance capacity is used.
이상에서 설명한 바와 같이 본 고안에 의한 반도체 인덕터에 있어서 반도체가 완성된 후 사용자나 설계자가 인덕터의 권선수를 변화시켜 인덕터의 용량을 가변시키고자 할 때 원하는 권선수에 해당하는 앤티퓨즈를 프로그래밍(Programming)하면 얻고자 하는 인덕터의 용량을 갖는 효과가 있다.As described above, in the semiconductor inductor according to the present invention, when a user or a designer wants to change the inductor capacity by changing the number of turns of the inductor, programming an antifuse corresponding to the desired number of turns ) Has the effect of having the capacity of the inductor to be obtained.
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019960046863U KR19980033925U (en) | 1996-12-10 | 1996-12-10 | Semiconductor inductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019960046863U KR19980033925U (en) | 1996-12-10 | 1996-12-10 | Semiconductor inductor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR19980033925U true KR19980033925U (en) | 1998-09-05 |
Family
ID=53988162
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019960046863U KR19980033925U (en) | 1996-12-10 | 1996-12-10 | Semiconductor inductor |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR19980033925U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20140112421A (en) * | 2013-03-13 | 2014-09-23 | 인텔 코포레이션 | Magnetic core inductor (mci) structures for integrated voltage regulators |
-
1996
- 1996-12-10 KR KR2019960046863U patent/KR19980033925U/en not_active Application Discontinuation
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20140112421A (en) * | 2013-03-13 | 2014-09-23 | 인텔 코포레이션 | Magnetic core inductor (mci) structures for integrated voltage regulators |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7046113B1 (en) | Inductor element | |
| US5969590A (en) | Integrated circuit transformer with inductor-substrate isolation | |
| US6380608B1 (en) | Multiple level spiral inductors used to form a filter in a printed circuit board | |
| US4016519A (en) | Printed circuit coils | |
| US5629553A (en) | Variable inductance element using an inductor conductor | |
| US6005467A (en) | Trimmable inductor | |
| KR100420948B1 (en) | Spiral inductor having parallel-branch structure | |
| JPH076928A (en) | Installation structure of capacitor on printed circuit board | |
| US20060038638A1 (en) | Dielectric filter | |
| CN100590870C (en) | Inductors having interconnect and inductor portions providing combined magnetic fields | |
| JP3159196B2 (en) | Variable inductance element | |
| US5032810A (en) | LC filter | |
| US7272884B2 (en) | Design and fabrication of inductors on a semiconductor substrate | |
| KR19980033925U (en) | Semiconductor inductor | |
| KR100366927B1 (en) | Three-terminal variable inductor | |
| US6532376B1 (en) | Switchable low-pass superconductive filter | |
| JPH0677711A (en) | Noise filter | |
| KR100509947B1 (en) | Method for operating variable inductor to preform continuous inductance variation | |
| JPH09306738A (en) | Inductor element | |
| CN109950032B (en) | Variable inductance | |
| KR100372692B1 (en) | method for regulating attenuation pole of multi-layer filter using loading stub | |
| EP0756350A1 (en) | Dielectric resonator, dielectric filter using the resonator, and production method of the dielectric filter | |
| JPH06318836A (en) | Band pass filter | |
| WO2000004603A1 (en) | A switchable inductor | |
| JPH03261202A (en) | Microwave semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| WITN | Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid |