KR19980020862A - Asynchronous transmission mode (ATM) cell-based transmission frame synchronizer - Google Patents

Abstract

The present invention is a frame synchronizer of an asynchronous transmission mode (ATM) cell-based transmission method, and in the conventional asynchronous transmission mode switch, only the cell header is viewed and the routing is performed by hardware. In order to solve this problem, the present invention provides a cyclic redundancy check (CRC) because it can be used in another connection and the packet length is fixed, but the present invention enables free band communication by transmitting as many cells as necessary. After the synchronization of the cell is established by using the synchronization signal of the cell to establish the synchronization of the frame, and the frame is configured to have a high degree of freedom by inserting a pad (PAD) having a different length of the cell. Excellent synchronization without inserting new cell sync pattern using cyclic redundancy check Characteristics can be obtained, and the synchronous return time of the frame can be shortened by intensively moving the same length as the cell length.

Description

Asynchronous transmission mode (ATM) cell-based transmission frame synchronizer

1 is a block diagram of a frame applied to the present invention.

2 is a configuration diagram of a periodic cell and an information cell according to the present invention.

3 is a cell synchronization recovery flowchart according to the present invention.

4 is a frame synchronization return flowchart according to the present invention.

5 and 6 are block diagrams of a frame synchronizer of an asynchronous transmission mode cell-based transmission method.

Explanation of symbols on the main parts of the drawings

13: cyclic redundancy test detector 14: control unit

15 cell / pad identification unit 16 synchronization protection unit

17: signal combination section 18: cell length counting section

19: clock extraction unit 20: pad length delay unit

21: bit rearrangement control unit 22: memory unit

23: frame counting unit 24: reading control unit

25: frame boundary detection unit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an asynchronous transfer mode (ATM), and more particularly, to an apparatus for establishing frame synchronization when a frame is constructed using an asynchronous cell mode (ATM) cell-based transmission scheme.

In identifying the frame boundary, the conventional transmitting side inserts a specific pattern at the head of the frame, and the receiving side detects the boundary of the frame by detecting this specific pattern.

However, the above scheme does not compensate for the change of the synchronization pattern due to the bit error rate of the transmission path, and also has a problem in that the frame is composed of a predetermined number of bytes and thus lacks flexibility for various purposes such as management of the transmission path and the network. .

Accordingly, an object of the present invention is to provide a flexible frame in a cell-based asynchronous transmission mode (ATM) transmission method and to quickly detect a frame boundary.

In order to achieve the above object, the present invention establishes cell synchronization by using a cyclic redundancy check (CRC), wherein the cyclic redundancy check (CRC) method has a capability of correcting errors occurring during transmission. Therefore, the synchronization characteristic superior to the conventional method can be obtained.

When configuring the frame, a more flexible frame can be configured by inserting a pad having a length different from that of the cell.

In addition, in terms of the synchronization return characteristic of the frame, when the frame boundary is found using the cell boundary detection signal, the point of time when the frame boundary is examined is examined by moving the cell length or the pad length in the input sequence. Compared with finding a boundary at a bit position or a byte position, the frame may have a shorter synchronization return time.

In addition, the change of the synchronization characteristic by the insertion of the pad is not very large, and instead, by inserting the pad can be configured a flexible frame.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is a configuration diagram of a frame applied to the present invention, and includes a periodic cell (PC) 100, a plurality of information cells 200, and a pad PAD.

According to the above configuration, the pad 300 having different cell lengths is generally inserted to remove constraints on the correspondence between the frame length and the cell length.

The first cell among the cells constituting the frame is a cell for synchronization of the frame and is periodically transmitted.

2 is a diagram illustrating a configuration of a periodic cell and an information cell according to the present invention, wherein the information cell 200 is an asynchronous transmission mode (ATM) cell and includes a virtual path identifier (VPI) 210 and a virtual channel in a header. A synchronous information (SI) 110 for frame synchronization is inserted into a virtual channel identifier (VCI) 220 and a cell header 400 of a periodic cell.

In order to establish the synchronization, the boundary of the cell is detected by first inspecting the cyclic redundancy test (CRC) 230 inserted into each cell and the pad.

In addition, the out-of-synchronization state of the cell may be mistaken as a cell boundary due to the cyclic redundancy check 230 processing result due to a bit error in the sequence, but in general, such a probability is small and can be ignored.

There is a constant relationship between the head position of the cell or pad and the frame as shown in FIG.

Therefore, for frame synchronization, synchronization is established by using a cell clock indicating the head position of a cell or pad after cell boundary detection using the above relationship.

According to the above, the frame boundary detection time is limited to the position of the cell clock.

The shift amount at the time of finding the boundary of the frame is set to the length of the cell or the length of the pad, so that the shift time is always the position of the cell clock, thereby avoiding the shift of one bit with a long transition time. The reduction of the synchronous return time is attempted.

According to the above, the present invention provides a hierarchical structure of frame synchronization with a process of finding a boundary of a cell by using a shift amount of 1 bit and a process of finding a frame boundary by using a shift amount of a cell length or a pad length. Overall, the synchronous performance has been improved.

Next, the flow of cell synchronization return according to the present invention is shown in FIG.

When the CRC of the input cell is judged (1) and the boundary of the cell is detected, the boundary of the cell is judged by the result of the cyclic redundancy test after the pad length movement. Navigate one cell or one pad apart to continue looking for boundaries.

If the boundary of the cell or pad is not detected, detection after the cell length shift is determined (4). If it is not detected, one bit is shifted (5).

When the cell boundary is detected as a result of the detection after the length shift of the cell, the cell is shifted by one cell for the detection interval (6), and the cell alignment protection is terminated (7).

4 is a frame synchronization return flow according to the present invention, wherein the number of cell clock viewpoints (sum of cells and pads) in one frame is M. FIG.

Accordingly, in the above scheme, frame detection time is limited to cell output time by finding frame synchronization with respect to the cell synchronized sequence.

First, the frame detection result is judged (8) if no frame is detected (9), the cell boundary detection result is judged (9) when the cell boundary is detected, the cell is shifted for one cell (10), and the frame detection is returned again. If the cell boundary is not detected, one pad is moved (11), and the frame returns to frame detection again.

If the frame detection result is determined and detected, the frame alignment is determined (12). If the frame is not aligned, the frame detection is returned.

In the synchronous search process, the cell length or the pad length is shifted intensively on one bit clock.

Because of the above process, the result of the frame detection corresponding to the cell clock time point is stored.

If out-of-sync occurs, the sync cell in that frame is once determined to be faulty and the sync cell in the next frame is examined and the test results are summed up to M + 1, including the test results for the timing of all cell clocks in one frame. It is dog.

Therefore, the test result is updated one by one whenever the cell clock is input.

5 and 6 are block diagrams of a frame synchronizer of an asynchronous transmission mode cell-based transmission method.

According to the configuration of the present invention, a cyclic redundancy check detector 13 for detecting a state of coincidence between a cell boundary and a phase of a cell clock in response to a cell clock and an input bit string, and the detection signal of the cyclic redundancy check detector are matched at a coincidence interval. The cell / pad identification section 15 identifies cells and pads, and the synchronization protection section 15 protects establishment of cell synchronization from the output of the cell / pad identification section.

And a pad length for delaying one pad length by using the signal combination unit 17 which combines the output of the synchronization protection unit 15 and the bit clock, and the output of the signal combination unit 17 and the cell / pad identification unit. The delay section 20, and the cell length counting section 18 that receives the outputs from the signal combination section 17 and the delay section 20 and counts the cell length.

In addition, by using the output of the cyclic redundancy check detection unit 13 and the cell clock, the bit reordering control unit 21 for reordering the bit strings from the cell sequence input by the reordering control signal of the reordering controller, and the bit clock from the cell input sequence. A frame boundary for detecting a frame boundary by receiving a clock extracting unit 19, a cell clock output from the cell length counting unit 18, and a sequence arranged in units of cells output from the bit rearrangement control unit 21; It consists of the detection part 25.

And in addition to the cell length counting unit 18, a read control unit 24 for controlling reading by combining a signal of a bit clock, cell / pad identification, and pattern matching result, and the detected frame boundary signal, A memory 22 for outputting a stored signal according to the signal of the read control unit 24, and a frame counting unit for counting a boundary detection signal of a frame output from the memory 22 and inputting it to the read control unit 24 ( 23).

Referring to the operation of the present invention by such a configuration as follows.

The input bit string is processed by the cyclic redundancy check (CRC) detection unit 13 to determine whether or not the phase of the detected cell and the clock which is the output of the cell length counting unit match / unmatch, and send the determination result to the control unit 14.

In addition, the signal is input to the cell / pad identification means to identify whether it is a cell or a pad in accordance with an interval of successive detection of the match again (15), and the identification signal is sent back to the controller 14.

The coincidence / inconsistency signal of the cell produced by the identification unit is input to the synchronization protection unit 16, and stores the state of the synchronization state according to whether it is a departure signal (17), and generates a search signal when the synchronization state leaves the cell length counter It is input to (18).

Therefore, the cell length counting unit 18 generates a signal (cell clock) corresponding to the length of the cell (19).

The pad length delay unit 20 receives the pad identification signal and resets the cell length counting unit 18 to a signal indicating the end of the pad.

Therefore, the sequence in which the cell boundary is identified is rearranged by the control signal of the control unit 14 in the bit reordering unit 21 and input to the frame synchronization circuit.

In addition, the frame boundary detector 25 examines the input cells rearranged to find a frame boundary.

The M + 1 pattern check results corresponding to the cell clock points are stored in the memory 22.

In the frame boundary search process, the search position of the input sequence is received by the bit clock, the cell / pad identification signal, and the signal 23 of the frame boundary identification result and stored in the memory 22 by the read control unit 24. The position is specified by reading out the result, and the signal detected by the frame boundary detection unit 25 is generated.

As a result, shifting of the cell length or the pad length can be concentrated with one bit clock.

As described above, the present invention establishes the synchronization of a cell using a cyclic redundancy check (CRC) and then establishes the synchronization of a frame using a synchronization signal.

Therefore, a more flexible frame can be formed by inserting a pad of a cell length different from that of a cell, and using the self-correction capability of the cyclic redundancy check inserted for the purpose of error control. Compared with the frame synchronization method according to the pattern, an excellent synchronization characteristic can be obtained.

Claims (2)

A cyclic redundancy check unit which receives a cell clock and an input bit string and detects coincidence / unmatching of a cell boundary and a phase of the cell clock; A cell / pad identification unit for identifying whether a match of a signal output from the cyclic redundancy test detection unit is a cell or a pad according to a detection interval; A synchronization protection unit for protecting cell synchronization establishment from the output of the cell / pad identification unit; A clock extractor for extracting a bit clock from a cell input sequence; A signal combination unit for combining an output of the synchronization protection unit and a bit clock; A delay unit for delaying one pad length by using the output of the signal combination unit and the cell / pad identification unit; A cell length counting unit for receiving an output from the signal combination unit and the delay unit and counting a cell length; A bit reordering unit for reordering a bit string from a cell sequence input by using a reordering control signal of a reordering control unit by using the output of the cyclic redundancy check detection unit and a cell clock; A frame boundary detector for detecting a frame boundary by receiving a cell clock output from the cell length counter and a sequence arranged in units of cells output from the reordering unit; A read control unit for controlling reading by combining the cell length counting unit, the bit block, and the signal of the cell / pad identification and pattern matching result; A memory for storing the detected frame boundary signal and outputting the stored signal according to the read control unit and the control signal; And a frame counter for counting a boundary detection signal of a frame output from the memory and inputting the frame detection signal to a read control unit. The method of claim 1, wherein the frame A frame synchronizer of an asynchronous transmission mode (ATM) cell-based transmission method, characterized in that a pad is inserted to give a degree of freedom of the frame.