KR102814052B1 - 메모리의 사전 할당과 관련된 버퍼 매핑 방식 - Google Patents

메모리의 사전 할당과 관련된 버퍼 매핑 방식 Download PDF

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KR102814052B1
KR102814052B1 KR1020170024958A KR20170024958A KR102814052B1 KR 102814052 B1 KR102814052 B1 KR 102814052B1 KR 1020170024958 A KR1020170024958 A KR 1020170024958A KR 20170024958 A KR20170024958 A KR 20170024958A KR 102814052 B1 KR102814052 B1 KR 102814052B1
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application
operating system
physical address
address
memory
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KR20170121045A (ko
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마노즈 케이 구툴라
벤카타 바누 프라케쉬 골라푸디
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삼성전자주식회사
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/54Interprogram communication
    • G06F9/544Buffers; Shared memory; Pipes
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1081Address translation for peripheral access to main memory, e.g. direct memory access [DMA]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1673Details of memory controller using buffers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1041Resource optimization
    • G06F2212/1044Space efficiency improvement
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65Details of virtual memory and virtual address translation
    • G06F2212/656Address space sharing

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
  • Bus Control (AREA)
KR1020170024958A 2016-04-22 2017-02-24 메모리의 사전 할당과 관련된 버퍼 매핑 방식 Active KR102814052B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201662326537P 2016-04-22 2016-04-22
US62/326,537 2016-04-22
US15/333,010 2016-10-24
US15/333,010 US10380012B2 (en) 2016-04-22 2016-10-24 Buffer mapping scheme involving pre-allocation of memory

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KR20170121045A KR20170121045A (ko) 2017-11-01
KR102814052B1 true KR102814052B1 (ko) 2025-05-28

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KR1020170024958A Active KR102814052B1 (ko) 2016-04-22 2017-02-24 메모리의 사전 할당과 관련된 버퍼 매핑 방식

Country Status (5)

Country Link
US (1) US10380012B2 (enExample)
JP (1) JP6757289B2 (enExample)
KR (1) KR102814052B1 (enExample)
CN (1) CN107305509B (enExample)
TW (1) TWI738737B (enExample)

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CN110119637B (zh) * 2018-02-07 2023-04-14 联发科技股份有限公司 硬件控制方法与硬件控制系统
US11792307B2 (en) 2018-03-28 2023-10-17 Apple Inc. Methods and apparatus for single entity buffer pool management
US11829303B2 (en) 2019-09-26 2023-11-28 Apple Inc. Methods and apparatus for device driver operation in non-kernel space
US11558348B2 (en) 2019-09-26 2023-01-17 Apple Inc. Methods and apparatus for emerging use case support in user space networking
US11606302B2 (en) 2020-06-12 2023-03-14 Apple Inc. Methods and apparatus for flow-based batching and processing
US11775359B2 (en) 2020-09-11 2023-10-03 Apple Inc. Methods and apparatuses for cross-layer processing
US11954540B2 (en) 2020-09-14 2024-04-09 Apple Inc. Methods and apparatus for thread-level execution in non-kernel space
US11799986B2 (en) 2020-09-22 2023-10-24 Apple Inc. Methods and apparatus for thread level execution in non-kernel space
US11876719B2 (en) 2021-07-26 2024-01-16 Apple Inc. Systems and methods for managing transmission control protocol (TCP) acknowledgements
US11882051B2 (en) 2021-07-26 2024-01-23 Apple Inc. Systems and methods for managing transmission control protocol (TCP) acknowledgements
WO2024128825A1 (ko) * 2022-12-14 2024-06-20 삼성전자 주식회사 전자 장치 및 메모리 관리 방법

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US20050256976A1 (en) * 2004-05-17 2005-11-17 Oracle International Corporation Method and system for extended memory with user mode input/output operations
US20130339953A1 (en) * 2007-11-16 2013-12-19 Vmware, Inc. Vm inter-process communication

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US20050273571A1 (en) * 2004-06-02 2005-12-08 Lyon Thomas L Distributed virtual multiprocessor
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US7739474B2 (en) * 2006-02-07 2010-06-15 International Business Machines Corporation Method and system for unifying memory access for CPU and IO operations
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US20130339953A1 (en) * 2007-11-16 2013-12-19 Vmware, Inc. Vm inter-process communication

Also Published As

Publication number Publication date
CN107305509B (zh) 2023-07-04
JP2017194964A (ja) 2017-10-26
CN107305509A (zh) 2017-10-31
US20170308460A1 (en) 2017-10-26
KR20170121045A (ko) 2017-11-01
US10380012B2 (en) 2019-08-13
JP6757289B2 (ja) 2020-09-16
TW201738756A (zh) 2017-11-01
TWI738737B (zh) 2021-09-11

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