KR102681251B1 - 입/출력 저장 명령의 처리 - Google Patents
입/출력 저장 명령의 처리 Download PDFInfo
- Publication number
- KR102681251B1 KR102681251B1 KR1020217022052A KR20217022052A KR102681251B1 KR 102681251 B1 KR102681251 B1 KR 102681251B1 KR 1020217022052 A KR1020217022052 A KR 1020217022052A KR 20217022052 A KR20217022052 A KR 20217022052A KR 102681251 B1 KR102681251 B1 KR 102681251B1
- Authority
- KR
- South Korea
- Prior art keywords
- input
- output
- data processing
- data
- asynchronous
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
- G06F9/30043—LOAD or STORE instructions; Clear instruction
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1689—Synchronisation and timing concerns
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4406—Loading of operating system
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4411—Configuring for operating with peripheral devices; Loading of device drivers
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Information Transfer Systems (AREA)
- Multi Processors (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP19154735.5 | 2019-01-31 | ||
| EP19154735 | 2019-01-31 | ||
| PCT/EP2020/050757 WO2020156797A1 (en) | 2019-01-31 | 2020-01-14 | Handling an input/output store instruction |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20210108973A KR20210108973A (ko) | 2021-09-03 |
| KR102681251B1 true KR102681251B1 (ko) | 2024-07-04 |
Family
ID=65275983
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020217022052A Active KR102681251B1 (ko) | 2019-01-31 | 2020-01-14 | 입/출력 저장 명령의 처리 |
Country Status (11)
| Country | Link |
|---|---|
| US (2) | US11074203B2 (https=) |
| EP (1) | EP3918467B1 (https=) |
| JP (1) | JP7379491B2 (https=) |
| KR (1) | KR102681251B1 (https=) |
| CN (1) | CN113366438B (https=) |
| ES (1) | ES3015283T3 (https=) |
| HU (1) | HUE070517T2 (https=) |
| PL (1) | PL3918467T3 (https=) |
| SG (1) | SG11202104428PA (https=) |
| WO (1) | WO2020156797A1 (https=) |
| ZA (1) | ZA202105522B (https=) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| ES3015283T3 (en) * | 2019-01-31 | 2025-04-30 | Ibm | Handling an input/output store instruction |
| TWI767175B (zh) | 2019-01-31 | 2022-06-11 | 美商萬國商業機器公司 | 用於處理輸入輸出儲存指令之資料處理系統、方法及電腦程式產品 |
| TWI773959B (zh) | 2019-01-31 | 2022-08-11 | 美商萬國商業機器公司 | 用於處理輸入輸出儲存指令之資料處理系統、方法及電腦程式產品 |
| DE112020000146B4 (de) | 2019-01-31 | 2025-01-16 | International Business Machines Corporation | Verfahren, datenverarbeitungssystem und computerprogrammprodukt zur handhabung einer eingabe-/ausgabe-speicheranweisung |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090063898A1 (en) * | 2005-02-10 | 2009-03-05 | International Business Machines Corporation | Processor Instruction Retry Recovery |
| US20110320764A1 (en) * | 2010-06-23 | 2011-12-29 | International Business Machines Corporation | Load instruction for communicating with adapters |
| US20150378737A1 (en) * | 2014-06-26 | 2015-12-31 | Intel Corporation | Sending packets using optimized pio write sequences without sfences |
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| US4947316A (en) | 1983-12-29 | 1990-08-07 | International Business Machines Corporation | Internal bus architecture employing a simplified rapidly executable instruction set |
| US5131081A (en) | 1989-03-23 | 1992-07-14 | North American Philips Corp., Signetics Div. | System having a host independent input/output processor for controlling data transfer between a memory and a plurality of i/o controllers |
| US5317739A (en) | 1992-03-30 | 1994-05-31 | International Business Machines Corp. | Method and apparatus for coupling data processing systems |
| US5548735A (en) * | 1993-09-15 | 1996-08-20 | International Business Machines Corporation | System and method for asynchronously processing store instructions to I/O space |
| US5553302A (en) | 1993-12-30 | 1996-09-03 | Unisys Corporation | Serial I/O channel having independent and asynchronous facilities with sequence recognition, frame recognition, and frame receiving mechanism for receiving control and user defined data |
| JPH07302200A (ja) * | 1994-04-28 | 1995-11-14 | Hewlett Packard Co <Hp> | 順次付けロード動作および順序付け記憶動作を強制する命令を有するコンピュータのロード命令方法。 |
| US5548788A (en) | 1994-10-27 | 1996-08-20 | Emc Corporation | Disk controller having host processor controls the time for transferring data to disk drive by modifying contents of the memory to indicate data is stored in the memory |
| DE19631289A1 (de) * | 1996-08-02 | 1998-02-05 | Ibm | Verfahren zum Testen eines Protokollumsetzers und Protokollumsetzer |
| US6072781A (en) | 1996-10-22 | 2000-06-06 | International Business Machines Corporation | Multi-tasking adapter for parallel network applications |
| US6085277A (en) | 1997-10-15 | 2000-07-04 | International Business Machines Corporation | Interrupt and message batching apparatus and method |
| US6247097B1 (en) | 1999-01-22 | 2001-06-12 | International Business Machines Corporation | Aligned instruction cache handling of instruction fetches across multiple predicted branch instructions |
| US6189088B1 (en) | 1999-02-03 | 2001-02-13 | International Business Machines Corporation | Forwarding stored dara fetched for out-of-order load/read operation to over-taken operation read-accessing same memory location |
| US6496277B1 (en) | 1999-07-23 | 2002-12-17 | Xerox Corporation | Data flow control and storage facility for an image reproduction system |
| US6725348B1 (en) | 1999-10-13 | 2004-04-20 | International Business Machines Corporation | Data storage device and method for reducing write misses by completing transfer to a dual-port cache before initiating a disk write of the data from the cache |
| US6490647B1 (en) | 2000-04-04 | 2002-12-03 | International Business Machines Corporation | Flushing stale data from a PCI bus system read prefetch buffer |
| US6578102B1 (en) | 2000-04-18 | 2003-06-10 | International Business Machines Corporation | Tracking and control of prefetch data in a PCI bus system |
| US7042881B1 (en) | 2001-06-29 | 2006-05-09 | Cisco Technology, Inc. | Asynchronous transfer mode system and method to verify a connection |
| US7178019B2 (en) | 2003-11-13 | 2007-02-13 | Hewlett-Packard Development Company, L.P. | Networked basic input output system read only memory |
| US7234004B2 (en) * | 2003-12-19 | 2007-06-19 | International Business Machines Corporation | Method, apparatus and program product for low latency I/O adapter queuing in a computer system |
| US7200626B1 (en) | 2004-01-22 | 2007-04-03 | Unisys Corporation | System and method for verification of a quiesced database copy |
| US7079978B2 (en) | 2004-05-24 | 2006-07-18 | International Business Machines Corporation | Apparatus, system, and method for abbreviated library calibration |
| US7631097B2 (en) | 2005-07-21 | 2009-12-08 | National Instruments Corporation | Method and apparatus for optimizing the responsiveness and throughput of a system performing packetized data transfers using a transfer count mark |
| US7827433B1 (en) | 2007-05-16 | 2010-11-02 | Altera Corporation | Time-multiplexed routing for reducing pipelining registers |
| US7870351B2 (en) | 2007-11-15 | 2011-01-11 | Micron Technology, Inc. | System, apparatus, and method for modifying the order of memory accesses |
| US7941627B2 (en) | 2008-02-01 | 2011-05-10 | International Business Machines Corporation | Specialized memory move barrier operations |
| US7991981B2 (en) | 2008-02-01 | 2011-08-02 | International Business Machines Corporation | Completion of asynchronous memory move in the presence of a barrier operation |
| US8867344B2 (en) | 2008-07-21 | 2014-10-21 | Mediatek Inc. | Methods for bus data transmission and systems utilizing the same |
| US8650335B2 (en) * | 2010-06-23 | 2014-02-11 | International Business Machines Corporation | Measurement facility for adapter functions |
| JP5680466B2 (ja) | 2011-03-29 | 2015-03-04 | 三菱重工業株式会社 | 並列処理システム及び並列処理システムの動作方法 |
| WO2015057828A1 (en) | 2013-10-15 | 2015-04-23 | Mill Computing, Inc. | Computer processor employing cache memory storing backless cache lines |
| CN103593169B (zh) * | 2013-11-29 | 2017-09-05 | 深圳中微电科技有限公司 | 一种多线程处理器中的指令输出装置、方法及其处理器 |
| US20150261535A1 (en) * | 2014-03-11 | 2015-09-17 | Cavium, Inc. | Method and apparatus for low latency exchange of data between a processor and coprocessor |
| US10120681B2 (en) | 2014-03-14 | 2018-11-06 | International Business Machines Corporation | Compare and delay instructions |
| US9588914B2 (en) | 2014-04-09 | 2017-03-07 | International Business Machines Corporation | Broadcast and unicast communication between non-coherent processors using coherent address operations |
| US9477481B2 (en) | 2014-06-27 | 2016-10-25 | International Business Machines Corporation | Accurate tracking of transactional read and write sets with speculation |
| GB2531011A (en) * | 2014-10-07 | 2016-04-13 | Ibm | Initializing I/O Devices |
| US9542201B2 (en) | 2015-02-25 | 2017-01-10 | Quanta Computer, Inc. | Network bios management |
| US9971545B1 (en) * | 2016-03-23 | 2018-05-15 | Crossbar, Inc. | Non-volatile write and read cache for storage media |
| US10248509B2 (en) | 2016-11-16 | 2019-04-02 | International Business Machines Corporation | Executing computer instruction including asynchronous operation |
| EP4089531B1 (en) | 2016-12-31 | 2024-06-26 | Intel Corporation | Systems, methods, and apparatuses for heterogeneous computing |
| US10452278B2 (en) | 2017-03-24 | 2019-10-22 | Western Digital Technologies, Inc. | System and method for adaptive early completion posting using controller memory buffer |
| US10606591B2 (en) * | 2017-10-06 | 2020-03-31 | International Business Machines Corporation | Handling effective address synonyms in a load-store unit that operates without address translation |
| TWI767175B (zh) | 2019-01-31 | 2022-06-11 | 美商萬國商業機器公司 | 用於處理輸入輸出儲存指令之資料處理系統、方法及電腦程式產品 |
| DE112020000146B4 (de) | 2019-01-31 | 2025-01-16 | International Business Machines Corporation | Verfahren, datenverarbeitungssystem und computerprogrammprodukt zur handhabung einer eingabe-/ausgabe-speicheranweisung |
| TWI773959B (zh) | 2019-01-31 | 2022-08-11 | 美商萬國商業機器公司 | 用於處理輸入輸出儲存指令之資料處理系統、方法及電腦程式產品 |
| ES3015283T3 (en) | 2019-01-31 | 2025-04-30 | Ibm | Handling an input/output store instruction |
-
2020
- 2020-01-14 ES ES20700224T patent/ES3015283T3/es active Active
- 2020-01-14 KR KR1020217022052A patent/KR102681251B1/ko active Active
- 2020-01-14 PL PL20700224.7T patent/PL3918467T3/pl unknown
- 2020-01-14 WO PCT/EP2020/050757 patent/WO2020156797A1/en not_active Ceased
- 2020-01-14 HU HUE20700224A patent/HUE070517T2/hu unknown
- 2020-01-14 EP EP20700224.7A patent/EP3918467B1/en active Active
- 2020-01-14 CN CN202080011699.5A patent/CN113366438B/zh active Active
- 2020-01-14 SG SG11202104428PA patent/SG11202104428PA/en unknown
- 2020-01-14 JP JP2021534351A patent/JP7379491B2/ja active Active
- 2020-01-29 US US16/775,679 patent/US11074203B2/en active Active
-
2021
- 2021-06-22 US US17/354,302 patent/US11579874B2/en active Active
- 2021-08-03 ZA ZA2021/05522A patent/ZA202105522B/en unknown
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090063898A1 (en) * | 2005-02-10 | 2009-03-05 | International Business Machines Corporation | Processor Instruction Retry Recovery |
| US20110320764A1 (en) * | 2010-06-23 | 2011-12-29 | International Business Machines Corporation | Load instruction for communicating with adapters |
| US20150378737A1 (en) * | 2014-06-26 | 2015-12-31 | Intel Corporation | Sending packets using optimized pio write sequences without sfences |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113366438A (zh) | 2021-09-07 |
| JP2022518349A (ja) | 2022-03-15 |
| HUE070517T2 (hu) | 2025-06-28 |
| ZA202105522B (en) | 2024-01-31 |
| EP3918467B1 (en) | 2025-02-26 |
| US20200250115A1 (en) | 2020-08-06 |
| WO2020156797A1 (en) | 2020-08-06 |
| ES3015283T3 (en) | 2025-04-30 |
| SG11202104428PA (en) | 2021-05-28 |
| EP3918467A1 (en) | 2021-12-08 |
| KR20210108973A (ko) | 2021-09-03 |
| US20210311891A1 (en) | 2021-10-07 |
| CN113366438B (zh) | 2025-08-12 |
| JP7379491B2 (ja) | 2023-11-14 |
| PL3918467T3 (pl) | 2025-04-14 |
| US11579874B2 (en) | 2023-02-14 |
| EP3918467C0 (en) | 2025-02-26 |
| US11074203B2 (en) | 2021-07-27 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0105 | International application |
St.27 status event code: A-0-1-A10-A15-nap-PA0105 |
|
| A201 | Request for examination | ||
| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
|
| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
|
| D13-X000 | Search requested |
St.27 status event code: A-1-2-D10-D13-srh-X000 |
|
| D14-X000 | Search report completed |
St.27 status event code: A-1-2-D10-D14-srh-X000 |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
St.27 status event code: A-1-2-D10-D21-exm-PE0902 |
|
| E13-X000 | Pre-grant limitation requested |
St.27 status event code: A-2-3-E10-E13-lim-X000 |
|
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
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| E90F | Notification of reason for final refusal | ||
| PE0902 | Notice of grounds for rejection |
St.27 status event code: A-1-2-D10-D21-exm-PE0902 |
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| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
|
| E701 | Decision to grant or registration of patent right | ||
| PE0701 | Decision of registration |
St.27 status event code: A-1-2-D10-D22-exm-PE0701 |
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| PR0701 | Registration of establishment |
St.27 status event code: A-2-4-F10-F11-exm-PR0701 |
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| PR1002 | Payment of registration fee |
St.27 status event code: A-2-2-U10-U12-oth-PR1002 Fee payment year number: 1 |
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| PG1601 | Publication of registration |
St.27 status event code: A-4-4-Q10-Q13-nap-PG1601 |