KR102632613B1 - Display panel - Google Patents

Abstract

One embodiment of the present invention includes a substrate having an opening area and a display area surrounding the opening area, a plurality of display elements located in the display area, and an organic encapsulation layer and an inorganic encapsulation layer covering the display elements. a thin film encapsulation layer, a first groove and a second groove located between the opening area and the display area and having an undercut structure that is concave in the depth direction of the substrate, and covering at least one of the first groove and the second groove and an organic insulating material. A planarization layer including a, and an input sensing layer located in the display area and disposed on the thin film encapsulation layer, wherein the planarization layer is disposed on top of the inorganic encapsulation layer and the organic encapsulation layer is disposed below the inorganic encapsulation layer. The display panel is started.

Description

Display panel {Display panel}

Embodiments of the present invention relate to a display panel and also to a display device including a display panel.

Recently, the uses of display devices have become more diverse. In addition, the thickness of display devices is becoming thinner and lighter, and the scope of their use is expanding.

As the area occupied by the display area of the display device is expanded, various functions that are incorporated or linked to the display device are being added. Plans are being developed to expand the area and add various functions.

As a specific solution, in the case of a display device having an opening area, foreign substances such as moisture may penetrate into the side of the opening. In this case, display elements that at least partially surround the opening may be damaged.

The present invention is intended to solve various problems including the problems described above, and provides a display panel capable of preventing moisture penetration and a display device equipped therewith. However, these tasks are illustrative and do not limit the scope of the present invention.

One embodiment of the present invention includes: a substrate having an opening area and a display area surrounding the opening area; a plurality of display elements located in the display area; a thin film encapsulation layer that covers the display elements and includes an organic encapsulation layer and an inorganic encapsulation layer; a first groove and a second groove located between the opening area and the display area, each having an undercut structure; a planarization layer covering at least one of the first groove and the second groove and including an organic insulating material; And a lower barrier layer disposed below the planarization layer,

Disclosed is a display panel wherein the planarization layer is disposed on the inorganic encapsulation layer and the organic encapsulation layer is disposed below the inorganic encapsulation layer.

In this embodiment, the substrate includes a first base layer, a first inorganic layer, a second base layer, and a second inorganic layer sequentially stacked, and the bottom surface of each of the first groove and the second groove is , It may be placed on the lower surface of the second base layer or on an imaginary surface located between the upper and lower surfaces of the second base layer.

In this embodiment, the thin film encapsulation layer may include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer that are sequentially stacked.

In this embodiment, the first inorganic encapsulation layer may cover the inner surfaces of each of the first groove and the second groove.

In this embodiment, the organic encapsulation layer covers the first groove and may fill the first groove.

In this embodiment, the lower barrier layer is located on the second inorganic encapsulation layer and may be in direct contact with the upper surface of the second inorganic encapsulation layer.

In this embodiment, the lower barrier layer may cover the second groove.

In this embodiment, it further includes a third groove disposed between the opening area and the second groove, and the lower barrier layer may cover the second and third grooves.

In this embodiment, the second groove may include a pair of tips extending toward the center of the second groove, and may further include an organic material located immediately below the pair of tips.

In this embodiment, it may further include an input sensing layer disposed on the display elements.

In this embodiment, the lower barrier layer may include the same material as the inorganic material included in the input sensing layer.

Another embodiment of the present invention includes a substrate having an opening; display elements located in a display area at least partially surrounding the opening; a thin film encapsulation layer located on the display elements and including a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer; an input sensing layer located on the display elements; a plurality of grooves located in a groove area between the opening and the display area; Disclosed is a display panel including a barrier layer that covers at least one of the plurality of grooves and includes an inorganic material.

In this embodiment, it further includes a planarization layer located in the groove area,

The planarization layer may be disposed on top of the second inorganic encapsulation layer, and the organic encapsulation layer may be disposed below the second inorganic encapsulation layer.

In this embodiment, the input sensing layer includes multiple layers, and at least one of the barrier layer or the planarization layer may include the same material as at least one of the layers of the input sensing layer.

In this embodiment, the display panel includes a multilayer film including an organic material layer and at least one inorganic material layer disposed on the organic material layer, and the plurality of grooves may be formed concave in the thickness direction of the multilayer film.

In this embodiment, the substrate includes a first base layer, a first inorganic layer, a second base layer, and a second inorganic layer sequentially stacked, and the organic material layer includes the second base layer and the at least one The inorganic layer may include the second inorganic layer.

In this embodiment, the at least one inorganic material layer includes a first hole corresponding to each of the plurality of grooves, the organic material layer includes a hole or recess corresponding to the first hole, and the first hole A side surface of the at least one inorganic material layer defining one hole may protrude more toward the center of the first hole than a side surface of the organic material layer defining the hole or the recess.

In this embodiment, the plurality of grooves include a first groove adjacent to the display area and a second groove closer to the opening than the first groove, and the organic encapsulation layer covers the first groove. , the first groove can be filled.

In this embodiment, it includes an organic material present in the second groove, and the organic material may include the same material as the organic encapsulation layer.

In this embodiment, the second groove may be covered with the barrier layer.

Other aspects, features and advantages in addition to those described above will become apparent from the following drawings, claims and detailed description of the invention.

The display device according to embodiments of the present invention can prevent the infiltration of moisture, etc., toward the display element by forming a groove in the non-display area, and insulating layers on the groove, such as a portion of an organic encapsulation layer, By disposing a flattening layer or/and a lower barrier layer, it is possible to prevent or minimize the occurrence of cracks or lifting of the film around the groove, and to prevent damage to the display element by external foreign substances such as moisture. However, this effect is illustrative, and the effects according to the embodiments will be described in detail later.

1 is a perspective view schematically showing a display device according to an embodiment of the present invention.
2A to 2C are schematic cross-sectional views of display devices according to embodiments of the present invention.
FIG. 3 is a plan view schematically showing a display panel according to an embodiment of the present invention, and FIG. 4 is an equivalent circuit diagram schematically showing one pixel of the display panel.
Figure 5 is a plan view showing wiring (signal lines) located in one area of a display panel according to an embodiment of the present invention.
Figure 6 is a plan view showing grooves located in one area of a display panel according to an embodiment of the present invention.
Figure 7 is a plan view schematically showing an excerpt of another input sensing layer according to an embodiment of the present invention.
Figures 8a and 8b are plan views respectively showing a first conductive layer and a second conductive layer among the input sensing layers according to an embodiment of the present invention.
Figure 8c is a cross-sectional view showing an input sensing layer according to an embodiment of the present invention.
9A and 9B are plan views showing a first conductive layer and a second conductive layer among the input sensing layers according to another embodiment of the present invention, respectively.
Figure 9c is a cross-sectional view showing an input sensing layer according to another embodiment of the present invention.
Figures 10a and 10b are plan views showing a first conductive layer and a second conductive layer among the input sensing layers according to another embodiment of the present invention, respectively.
Figure 10c is a cross-sectional view showing an input sensing layer according to another embodiment of the present invention.
Figure 11 is a cross-sectional view showing a display panel according to an embodiment of the present invention.
FIG. 12 is an enlarged cross-sectional view of the organic light emitting diode of FIG. 11.
FIGS. 13, 15, 17, and 19 are cross-sectional views showing an opening area and a first non-display area according to the manufacturing process of a display panel according to an embodiment of the present invention.
Figure 14 corresponds to a modified embodiment of Figure 13.
FIG. 16 is an enlarged view of XVI in FIG. 15.
Figure 18 is an enlarged view of section XVIII in Figure 17.
Figure 20 is a plan view schematically showing a lower barrier layer in a display panel according to an embodiment of the present invention.
Figure 21 is a plan view schematically showing a lower barrier layer in a display panel according to another embodiment of the present invention.
Figure 22 is a plan view schematically showing a lower barrier layer in a display panel according to another embodiment of the present invention.
Figure 23 is a cross-sectional view of a first non-display area of a display panel according to another embodiment of the present invention.
FIG. 24 is an enlarged cross-sectional view of portion XXIV of FIG. 23.
25 is a plan view schematically showing a portion of a display panel according to another embodiment of the present invention.
FIG. 26 is a cross-sectional view taken along line XXVI-XXVI' in FIG. 25.

Since the present invention can be modified in various ways and can have various embodiments, specific embodiments will be illustrated in the drawings and described in detail in the detailed description. The effects and features of the present invention and methods for achieving them will become clear by referring to the embodiments described in detail below along with the drawings. However, the present invention is not limited to the embodiments disclosed below and may be implemented in various forms.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. When describing with reference to the drawings, identical or corresponding components will be assigned the same reference numerals and redundant description thereof will be omitted. .

In the following embodiments, terms such as first and second are used not in a limiting sense but for the purpose of distinguishing one component from another component.

In the following examples, singular terms include plural terms unless the context clearly dictates otherwise.

In the following embodiments, terms such as include or have mean that the features or components described in the specification exist, and do not exclude in advance the possibility of adding one or more other features or components.

In the following embodiments, when a part of a film, region, component, etc. is said to be on or on another part, it is not only the case where it is directly on top of the other part, but also when another film, region, component, etc. is interposed between them. Also includes cases where there are.

In cases where an embodiment can be implemented differently, a specific process sequence may be performed differently from the described sequence. For example, two processes described in succession may be performed substantially at the same time, or may be performed in an order opposite to that in which they are described.

In the following embodiments, when membranes, regions, components, etc. are connected, not only are the membranes, regions, and components directly connected, but also other membranes, regions, and components are interposed between the membranes, regions, and components. This includes cases where it is indirectly connected. For example, in this specification, when membranes, regions, components, etc. are said to be electrically connected, not only are the membranes, regions, components, etc. directly electrically connected, but also other membranes, regions, components, etc. are interposed between them. This also includes cases of indirect electrical connection.

1 is a perspective view schematically showing a display device according to an embodiment of the present invention.

Referring to FIG. 1, the display device 1 includes a display area (DA) that emits light and a non-display area (NDA) that does not emit light. The display device 1 may provide a predetermined image using light emitted from a plurality of pixels arranged in the display area DA.

The display device 1 includes an opening area OA at least partially surrounded by a display area DA. Figure 1 shows that the opening area OA is entirely surrounded by the display area DA. The non-display area NDA may include a first non-display area NDA1 surrounding the opening area OA, and a second non-display area NDA2 surrounding the outside of the display area DA. The first non-display area (NDA1) entirely surrounds the opening area (OA), the display area (DA) entirely surrounds the first non-display area (NDA1), and the second non-display area (NDA2) entirely surrounds the display area (DA). ) can be entirely surrounded.

Hereinafter, the display device 1 according to an embodiment of the present invention will be described by taking an organic light emitting display device as an example, but the display device of the present invention is not limited thereto. As another example, various types of display devices, such as an inorganic light emitting display (EL) display device, a quantum dot light emitting display device, etc., may be used.

FIGS. 2A to 2C are briefly cross-sectional views of display devices according to embodiments of the present invention, and may correspond to the cross-section taken along line II-II' in FIG. 1 .

Referring to FIG. 2A , the display device 1 may include a display panel 10 and a component 20 corresponding to an opening area (OA) of the display panel 10 .

The display panel 10 includes a substrate 100, a display element layer 200 disposed on the substrate 100 and including display elements, a thin film encapsulation layer 300 as an encapsulation member covering the display element layer 200, and And it may include an input sensing layer 400 that senses a touch input. Although not shown, component(s) such as a polarizer and a retarder or an anti-reflection member including a color filter and a black matrix, and a transparent window may be further disposed on the input sensing layer 400. there is.

The substrate 100 may include polymer resin. The substrate 100 containing polymer resin can secure flexibility compared to a substrate made of glass. For example, the substrate 100 may include transparent polymer resin. The substrate 100 is a barrier layer that prevents penetration of external substances in addition to the polymer resin described above, and further includes a single or multiple inorganic layers containing inorganic substances such as silicon nitride (SiNx) and/or silicon oxide (SiOx). can do.

The display element layer 200 may include a display element disposed in the display area DA, for example, an organic light-emitting diode. Although not shown, the display element layer 200 may include a thin film transistor, a storage capacitor (Cst), and wires connected to the display element.

By covering the display element layer 200, the thin film encapsulation layer 300 can prevent moisture or contaminants from penetrating into the display element layer 200 from the outside. The thin film encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. The thin film encapsulation layer 300 covers display elements in the display area DA, but may extend to the non-display area. In this regard, FIG. 2A shows that the thin film encapsulation layer 300 extends to the first non-display area NDA1.

The input sensing layer 400 may be disposed in the display area (DA). The input sensing layer 400 can acquire coordinate information according to an external input, for example, a touch event. The input sensing layer 400 may include a sensing electrode (sensing electrode or touch electrode) and signal lines (trace lines) connected to the sensing electrode.

The process of forming the input sensing layer 400 may be carried out continuously after the process of forming the planarization layer 610, which will be described later, or may be carried out continuously after the process of forming the thin film encapsulation layer 300. Accordingly, no adhesive member may be interposed between the input sensing layer 400 and the thin film encapsulation layer 300.

The planarization layer 610 is disposed in the first non-display area NDA1. The planarization layer 610 includes an organic insulating material. The planarization layer 610 includes photoresist (e.g., negative or positive photoresist), includes the same material as the organic encapsulation layer of the thin film encapsulation layer 300, or is the same as one of the insulating layers of the input sensing layer to be described later. It may contain substances or various other types of organic insulating materials.

As shown in FIG. 2A , the display panel 10 may include an opening 10H that corresponds to the opening area OA and penetrates the display panel 10 . The substrate 100, the display element layer 200, the thin film encapsulation layer 300, the input sensing layer 400, and the planarization layer 610 each have first to fifth openings 100H and 200H corresponding to the opening area OA. , 300H, 400H, 610H). The first opening (100H) penetrates the upper and lower surfaces of the substrate 100, the second opening (200H) penetrates from the lowest to the uppermost layer of the display element layer 200, and the third opening (300H) penetrates the thin film encapsulation layer. 300, the fourth opening 400H can be formed to penetrate from the lowest to the top layer of the input sensing layer 400, and the fifth opening 610H can be formed to penetrate the upper and lower surfaces of the planarization layer 610. there is.

The opening area (OA) is a location where the component 20 is placed. The component 20 is placed below the display panel 10 to correspond to the opening area (OA) as shown in FIG. 2A, or as shown in FIG. 2B. As shown, it may be disposed within the opening 10H to overlap the side of the opening 10H of the display panel 10.

Component 20 may include electronic elements. For example, the component 20 may be an electronic element that uses light or sound. For example, electronic elements include sensors that receive and use light such as infrared sensors, cameras that receive light and capture images, sensors that output and detect light or sound to measure distance or recognize fingerprints, etc., and small devices that output light. It may include a lamp or a speaker that outputs sound. In the case of electronic elements that use light, light of various wavelength bands such as visible light, infrared light, and ultraviolet light can be used. In some embodiments, the opening area OA may be understood as a transmission area through which light and/or sound output from the component 20 to the outside or traveling from the outside toward the electronic element can pass through.

In another embodiment, when the display panel 10 is used as a smart watch or a vehicle instrument panel, the component 20 may be a member including a clock hand or a needle indicating certain information (e.g., vehicle speed, etc.). there is. The component 20 is a component that can be disposed at a position corresponding to the opening 10H of the display panel 10 as shown in FIG. 2A or 2B, and has the functions and functions of the display panel 10 as described above. It may include related component(s) or may include components such as accessories that increase the aesthetics of the display panel 10.

As shown in FIGS. 2A and 2B, the substrate 100 may have a first opening 100H corresponding to the opening area OA. Alternatively, as shown in FIG. 2C, the substrate 100 may not include the first opening 100H. The component 20 may be placed below the display panel 10 as shown in a dotted line, or may be placed within the opening 10H of the display panel 10 as shown in a solid line. The component 20 disposed below the display panel 10 may be an electronic element that uses light. In this case, the light transmittance in the opening area (OA) of the display panel 10 may be about 50% or more, more preferably 70% or more, 75% or more, 80% or more, 85% or more, or 90% or more.

The substrate 100 may or may not include the first opening 100H, as described with reference to FIGS. 2A to 2C. If the substrate 100 includes the first opening 100H, it may be more preferable because the component 20 can be used in various ways without restrictions on the type or location. Hereinafter, for convenience of explanation, a display panel including the substrate 100 having the first opening 100H will be described. However, it goes without saying that the features described later can also be applied to the display panel shown in FIG. 2C.

FIG. 3 is a plan view schematically showing a display panel according to an embodiment of the present invention, and FIG. 4 is an equivalent circuit diagram schematically showing one pixel of the display panel.

Referring to FIG. 3 , the display panel 10 includes a display area DA and first and second non-display areas NDA1 and NDA2. FIG. 3 may be understood as a view of the substrate 100 of the display panel 10. For example, the substrate 100 may be understood as having an opening area (OA), a display area (DA), and first and second non-display areas (NDA1 and NDA2).

The display panel 10 includes a plurality of pixels (P) arranged in the display area (DA). Each pixel P may include a display element, for example, an organic light emitting diode. Each pixel P may emit, for example, red, green, blue, or white light through an organic light emitting diode.

Referring to FIG. 4, each pixel (P) includes a pixel circuit (PC) and an organic light emitting diode (OLED) connected to the pixel circuit (PC). The pixel circuit (PC) may include a first thin film transistor (T1), a second thin film transistor (T2), and a storage capacitor (Cst).

The second thin film transistor (T2) is a switching thin film transistor, connected to the scan line (SL) and the data line (DL), and the data voltage input from the data line (DL) according to the switching voltage input from the scan line (SL). is transmitted to the first thin film transistor (T1). The storage capacitor (Cst) is connected to the second thin film transistor (T2) and the driving voltage line (PL), and is connected to the voltage received from the second thin film transistor (T2) and the first power voltage (ELVDD) supplied to the driving voltage line (PL). Store the voltage corresponding to the difference.

The first thin film transistor (T1) is a driving thin film transistor, which is connected to the driving voltage line (PL) and the storage capacitor (Cst), and emits an organic light emitting diode (OLED) from the driving voltage line (PL) in response to the voltage value stored in the storage capacitor (Cst). The driving current flowing through the OLED can be controlled. Organic light-emitting diodes (OLEDs) can emit light with a certain brightness by driving current. The opposing electrode (e.g., cathode) of the organic light emitting diode (OLED) may be supplied with the second power voltage (ELVSS).

Figure 4 illustrates that the pixel circuit (PC) includes two thin film transistors and one storage capacitor, but the present invention is not limited thereto. Of course, the number of thin film transistors and the number of storage capacitors can vary depending on the design of the pixel circuit (PC).

Referring again to FIG. 3, the first non-display area NDA1 may surround the opening area OA. The first non-display area (NDA1) is an area where display elements such as organic light-emitting diodes that emit light are not disposed. The first non-display area (NDA1) includes pixels (P) provided around the opening area (OA). Wires such as signal lines that provide signals may pass through or grooves, which will be described later, may be placed. The second non-display area NDA2 includes a scan driver 1100 that provides a scan signal to each pixel (P), a data driver 1200 that provides a data signal to each pixel (P), and first and second power supplies. Main power wiring (not shown) to provide voltage may be disposed. Alternatively, the data driver 1200 may be placed on a flexible printed circuit board (FPCB) connected to a pad provided on one side of the display panel 10.

Figure 5 is a plan view showing a portion of a display panel according to an embodiment of the present invention, showing wires (eg, signal lines) located in the first non-display area.

Referring to FIG. 5, pixels P are arranged in the display area DA with the opening area OA as the center, and a first non-display area NDA1 is between the opening area OA and the display area DA. can be located

The pixels P may be arranged to be spaced apart from each other around the opening area OA. The pixels P may be spaced above and below the aperture area OA, or may be spaced left and right around the aperture area OA.

Among the signal lines that supply signals to the pixels (P), signal lines adjacent to the opening area (OA) may bypass the opening area (OA). Some of the data lines (DL) among the data lines passing through the display area (DA) extend in the y direction to provide data signals to the pixels (P) arranged above and below with the opening area (OA) in between, It is possible to detour along the edge of the opening area (OA) in the first non-display area (NDA1). Among the scan lines passing through the display area DA, some scan lines SL extend in the x-direction to provide scan signals to the pixels P arranged on the left and right with the opening area OA in between. 1You can detour along the edge of the opening area (OA) in the non-display area (NDA1).

Figure 6 is a plan view showing a portion of a display panel according to an embodiment of the present invention, showing a groove located in the first non-display area.

A groove is located between the opening area (OA) and the display area (DA). In relation to this, FIG. 6 shows that the first to third grooves G1, G2, and G3 are located between the opening area OA and the display area DA. As another example, two grooves or four or more grooves may be located in the first non-display area NDA1.

The first to third grooves G1, G2, and G3 may have a ring shape that entirely surrounds the opening area OA in the first non-display area NDA1. The diameter of each of the first to third grooves G1, G2, and G3 may be larger than the diameter of the opening area OA, and the first to third grooves G1, G2, and G3 are spaced apart from each other. For example, the diameter of the first groove (G1) may be larger than the diameter of the second groove (G2), and the diameter of the second groove (G2) may be larger than the diameter of the third groove (G3).

As shown in FIG. 6, the widths of at least two of the first to third grooves G1, G2, and G3 may be different from each other. Alternatively, the widths between the protruding tips of at least two of the first to third grooves G1, G2, and G3 may be changed in various ways, such as being the same.

Referring to Figures 5 and 6, the first to third grooves G1, G2, and G3 are formed in an opening area (G1, G2, G3) rather than a bypass area of signal lines, such as data lines or scan lines, that bypass the edges of the opening area (OA). It may be located closer to OA).

Figure 7 is a plan view schematically showing an excerpt of another input sensing layer according to an embodiment of the present invention. For convenience of explanation, FIG. 7 shows a part of the input sensing layer, that is, a part of the input sensing layer placed in the display area DA described in FIG. 3.

Referring to FIG. 7, the input sensing layer 400 includes a first sensing electrode (SP1) and a second sensing electrode (SP2) located in the display area (DA). The first sensing electrodes (SP1) are arranged along the x-direction, and the second sensing electrodes (SP2) are arranged along the y-direction that intersects the first sensing electrodes (SP1). The first sensing electrodes (SP1) and the second sensing electrodes (SP2) may cross each other vertically.

The first sensing electrodes (SP) and the second sensing electrodes (SP2) may be arranged at corners adjacent to each other. The first sensing electrodes SP1 may be electrically connected to each other through the first connection electrode CP1, and the second sensing electrodes SP2 may be electrically connected to each other through the second connection electrode CP2.

FIGS. 8A and 8B are plan views showing a first conductive layer and a second conductive layer among the input sensing layers according to an embodiment of the present invention, respectively, and FIG. 8C is a cross-sectional view showing the input sensing layer according to an embodiment of the present invention. As, it can correspond to the cross section along line VII-VII' in FIG. 7.

Referring to FIGS. 8A and 8B , the first sensing electrode SP1 and the second sensing electrode SP2 may be disposed on the same layer. The first conductive layer 410 includes a first connection electrode (CP1) (see FIG. 8A), and the second conductive layer 420 includes a first sensing electrode (SP1), a second sensing electrode (SP2), and a first sensing electrode (SP2). It may include two connection electrodes (CP2) (see Figure 8b).

The second sensing electrodes (SP2) may be connected by a second connection electrode (CP2) disposed on the same layer. The first sensing electrodes (SP1) are arranged along the x-direction and may be connected by a first connection electrode (CP1) disposed on a different layer.

Referring to FIG. 8C, a second insulating layer 403 is interposed between the first conductive layer 410 and the second conductive layer 420. The first sensing electrode (SP1) disposed on the second conductive layer 420 is connected to the first connection electrode (CP1) disposed on the first conductive layer 410 through the contact hole (CNT) of the second insulating layer 403. can be connected to. The second conductive layer 420 may be covered with a third insulating layer 405, and a first insulating layer 401 may be disposed under the first conductive layer 410. The first and second insulating layers 401 and 403 may be inorganic insulating layers such as silicon nitride, and the third insulating layer 405 may be an organic insulating layer. In Figure 8c, the thin film encapsulation layer 300 and the first conductive layer are shown. It is shown that the first insulating layer 401 is interposed between the layers 410, but in another embodiment, the first insulating layer 401 is omitted and the first conductive layer 410 is placed directly on the thin film encapsulation layer 300. It can be located above. As another example, the first and second insulating layers 401 and 403 may be organic insulating layers.

Figures 9a and 9b are plan views showing the first conductive layer and the second conductive layer among the input sensing layers according to another embodiment of the present invention, respectively, and Figure 9c is a cross-sectional view showing the input sensing layer according to another embodiment of the present invention. As, it can correspond to the cross section along line VII-VII' in FIG. 7.

Referring to FIGS. 9A and 9B, the first conductive layer 410 includes first sensing electrodes SP1 and a first connection electrode CP1 connecting them, and the second conductive layer 420 includes the second sensing electrodes SP1. It includes sensing electrodes (SP2) and a second connection electrode (CP2) connecting them. The first conductive layer 410 may further include a second auxiliary sensing electrode (S-SP2) connected to the second sensing electrode (SP2), and the second conductive layer 420 is connected to the first sensing electrode (SP1). It may further include a first auxiliary sensing electrode (S-SP1) connected to.

Referring to the enlarged view of FIG. 9A, each first sensing electrode SP1 may include a plurality of holes H. The hole (H) is arranged to overlap the light emitting area (P-E) of the pixel. Although not shown, the second sensing electrode (SP2), the first auxiliary sensing electrode (S-SP1), and the second auxiliary sensing electrode (S-SP2) also correspond to the light emitting area (P-E) of the pixel as shown in the enlarged view of FIG. 9A. It may include a plurality of holes.

Referring to FIG. 9C, the first auxiliary sensing electrode (S-SP1) can be connected to the first sensing electrode (SP1) through the contact hole (CNT) of the second insulating layer 403, and through this structure, The resistance of the first sensing electrode (SP1) can be reduced. Likewise, the second sensing electrode (SP2) can be connected to the second auxiliary sensing electrode (S-SP2) through a contact hole in the second insulating layer (403). The first and second insulating layers 401 and 403 may be inorganic insulating layers, the first and second conductive layers 410 and 420 may be a single layer or a multilayer containing a metal such as aluminum or titanium, and the third conductive layer may be a single or multilayer layer containing a metal such as aluminum or titanium. The insulating layer 405 may include an organic insulating material.

Figures 10a and 10b are plan views showing the first conductive layer and the second conductive layer among the input sensing layers according to another embodiment of the present invention, respectively, and Figure 10c is a cross-sectional view showing the input sensing layer according to another embodiment of the present invention. As, it can correspond to the cross section along line VII-VII' in FIG. 7.

Referring to FIGS. 10A and 10B, the first conductive layer 410 includes first sensing electrodes SP1 and a first connection electrode CP1 connecting them, and the second conductive layer 420 includes the second sensing electrodes SP1. It includes sensing electrodes (SP2) and a second connection electrode (CP2) connecting them.

Referring to FIG. 10C, a second insulating layer 403' may be disposed between the first conductive layer 410 and the second conductive layer 420. The second insulating layer 403' does not have a separate contact hole, and the first and second sensing electrodes SP1 and SP2 may be electrically insulated with the second insulating layer 403' therebetween. The second conductive layer 420 may be covered with a third insulating layer 405'. The second insulating layer 403' may be an organic insulating layer. In another embodiment, the second insulating layer 403' may include an inorganic insulating layer or both organic and inorganic insulating layers. And the second insulating layer 403' may be an organic insulating layer, an inorganic insulating layer, or may include organic and inorganic insulating layers.

FIG. 11 is a cross-sectional view showing a display panel according to an embodiment of the present invention, corresponding to a cross-section taken along line XI-XI' of FIG. 6, and FIG. 12 is an enlarged cross-sectional view of the organic light emitting diode of FIG. 11. 11 shows the opening area (OA) and the first non-display area (NDA1) and display area (DA) surrounding it, and the substrate 100 has a first opening (100H) corresponding to the opening area (OA). It can be included. Hereinafter, the opening area OA may be understood to refer to the opening 10H of the display panel or the first opening 100H of the substrate 100.

First, look at the display area DA in FIG. 11.

The substrate 100 may include polymer resin. The substrate 100 may include a base layer containing a polymer resin and an inorganic layer. For example, the substrate 100 may include a first base layer 101, a first inorganic layer 102, a second base layer 103, and a second inorganic layer 104, which are sequentially stacked.

The first and second base layers 101 and 103 may each include a polymer resin. For example, the first and second base layers 101 and 103 are made of polyethersulphone (PES), polyacrylate (PAR), polyetherimide (PEI), and polyethylene naphthalate (PEN). napthalate), polyethyeleneterepthalate (PET), polyphenylene sulfide (PPS), polyallylate, polyimide (PI), polycarbonate (PC), cellulose triacetate (TAC) , and may include polymer resins such as cellulose acetate propionate (CAP). The polymer resin may be transparent.

The first and second inorganic layers 102 and 104 are barrier layers that prevent penetration of external substances, respectively, and may be a single layer or a multilayer containing inorganic materials such as silicon nitride (SiNx) and/or silicon oxide (SiOx). You can.

A buffer layer 201 formed to prevent impurities from penetrating into the semiconductor layer of the thin film transistor may be disposed on the substrate 100. The buffer layer 201 may include an inorganic insulating material such as silicon nitride or silicon oxide, and may be a single layer or a multilayer. In some embodiments, the second inorganic layer 104 of the substrate 100 may be understood as a part of the multilayer buffer layer 201.

A pixel circuit (PC) including a thin film transistor (TFT) and a storage capacitor (Cst) may be disposed on the buffer layer 201. A thin film transistor (TFT) may include a semiconductor layer (Act), a gate electrode (GE), a source electrode (SE), and a drain electrode (DE). The thin film transistor (TFT) shown in FIG. 11 may correspond to the driving thin film transistor described with reference to FIG. 4. In this embodiment, a top gate type is shown in which the gate electrode (GE) is disposed on the semiconductor layer (Act) with the gate insulating layer 203 in the center. However, according to another embodiment, the thin film transistor (TFT) is a bottom gate type. It can be.

The semiconductor layer (Act) may include polysilicon. Alternatively, the semiconductor layer (Act) may include amorphous silicon, an oxide semiconductor, an organic semiconductor, etc. The gate electrode (GE) may include a low-resistance metal material. The gate electrode (GE) may contain a conductive material containing molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or single layer containing the above materials. there is.

A gate insulating layer 203 is interposed between the semiconductor layer (Act) and the gate electrode (GE), and the gate insulating layer 203 is made of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, and tantalum oxide. , and may include inorganic insulators such as hafnium oxide. The gate insulating layer 203 may be a single layer or a multilayer containing the above-described materials.

The source electrode (SE) and drain electrode (DE) may include a material with good conductivity. The source electrode (SE) and drain electrode (DE) may contain a conductive material containing molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be a multilayer containing the above materials. Alternatively, it may be formed as a single layer. In one embodiment, the source electrode (SE) and drain electrode (DE) may be formed of a multilayer of Ti/Al/Ti.

The storage capacitor Cst includes a lower electrode CE1 and an upper electrode CE2 that overlap with the first interlayer insulating layer 205 therebetween. The storage capacitor (Cst) may overlap with the thin film transistor (TFT). In this regard, FIG. 11 shows that the gate electrode (GE) of the thin film transistor (TFT) is the lower electrode (CE1) of the storage capacitor (Cst). As another example, the storage capacitor (Cst) may not overlap the thin film transistor (TFT). The storage capacitor Cst may be covered with the second interlayer insulating layer 207.

The first and second interlayer insulating layers 205 and 207 may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxy nitride, aluminum oxide, titanium oxide, tantalum oxide, and hafnium oxide. The first and second interlayer insulating layers 205 and 207 may be a single layer or a multilayer containing the above-described materials.

The pixel circuit (PC) including a thin film transistor (TFT) and a storage capacitor (Cst) is covered with an organic insulating layer 209. The organic insulating layer 209 may be a planarization insulating layer. The organic insulating layer 209 is made of general-purpose polymers such as polymethylmethacrylate (PMMA) or polystylene (PS), polymer derivatives with phenolic groups, acrylic polymers, imide polymers, aryl ether polymers, amide polymers, fluorine polymers, p -May include organic insulators such as xylene-based polymers, vinyl alcohol-based polymers, and blends thereof. In one embodiment, the organic insulating layer 209 may include polyimide.

An organic light emitting diode (OLED) is disposed on the organic insulating layer 209. The pixel electrode 221 of the organic light emitting diode (OLED) is disposed on the organic insulating layer 209 and can be connected to the pixel circuit (PC) through a contact hole in the organic insulating layer 209.

The pixel electrode 221 is made of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In ₂ O ₃ ), and indium. It may contain a conductive oxide such as gallium oxide (IGO; indium gallium oxide) or aluminum zinc oxide (AZO). In another embodiment, the pixel electrode 221 is made of silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), and neodymium (Nd). , it may include a reflective film containing iridium (Ir), chromium (Cr), or a compound thereof. In another embodiment, the pixel electrode 221 may further include a film formed of ITO, IZO, ZnO, or In ₂ O ₃ above and below the above-described reflective film.

The pixel definition film 211 includes an opening that exposes the top surface of the pixel electrode 221 and covers the edges of the pixel electrode 221. The pixel defining layer 211 may include an organic insulating material. Alternatively, the pixel defining layer 211 may include an inorganic insulating material, or may include an organic or inorganic insulating material.

The middle layer 222 includes a light emitting layer. The light-emitting layer may include a polymer or low-molecular organic material that emits light of a predetermined color. In one embodiment, the intermediate layer 222 includes a first functional layer 222a disposed below the light-emitting layer 222b and/or a second functional layer 222c disposed above the light-emitting layer 222b, as shown in FIG. 12. ) may include.

The first functional layer 222a may be a single layer or a multilayer. For example, when the first functional layer 222a is formed of a polymer material, the first functional layer 222a is a single-layer hole transport layer (HTL), and is polyethylene dihydroxythiophene (PEDOT: poly-( 3,4)-ethylene-dihydroxy thiophene) or polyaniline (PANI: polyaniline). When the first functional layer 222a is formed of a low molecule material, the first functional layer 222a may include a hole injection layer (HIL) and a hole transport layer (HTL).

The second functional layer 222c is not always provided. For example, when the first functional layer 222a and the light-emitting layer 222b are formed of a polymer material, it is preferable to form the second functional layer 222c in order to improve the characteristics of the organic light-emitting diode (OLED). . The second functional layer 222c may be a single layer or a multilayer. The second functional layer 222c may include an electron transport layer (ETL) and/or an electron injection layer (EIL).

Some of the plurality of layers forming the middle layer 222, for example, functional layer(s), may be disposed not only in the display area DA but also in the first non-display area NDA1, which will be described later in the first non-display area NDA1. It is cut off by the first and second grooves G1 and G2.

The counter electrode 223 is arranged to face the pixel electrode 221 with the intermediate layer 222 interposed therebetween. The counter electrode 223 may be made of a conductive material with a low work function. For example, the counter electrode 223 is made of silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), and iridium ( It may include a (semi) transparent layer containing Ir), chromium (Cr), lithium (Li), calcium (Ca), or alloys thereof. Alternatively, the counter electrode 223 may further include a layer such as ITO, IZO, ZnO, or In ₂ O ₃ on the (semi) transparent layer containing the above-mentioned material.

The organic light emitting diode (OLED) is covered with a thin film encapsulation layer 300 and can be protected from external foreign substances or moisture. The thin film encapsulation layer 300 may include at least one organic encapsulation layer and at least one inorganic encapsulation layer. FIG. 11 shows that the thin film encapsulation layer 300 includes first and second inorganic encapsulation layers 310 and 330 and an organic encapsulation layer 320 sandwiched between them. In other embodiments, the number of organic encapsulation layers and the number and stacking order of inorganic encapsulation layers may be changed.

The first and second inorganic encapsulation layers 310 and 330 may include one or more inorganic insulating materials such as aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride, It can be formed by chemical vapor deposition (CVD), etc. The organic encapsulation layer 320 may include a polymer-based material. Polymer-based materials may include acrylic resin, epoxy resin, polyimide, and polyethylene.

The input sensing layer 400 is located in the display area (DA). The input sensing layer 400 can acquire coordinate information according to an external input, for example, a touch event. The input sensing layer 400 is formed directly on the substrate 100 on which the thin film encapsulation layer 300 is formed and can contact the thin film encapsulation layer 300, and thus the input sensing layer 400 and the thin film encapsulation layer 300 A member such as an adhesive layer for joining them may be omitted. The input sensing layer 400 may include a sensing electrode (sensing electrode or touch electrode) and signal lines (trace lines) connected to the sensing electrode. The input sensing layer 400 includes first and second conductive layers 410 and 420 on which sensing electrodes are disposed. The input sensing layer 400 may include insulating layers disposed above and below the first and second conductive layers 410 and 420, for example, first to third insulating layers 401, 403, and 405, The specific structure of the input sensing layer 400 related to this will be replaced with the content previously described with reference to FIGS. 7 to 10C.

Look at the first non-display area (NDA1) in FIG. 11.

Referring to the first non-display area (NDA1) of FIG. 11, the first non-display area (NDA1) is located in the first sub-non-display area (SNDA1) and the opening area (OA) that are relatively distant from the opening area (OA). It may include a relatively close second sub-non-display area (SNDA2).

The first sub-non-display area (SNDA1) is an area through which signal lines pass. The data lines DL shown in FIG. 11 may correspond to data lines that bypass the opening area OA described with reference to FIG. 5 . The first sub-non-display area (SNDA1) may be a wiring area or a bypass area through which signal lines pass. The data lines DL may be arranged alternately with an insulating layer interposed therebetween, as shown in FIG. 11 . In another embodiment, the data lines DL may be disposed on the same insulating layer. When neighboring data lines DL are arranged below and above with an insulating layer (e.g., second interlayer insulating layer 207) in between, the gap (pitch) between neighboring data lines DL can be reduced. , the width of the first non-display area (NDA1) can be reduced. Although not shown, similar to the data lines DL located in the first sub-non-display area SNDA1 of FIG. 11, there are also scan lines that bypass the opening area OA described above with reference to FIG. 5. It may be located in the first sub-non-display area (SNDA1).

The second sub-non-display area SNDA2 is a type of groove area where grooves are arranged, and the first to third grooves G1, G2, and G3 may be located. The first to third grooves G1, G2, and G3 may each have an undercut structure. The first to third grooves G1, G2, and G3 may be formed in a multilayer film including an inorganic layer and an organic layer. For example, the first to third grooves G1, G2, and G3 may be formed by removing a portion of the substrate 100 including multiple layers.

The first to third grooves G1, G2, and G3 may be formed by etching the second base layer 103 of the substrate 100 and the second inorganic layer 104 thereon. In this regard, FIG. 11 shows that a portion of the second base layer 103 and a portion of the second inorganic layer 104 are removed to form first to third grooves G1, G2, and G3. In one embodiment, the buffer layer 201, the gate insulating layer 203, and the first and second interlayer insulating layers 205 and 207 on the second inorganic layer 104 are also removed to form the first to third grooves (G1, It can form part of G2, G3).

Each of the first to third grooves G1, G2, and G3 may have an undercut structure. Each of the first to third grooves (G1, G2, G3) has a width of the portion passing through the second base layer 103, such as an inorganic insulating layer(s), such as the second inorganic layer 104 and/or the buffer layer 201. It may have an undercut structure that is larger than the width of the part passing through. A portion of the middle layer 222 (eg, first and second functional layers) and the counter electrode 223 may be cut off through the undercut structure of the first to third grooves G1, G2, and G3.

The first inorganic encapsulation layer 310 of the thin film encapsulation layer 300 may cover the inner surface of the first to third grooves G1, G2, and G3. The organic encapsulation layer 320 covers the first groove (G1) and may fill the first groove (G1) on the first inorganic encapsulation layer (310). The organic encapsulation layer 320 can be formed by applying a monomer on the substrate 100 and then curing it. In order to control the flow of the monomer and secure the thickness of the monomer (or organic encapsulation layer), the first and A partition wall 500 may be provided between the second grooves G1 and G2. The barrier wall 500 may include an organic insulating material and, for example, may have a stacked structure of first and second sub-wall portions 510 and 520.

The end 320E of the organic encapsulation layer 320 may be disposed at a predetermined distance from the opening area OA or from the end 100E of the substrate 100. In some embodiments, during the process of forming the organic encapsulation layer 320, the material of the organic encapsulation layer 320 may also be present in the second groove G2. In relation to this, FIG. 7 shows that an organic material 320A exists in the second groove G2.

The second inorganic encapsulation layer 330 is disposed on the organic encapsulation layer 320 and may cover the inner surfaces of the second and third grooves G2 and G3. The second inorganic encapsulation layer 330 may directly contact the first inorganic encapsulation layer 310 in the second and third grooves G2 and G3.

A planarization layer 610 may be located on the second inorganic encapsulation layer 330 corresponding to the second and third grooves G2 and G3, and a lower barrier layer 700 may be located below the planarization layer 610. can do.

The planarization layer 610 may be located in the second sub-non-display area SNDA2 to cover at least one groove. The planarization layer 610 may cover the second and third grooves G3 and G3 and may fill at least one of the second and third grooves G2 and G3. As shown in FIG. 11, the space above the second inorganic encapsulation layer 330 among the second and third grooves G2 and G3 may be filled with the planarization layer 610. The planarization layer 610 may be filled with the second sub-layer 610. -By covering the area of the non-display area (SNDA2) that is not covered by the organic encapsulation layer 320, the flatness of the display panel around the opening area (OA) can be increased. Accordingly, when components such as anti-reflection members or windows are placed on the display panel 10, they can be prevented from being poorly coupled, separated, or lifted from the display panel 10.

The planarization layer 610 includes an organic insulating material. The planarization layer 610 may include photoresist (eg, negative or positive photoresist). Alternatively, the planarization layer 610 may include the same material as the third insulating layer previously described with reference to FIGS. 8C, 9C, and 10C.

The planarization layer 610 may be located on the thin film encapsulation layer 300. The planarization layer 610 may be spatially separated from the organic encapsulation layer 320 by the second inorganic encapsulation layer 330 . For example, the planarization layer 610 is disposed above the second inorganic encapsulation layer 330 and the organic encapsulation layer 320 is disposed below the second inorganic encapsulation layer 330, such that the organic encapsulation layer 320 and The planarization layer 610 may be spatially separated from each other. The organic encapsulation layer 320 and the planarization layer 610 may not be in direct contact. The planarization layer 610 may have a thickness of 5 μm or more.

A portion of the planarization layer 610 may overlap the organic encapsulation layer 320. The first end 610E1 of the planarization layer 610 may extend onto the organic encapsulation layer 320 and overlap the organic encapsulation layer 320 . The second end 610E2 of the planarization layer 610 faces the opening area OA. The second end 610E2 may be located on the same line as the end 100E of the substrate 100.

The lower barrier layer 700 may cover at least one groove. In this regard, FIG. 11 shows the lower barrier layer 700 covering the second groove G2. If a crack occurs or breaks in the inorganic layer formed around the second groove (G2) during the manufacturing process of the display panel, for example, the first and second inorganic encapsulation layers (310, 330), moisture is released through the crack or broken portion. This can penetrate. To prevent such problems, the lower barrier layer 700 may cover areas where cracks may occur on the second inorganic encapsulation layer 330, for example, the second groove G2 and its surroundings.

The lower barrier layer 700 contains an inorganic material. For example, the lower barrier layer 700 may include an inorganic insulating layer and/or a metal layer, and may be a single layer or a multilayer. In one embodiment, as shown in the enlarged view of FIG. 11, the lower barrier layer 700 may be formed of a plurality of first to fourth lower layers 701, 702, 703, and 704. The lower barrier layer 700 may include at least one layer among the layers included in the input sensing layer 400 described above with reference to FIGS. 8A to 10C.

For example, the first to fourth lower layers 701, 702, 703, and 704 are respectively the first insulating layer 401, the first conductive layer 410, the second insulating layer 403, and the input sensing layer 400. and may include the same material as the second conductive layer 420. The first and third lower layers 701 and 703 may be inorganic insulating layers such as silicon nitride, and the second and fourth lower layers 702 and 704 may be metal layers containing aluminum (Al), titanium (Ti), etc. You can. In some embodiments, the second and fourth lower layers 702 and 704 may be multilayers such as Ti/Al/Ti.

If the lower barrier layer 700 includes the same material as the inorganic material-containing layer of the input sensing layer 400, the lower barrier layer 700 is processed in the same process as the inorganic material-containing layer of the input sensing layer 400. can be formed. Similarly, the planarization layer 610 may include the same material as the organic material-containing layer of the input sensing layer 400, and the planarization layer 610 may include the same material as the organic material-containing layer of the input sensing layer 400. It can be formed in the process.

FIG. 11 shows that the end of the lower barrier layer 700 is spaced apart from the input sensing layer 400 by a predetermined distance, and the end of the planarization layer 610 is spaced apart from the input sensing layer 400 by a predetermined distance. Although the arrangement is shown, the present invention is not limited thereto. The first and third lower layers 701 and 703 of the lower barrier layer 700 may be integrally connected to the first and second insulating layers 401 and 403 of the input sensing layer 400, respectively. The second and fourth lower layers 702 and 704 of the lower barrier layer 700 are the first conductive layer 410 and the second conductive layer 420 of the input sensing layer 400, respectively, as shown in FIG. 11. can be separated from The planarization layer 610 may be integrally connected to the third insulating layer 405 of the input sensing layer 400.

Figure 11 shows that the lower barrier layer 700 has four layers, but the lower barrier layer 700 may be a single layer or two, three, five or more layers.

FIGS. 13, 14, 15, 17, and 19 are cross-sectional views showing the opening area and the first non-display area according to the manufacturing process of the display panel as an embodiment of the present invention, and FIG. 16 is XVI in FIG. 15. is an enlarged view, and FIG. 18 is an enlarged view of XVIII in FIG. 17. FIG. 13 is a cross-sectional view showing a state in which first to third grooves are formed in the display panel of FIG. 11, FIG. 14 is a cross-sectional view showing a state in which first to third grooves are formed as another embodiment, and FIG. 15 is a cross-sectional view showing a state in which first to third grooves are formed in the display panel of FIG. 11. It is a cross-sectional view showing the state in which the middle layer and the lower barrier layer are formed on the display panel, FIG. 17 is a cross-sectional view showing the state in which the planarization layer is formed, and FIG. 19 is a cross-sectional view showing the state after the cutting or scribing process.

Referring to FIG. 13, the first to third grooves G1, G2, and G3 can be formed by partially removing the multilayer film. A multilayer film is a layer including some layers of a substrate and may have a stacked structure of a layer including an organic insulating material such as polymer resin and a layer including an inorganic insulating material disposed thereon. For example, a second base layer 103 containing a polymer resin, and an inorganic insulating layer(s) such as a second inorganic layer 104 or/and a buffer layer 201 on the second base layer 103 are attached to the multilayer film. It may apply. In FIG. 13, the second inorganic layer 104 and the buffer layer 201 are named as separate inorganic insulating layers between the second base layer 103 and the thin film transistor (TFT), but according to the embodiment, the second inorganic layer 104 and the buffer layer 201 are each named separately. The layer 104 may be understood as a part of the multi-layered buffer layer 201, or the buffer layer 201 may be understood as a part of the multi-layered second inorganic layer 104.

The first to third grooves G1, G2, and G3 may be formed by partially removing the second base layer 103 and the inorganic insulating layer(s) thereon. In one embodiment, Figure 13 shows a second base layer 103, a second inorganic layer 104, a buffer layer 201, a gate insulating layer 203, and first and second interlayer insulating layers 205 and 207. It shows what was removed through this etching process. The etching process for removing a portion of the second base layer 103 and the etching process for removing the inorganic insulating layer(s) on the second base layer 103 may be performed separately. A partition 500 may be located between the first groove (G1) and the second groove (G2), and the partition 500 is a first sub-partition 510 formed of the same material as the organic insulating layer 209. and a second sub-partition wall portion 520 formed of the same material as the pixel defining layer 211.

Along the depth (thickness) direction, the width W1 of the portion of the first groove G1 passing through the second base layer 103 is the buffer layer 201 and/or the second inorganic layer ( 104), the first groove G1 may have an undercut structure. The side surfaces of the buffer layer 201 and/or the second inorganic layer 104 may protrude further toward the center of the first groove G1 than the side surfaces of the second base layer 103. The portions of the buffer layer 201 and/or the second inorganic layer 104 that protrude further in a direction parallel to the upper surface of the substrate 100 toward the center of the first groove G1 are a pair of eaves (or a pair of eaves). Corresponds to the protruding tip or tip (PT).

Like the first groove (G1), the second and third grooves (G2, G3) also have an undercut structure/eave structure. The width (W1', W1") of the portion of the second and third grooves (G2, G3) passing through the second base layer 103 is determined by the buffer layer 201 and/or the second weapon in the first groove (G1). It may be formed to be larger than the width (W2', W2") of the portion passing through the layer 104. Likewise, the side of the buffer layer 201 and/or the second inorganic layer 104 defining the second and third grooves (G2, G3) is closer to the first groove (G1) than the side of the second base layer (103). It may protrude further toward the center of . The side surfaces of the buffer layer and/or the second inorganic insulating layer 104, for example, the protruding tips PT of each of the first to third grooves G1, G2, and G3, are formed on the first to third grooves G1, G2, and G3. ) may protrude about 0.7㎛ to 1.5㎛ toward the center.

13 shows holes through which each of the first to third grooves G1, G2, and G3 passes through an inorganic insulating layer, for example, a hole formed in the buffer layer 201 and the second inorganic layer 104, and the second base layer 103. It shows that it consists of a recess formed in . The depth (h1, h2, h3) of each recess formed in the second base layer 103 may be smaller than the thickness (t) of the second base layer 103. Bottom surfaces of the first to third grooves G1, G2, and G3 may be placed on an imaginary surface between the upper and lower surfaces of the second base layer 103, respectively.

In another embodiment, as shown in FIG. 14, each of the first to third grooves G1, G2, and G is a hole passing through an inorganic insulating layer (e.g., a buffer layer 201 and a second inorganic layer 104). It may be composed of a hole formed in) and a hole passing through the second base layer 103. The depths (h1', h2', h3') of each hole formed in the second base layer 103 may be substantially equal to the thickness (t) of the second base layer 103, and thus the first to third grooves The bottom surfaces of (G1, G2, G3) may each be placed on the same virtual surface as the bottom surface of the second base layer 103. The depth of the above-mentioned recess or hole (h1, h2, h3, h1', h2', h3') may be about 2㎛ or more.

Hereinafter, for convenience of explanation, the description will focus on the structure of FIG. 13 in which the bottom surfaces of the first to third grooves G1, G2, and G3 are located between the upper and lower surfaces of the second base layer 103, which will be described later. In the embodiments and embodiments derived therefrom, the second base layer 103 may have the structure described with reference to FIG. 14 .

Referring to FIG. 15, an intermediate layer 222 and a counter electrode 223 are formed on the substrate 100 having the first to third grooves G1, G2, and G3. The middle layer 222 and the counter electrode 223 may be formed by a thermal evaporation method or the like.

A portion of the intermediate layer, for example, the first and second functional layers, and the counter electrode 223 may be formed integrally in the display area DA and the first non-display area NDA1. As shown in FIG. 16, the first and second functional layers 222a and 222c may be cut off in the first non-display area NDA1 by the undercut structure of the second groove G2. The first and second functional layers 222a and 222c are cut off by a pair of tips (“PT”) defining the undercut structure of the second groove G2, and the counter electrode 223 is also cut off. The first and second functional layers 222a and 222c and the counter electrode 223 are also disconnected by the undercut structure of the first and second grooves G1 and G2, as shown in FIG. 15.

Among the layers on the substrate 100, a layer containing organic material may serve as a moisture permeation path for foreign substances such as moisture or oxygen. Since the first and second functional layers 222a and 222c, which are organic materials, are cut off by the first to third grooves G1, G2, and G3, moisture flows in the lateral direction (x-direction) and flows into the organic light-emitting diode. It can prevent damage.

Among the thin film encapsulation layers 300, the first inorganic encapsulation layer 310 has relatively excellent step coverage, unlike the middle layer 222 and the counter electrode 223, so the first inorganic encapsulation layer 310 can be formed continuously. there is. The first inorganic encapsulation layer 310 may entirely cover the inner surfaces of the first to third grooves G1, G2, and G3.

The organic encapsulation layer 320 is formed on the first inorganic encapsulation layer 310. The first groove G1 is covered with the organic encapsulation layer 320, and the space above the first inorganic encapsulation layer 310 in the first groove G1 may be filled with the organic encapsulation layer 320. During the manufacturing process of the organic encapsulation layer 320, the flow of monomer may be controlled by the partition wall 500 between the first groove (G1) and the second groove (G2). The organic encapsulation layer 320 formed by curing the monomer whose flow is controlled by the partition wall 500 may not extend past the partition wall 500.

In some embodiments, as shown in FIGS. 15 and 16 , the organic material 320A may be located in the second groove G2 during the manufacturing process of the organic encapsulation layer 320. For example, during the process of applying the monomer, a portion of the monomer may fall into the second groove G2 and harden to form the organic material 320A. In another embodiment, a process of curing the monomer and ashing may be performed, and at this time, organic matter 320A that is not removed by ashing may exist in the second groove G2. The organic material 320A may be present under the eaves structure of the second groove G2, for example, the protruding tip T. The organic material 320A may be the same material as the organic encapsulation layer 320. The organic material 320A is cut off from the organic encapsulation layer 320 around the partition wall 500.

The second inorganic encapsulation layer 330 is formed on the organic encapsulation layer 320. On the first groove G1, the first inorganic encapsulation layer 310 does not directly contact the second inorganic encapsulation layer 330 due to the organic encapsulation layer 320. On the other hand, the first and second inorganic encapsulation layers 310 and 330 may contact each other on the second and third grooves G2 and G3. As shown in FIG. 15 , the first and second inorganic encapsulation layers 310 and 330 may be formed not only in the first non-display area NDA1 but also in the opening area OA.

Next, the lower barrier layer 700 may be formed on the second inorganic encapsulation layer 330. The lower barrier layer 700 may be formed to cover a portion of the first non-display area NDA1, for example, the second groove G2. In one embodiment, the lower barrier layer 700 may be formed of a plurality of first to fourth lower layers 701, 702, 703, and 704, as shown in FIG. 16. The depth (h2) of the portion of the second groove (G2) passing through the second base layer (103) is the first and second functional layers (222a, 222c), the counter electrode (223), and the first and second inorganic encapsulation layers. It may be formed to be larger than the sum of the thicknesses of the layers 310 and 330 and the lower barrier layer 700 in the vertical direction (direction perpendicular to the top surface of the substrate, z-direction).

The first to fourth lower layers 701, 702, 703, and 704 may be sequentially formed on the second inorganic encapsulation layer 330. Since the space according to the undercut structure of the second groove G2, that is, the space below the protruding tip T, is filled with the organic material 320A, the layers of the lower barrier layer 700 have a thickness around the protruding tip T. It can be formed very thinly or continuously without phenomenon such as breaking.

Referring to FIG. 17, a planarization layer 610 may be formed on the lower barrier layer 700. The planarization layer 610 may include the same material as the organic material provided in at least one of the layers provided in the input sensing layer described above with reference to FIGS. 8A to 10C. Alternatively, the planarization layer 610 may include photoresist (eg, negative or positive photoresist) or may include the same material as the organic encapsulation layer of the thin film encapsulation layer 300.

Referring to FIG. 18 , the planarization layer 610 may fill the second groove G2. For example, the planarization layer 610 may fill the space above the lower barrier layer 700 in the second groove G2.

Next, if a laser cutting or scribing process is performed along the first line SCL1 corresponding to the opening area OA, the opening 10H of the display panel can be formed as shown in FIG. 19. A first opening 100H may be formed in the substrate 100 through a cutting or scribing process. If a crack occurs in the inorganic insulating layer during the cutting or scribing process of the substrate 100, the crack may progress along the lateral direction (x-direction), but is not formed in the third groove (G3) or the second groove (G2). It may stop around the protruding tip of . Accordingly, the crack may no longer progress toward the display area.

In the above-described embodiment, a laser cutting or scribing process was described as a method of forming the first opening 100H in the substrate 100, but in other embodiments, various methods such as mechanical polishing can be used.

Figure 20 is a plan view schematically showing a lower barrier layer in a display panel according to an embodiment of the present invention. In FIG. 20 , the first groove G1 is omitted for convenience.

Referring to FIG. 20, the lower barrier layer 700 may have a ring shape surrounding the opening area OA. The lower barrier layer 700 covers the second groove G2 and may have a width greater than the width of the second groove G2.

The cross-sectional structure of the first non-display area NDA1 shown in FIG. 20 may be the same as the structure previously described with reference to FIGS. 11 to 19. That is, the structure described with reference to FIGS. 11 to 19 can be understood as a structure surrounding the opening 10H, that is, the opening area OA, as shown in FIG. 20. For example, the lower barrier layer 700 between the opening area OA and the display area DA is understood to have a ring shape surrounding the opening area OA in a plan view, as shown in FIG. 20 . Likewise, the planarization layer 610 described in FIGS. 11 to 19 may also be understood as a ring shape surrounding the opening area OA in a plane view. The partition wall 500 may also be understood as a ring shape surrounding the opening area (OA) in a plan view.

Figure 21 is a plan view schematically showing a lower barrier layer in a display panel according to another embodiment of the present invention. In FIG. 21 , like FIG. 20 , the first groove G1 is omitted for convenience.

Referring to FIG. 21 , the lower barrier layer 700 has a ring shape surrounding the opening area OA, but may only cover a partial area of the second groove G2 in a plan view. For example, the width of the lower barrier layer 700 may be smaller than the width of the second groove G2, and the lower barrier layer 700 is located on one side of the second groove G2, for example, the second groove described with reference to FIG. 16. It can cover any one of a pair of protruding tips provided in (G2), for example, the right protruding tip (T).

20 and 21 show that the lower barrier layer 700 has a closed curve shape on a plane, but the present invention is not limited thereto. In another embodiment, the lower barrier layer 700 may have an open curved shape on a plane.

Figure 22 is a plan view schematically showing a lower barrier layer in a display panel according to another embodiment of the present invention. In FIG. 22 , like FIG. 20 , the first groove G1 is omitted for convenience.

Referring to FIG. 22 , the lower barrier layer 700' may have an open curved shape in the first non-display area NDA1. The first end 710 and the second end 720 of the lower barrier layer 700' are spaced apart from each other and are formed independently. Although not shown, the lower barrier layer 700' of FIG. 22 may have a stacked structure of multiple layers, as previously described with reference to FIG. 11.

Among the lower barrier layers 700', at least one of the layers containing a conductive material, for example, the second and/or fourth lower layers, may be used as a wiring. For example, a predetermined signal applied to the first end 710 may be output to the outside through the second end 720 through a layer containing a conductive material, but if a portion of the lower barrier layer 700' is broken, , a signal may not be output from the second end 720. In this way, the lower barrier layer 700' can be used to check the occurrence of cracks that may occur during or after manufacturing the display panel.

A portion of the lower barrier layer 700', for example, a portion between the first end 710 and the second end 720, may have a zigzag shape as shown in FIG. 22. The first portion of the lower barrier layer 700' may extend along the edge of the second groove G2 to partially surround the second groove G2, and the second portion of the lower barrier layer 700' may extend to partially surround the second groove G2. 2 It may be extended at a predetermined distance toward the center of the opening area (OA) to overlap the groove (G2). While the first and second parts are repeatedly disposed, the lower barrier layer 700' may have a zigzag shape on a plane.

In the above-described embodiment, it has been described that the lower barrier layer 700 is located in the first non-display area NDA1 to cover the second groove G2, but the present invention is not limited to this. As another example, the lower barrier layer 700 may cover the second and third grooves G2 and G3.

FIG. 23 is a cross-sectional view of the first non-display area of a display panel according to another embodiment of the present invention, and FIG. 24 is an enlarged cross-sectional view of portion XXIV of FIG. 23.

Referring to FIG. 23, the lower barrier layer 700 can cover the second and third grooves G2 and G3 in the first non-display area NDA1, and other than this feature, the remaining structure and features are as described above. Since it is the same as described, the following will focus on the differences.

Referring to the first non-display area NDA1 of FIG. 23, the second and third grooves G2 and G3 are each covered with the lower barrier layer 700, and one end 700E of the lower barrier layer 700 May be located on the same line as the end 100E of the substrate 100. The laminated structure on the second groove G2 is the same as previously described with reference to FIGS. 16 and 18.

The first and second inorganic encapsulation layers 310 and 330 and the lower barrier layer 700 are sequentially formed on the third groove G3. The second inorganic encapsulation layer 330 may be in direct contact with the upper surface of the first inorganic encapsulation layer 310, and the lower barrier layer 700 may be in direct contact with the upper surface of the second inorganic encapsulation layer 330.

Referring to FIG. 24, the depth (h3) of the portion of the third groove (G3) passing through the second base layer (103) is the first and second functional layers (222a, 222c), the counter electrode (223), and the first and the second inorganic encapsulation layers 310 and 330 and the lower barrier layer 700 may be formed to be larger than the sum of the thicknesses in the vertical direction (direction perpendicular to the top surface of the substrate, z-direction). The first and second inorganic encapsulation layers 310, 330 and the first and third lower layers 701, 703 may be formed through a process such as chemical vapor deposition, and the second and fourth lower layers 702, 704 Can be formed through a process such as sputtering.

The first and second inorganic encapsulation layers 310 and 330 and the first and third lower layers 701 and 703 may entirely cover the inner surface of the third groove G3. On the other hand, the second and fourth lower layers 702 and 704 may have relatively lower step coverage than the inorganic insulating layer depending on process conditions, etc. In this case, as shown in FIG. 24, the second and fourth lower layers 702 and 704 may be discontinuous or formed very thin around the protruding tip.

FIG. 25 is a plan view schematically showing a portion of a display panel according to another embodiment of the present invention, and FIG. 26 is a cross-sectional view taken along line XXVI-XXVI' of FIG. 25. First to third grooves G1, G2, and G3 surrounding the opening area OA may be located in the first non-display area NDA1 of FIG. 25, the specific configuration of which is as described above, and the display Since the structure of the area (DA) is the same, the following will mainly explain the differences.

Referring to FIGS. 25 and 26 , the second non-display area NDA2 may be provided with at least one outer groove. In this regard, first and second outer grooves OG1 and OG2 are shown in FIGS. 25 and 26 . The first and second outer grooves OG1 and OG2 may at least partially surround the display area DA in the second non-display area NDA2.

Referring to the second non-display area NDA2 of FIG. 26, among the insulating layers formed on the substrate 100, the insulating layer(s) containing an organic material may include valley holes. For example, the organic insulating layer 209 and the pixel defining layer 211 may include first and second valley holes 209VH and 211VH, respectively. In some embodiments, the insulating layer containing an inorganic material under the organic insulating layer 209 may also have valley holes as shown in FIG. 26. As described above, organic matter can become a moisture permeable path. Since the display panel has a valley structure (VY) including the first and second valley holes (209VH, 211VH), the display panel is provided in a direction parallel to the upper surface of the substrate 100 ( Moisture penetrating in the x direction) cannot move toward the display area (DA).

The second non-display area NDA2 may be provided with a partition wall 1500, and the partition wall 1500 is located inside the first outer groove OG1, that is, closer to the display area DA than the first outer groove OG1. It can be placed like this. The partition 1500 may surround the display area DA. Due to the partition wall 1500, the organic encapsulation layer 320 may not extend toward the first and second outer grooves OG1 and OG2. Alternatively, in the process of forming the organic encapsulation layer 320, the organic material 1320A may be present in the first outer groove OG1, but the organic material 1320A in the first outer groove OG1 and the organic encapsulation layer 320 The ends may be separated with a partition wall 1500 therebetween.

The first and second inorganic encapsulation layers 310 and 330 extend to the outer end 100OE of the substrate 100 to cover the second non-display area NDA2, respectively. The first and second inorganic encapsulation layers 310 and 330 may contact each other on the first and second outer grooves OG1 and OG2.

A barrier layer 1700 may be provided on the second inorganic encapsulation layer 330. The barrier layer 1700 may be formed in the same process as the lower barrier layer 700 described above and may have the same stacked structure.

The barrier layer 1700 may cover at least one outer groove, for example, the first outer groove (OG1), and the laminated structure centered on the first outer groove (OG1) has the structure described above with reference to FIG. 16. Since they are substantially the same, duplicate descriptions are omitted. In another embodiment, the barrier layer 1700 may cover both the first and second outer grooves OG1 and OG2, and the end of the barrier layer 1700 is the same as the outer end 100OE of the substrate 100. It can be located on board.

As such, the present invention has been described with reference to an embodiment shown in the drawings, but this is merely an example, and those skilled in the art will understand that various modifications and variations of the embodiment are possible therefrom. Therefore, the true scope of technical protection of the present invention should be determined by the technical spirit of the attached patent claims.

100: substrate
101: first base layer
102: First inorganic layer
103: second base layer
104: Second inorganic layer
200: Display element layer
300: Thin film encapsulation layer
310: First inorganic encapsulation layer
320: Organic bag layer
330: Second inorganic encapsulation layer
400: Input detection layer
610: Flattening layer
620: barrier layer
700: Lower barrier layer/barrier layer

Claims (20)

A substrate having an opening area and a display area surrounding the opening area;
a plurality of display elements located in the display area;
a thin film encapsulation layer that covers the display elements and includes an organic encapsulation layer and an inorganic encapsulation layer on the organic encapsulation layer;
a first groove and a second groove located between the opening area and the display area, each having an undercut structure;
a planarization layer disposed on the inorganic encapsulation layer extending between the opening area and the display area, covering at least one of the first groove and the second groove, and including an organic insulating material; and
a lower barrier layer disposed between the inorganic encapsulation layer and the planarization layer, overlapping the at least one groove and containing an inorganic material;
A display panel containing. According to paragraph 1,
The substrate includes a first base layer, a first inorganic layer, a second base layer, and a second inorganic layer sequentially stacked,
A bottom surface of each of the first groove and the second groove is a lower surface of the second base layer or a virtual surface located between the upper and lower surfaces of the second base layer. According to paragraph 1,
The display panel wherein the thin film encapsulation layer includes a first inorganic encapsulation layer, the organic encapsulation layer on the first inorganic encapsulation layer, and the inorganic encapsulation layer on the organic encapsulation layer. According to paragraph 3,
The display panel wherein the first inorganic encapsulation layer covers inner surfaces of each of the first groove and the second groove. According to clause 3 or 4,
The organic encapsulation layer covers the first groove and fills the first groove. According to paragraph 3,
The display panel wherein the lower barrier layer is located on the inorganic encapsulation layer and directly contacts the upper surface of the inorganic encapsulation layer. According to paragraph 1,
The first groove is relatively adjacent to the display area and the second groove is disposed relatively far from the display area,
The display panel wherein the lower barrier layer covers the second groove. In clause 7,
The display panel further includes a third groove disposed between the opening area and the second groove, and the lower barrier layer covers the second and third grooves. According to paragraph 1,
The second groove includes a pair of tips extending toward the center of the second groove,
A display panel further comprising an organic material located immediately below the pair of tips. According to paragraph 1,
A display panel further comprising an input sensing layer disposed on the display elements. According to clause 10,
The display panel wherein the lower barrier layer includes the same material as the inorganic material included in the input sensing layer. A substrate having an opening;
display elements located in a display area at least partially surrounding the opening;
a thin film encapsulation layer located on the display elements and including a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer;
an input sensing layer located on the display elements;
a plurality of grooves located in a groove area between the opening and the display area;
a barrier layer covering at least one groove among the plurality of grooves and containing an inorganic material;
A display panel comprising: According to clause 12,
It further includes a planarization layer located in the groove area,
The display panel wherein the planarization layer is disposed above the second inorganic encapsulation layer and the organic encapsulation layer is disposed below the second inorganic encapsulation layer. According to clause 13,
The input sensing layer includes multiple layers,
At least one of the barrier layer and the planarization layer includes the same material as at least one of the layers of the input sensing layer. According to clause 14,
The display panel includes a multilayer film including an organic material layer and at least one inorganic material layer disposed on the organic material layer,
A display panel, wherein the plurality of grooves are concavely formed in a thickness direction of the multilayer film. According to clause 15,
The substrate includes a first base layer, a first inorganic layer, a second base layer, and a second inorganic layer sequentially stacked, wherein the organic material layer includes the second base layer and the at least one inorganic layer includes the A display panel comprising a second inorganic layer. According to clause 16,
The at least one inorganic layer has a first hole corresponding to each of the plurality of grooves,
The organic layer includes a hole or recess corresponding to the first hole,
A side of the at least one inorganic layer defining the first hole protrudes more toward the center of the first hole than a side of the organic layer defining the hole or the recess. According to clause 12,
The plurality of grooves include a first groove adjacent to the display area and a second groove closer to the opening than the first groove,
The organic encapsulation layer covers the first groove and fills the first groove. According to clause 18,
A display panel comprising an organic material present in the second groove, wherein the organic material includes the same material as the organic encapsulation layer. According to clause 19,
The display panel wherein the second groove is covered with the barrier layer.