KR102616122B1 - Light emitting display apparatus - Google Patents

Abstract

An object of the present invention is to provide a light emitting display device in which the driving voltage supplied to the light emitting element is used to sense the characteristics of the driving transistor.

Description

Light emitting display device {LIGHT EMITTING DISPLAY APPARATUS}

The present invention relates to a light emitting display device using an internal compensation method.

When a light emitting display panel is used for a long time, the driving transistor that supplies current to the light emitting element may deteriorate, and when the driving transistor deteriorates, image quality deteriorates.

In order to compensate for the deterioration of the driving transistor as described above, a pixel driving circuit for controlling the light emitting element is provided with a plurality of transistors in addition to the driving transistor.

In particular, in a pixel driving circuit in which a plurality of transistors are provided for internal compensation, an operation of sensing the threshold voltage of the driving transistor must be performed.

However, as light emitting display devices develop into higher resolutions, the time that can be allocated to the sensing is gradually decreasing, and accordingly, the sensing performance of the threshold voltage for internal compensation is reduced.

The purpose of the present invention proposed to solve the above-described problems is to provide a light-emitting display device in which the driving voltage supplied to the light-emitting element is used to sense the characteristics of the driving transistor.

A light-emitting display device according to the present invention for achieving the above-described technical problem includes pixels including a light-emitting element that outputs light and a pixel driving circuit that drives the light-emitting element, and signal lines connected to the pixel driving circuit. do. The threshold voltage of the driving transistor provided in the pixel driving circuit and controlling the amount of current supplied to the light emitting device is sensed by the first driving voltage supplied to the driving transistor.

According to the present invention, the driving voltage that is constantly supplied to the light emitting device can be used to sense the threshold voltage of the driving transistor, and accordingly, the threshold voltage of the driving transistor can be sensed for a period of two or more horizontal periods. Accordingly, the time that can be allocated to the sensing can be increased from the conventional one horizontal period, and accordingly, the sensing performance of the threshold voltage for internal compensation can be improved.

1 is an exemplary diagram showing the configuration of a light-emitting display device according to the present invention.
Figure 2 is an exemplary diagram showing the configuration of a pixel applied to a light-emitting display device according to the present invention.
Figure 3 is an exemplary diagram showing the configuration of a gate driver applied to a light emitting display device according to the present invention.
Figure 4 is an exemplary diagram showing the configuration of a control unit applied to the light emitting display device according to the present invention.
Figure 5 is an example diagram showing waveforms of signals applied to a light-emitting display device according to the present invention.
6 to 10 are exemplary views showing how the light emitting display device according to the present invention is driven.

The advantages and features of the present invention and methods for achieving them will become clear by referring to the embodiments described in detail below along with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and will be implemented in various different forms. These embodiments only serve to ensure that the disclosure of the present invention is complete, and those skilled in the art It is provided to fully inform the person of the scope of the invention, and the present invention is only defined by the scope of the claims.

In this specification, it should be noted that when adding reference numbers to components in each drawing, the same components are given the same number as much as possible even if they are shown in different drawings.

The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining embodiments of the present invention are illustrative, and the present invention is not limited to the matters shown. Like reference numerals refer to like elements throughout the specification. Additionally, in describing the present invention, if it is determined that a detailed description of related known technologies may unnecessarily obscure the gist of the present invention, the detailed description will be omitted. When 'includes', 'has', 'consists of', etc. mentioned in this specification are used, other parts may be added unless 'only' is used. When a component is expressed in the singular, the plural is included unless specifically stated otherwise.

When interpreting a component, it is interpreted to include the margin of error even if there is no separate explicit description.

In the case of a description of a positional relationship, for example, if the positional relationship of two parts is described as 'on top', 'on the top', 'on the bottom', 'next to', etc., 'immediately' Alternatively, there may be one or more other parts placed between the two parts, unless 'directly' is used.

In the case of a description of a temporal relationship, for example, if a temporal relationship is described as 'after', 'successfully after', 'after', 'before', etc., 'immediately' or 'directly' Unless used, non-consecutive cases may also be included.

The term ‘at least one’ should be understood to include all possible combinations from one or more related items. For example, 'at least one of the first item, the second item and the third item' means each of the first item, the second item or the third item, as well as two of the first item, the second item and the third item. It means a combination of all items that can be presented from more than one.

Although first, second, etc. are used to describe various components, these components are not limited by these terms. These terms are merely used to distinguish one component from another. Accordingly, the first component mentioned below may also be the second component within the technical spirit of the present invention.

Each feature of the various embodiments of the present invention can be partially or fully combined or combined with each other, various technical interconnections and operations are possible, and each embodiment can be implemented independently of each other or together in a related relationship. It may be possible.

Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings.

Figure 1 is an exemplary diagram showing the configuration of a light-emitting display device according to the present invention, Figure 2 is an exemplary diagram showing the configuration of a pixel applied to the light-emitting display device according to the present invention, and Figure 3 is an exemplary diagram showing the configuration of a light-emitting display device according to the present invention. This is an exemplary diagram showing the configuration of a gate driver applied to, and Figure 4 is an exemplary diagram showing the configuration of a control unit applied to the light emitting display device according to the present invention. Although FIG. 2 shows a pixel 110 composed of P-type transistors, the light emitting display device according to the present invention is not limited to P-type transistors. Accordingly, the pixel 110 shown in FIG. 2 may be composed of N-type transistors, and in this case, the connection structure between the transistors may be changed. In addition, Figure 2 shows the nth pixel driving circuit (PDC(n)) and light emitting element (ED) provided in the nth pixel (P(n)) among the pixels 110 applied to the present invention.

As shown in FIGS. 1 and 2, the light emitting display device according to the present invention includes a pixel (ED) including a light emitting element (ED) that outputs light and a pixel driving circuit (PDC) that drives the light emitting element (ED). 110), supply data voltages (Vdata) to signal lines connected to the pixel driving circuit (PDC) and data lines (DL1 to DLd) connected to the pixels 110, and the pixel 110 ) and a driver that supplies scan signals to scan lines (G) connected to the scan lines (G). G shown in Figure 1 represents one of the scan lines. The signal lines include the data lines (DL1 to DLd) and the scan lines (G).

The driving unit includes a data driver 300 that supplies data voltages (Vdata) to the pixel driving circuits (PDCs) provided in the pixels 110 through the data lines (DL1 to DLd), and the scan. A gate driver 200 that supplies scan signals (SCAN) to lines (G) and an emission signal (EM) to an emission line (EL), the data driver 300, and the gate driver 200 It includes a control unit 400 that controls the operation of. Additionally, the light emitting display device includes a power supply unit that supplies power required for the components.

In the present invention, an n-th pixel driving circuit (PDC(n)) that drives a light-emitting device (ED) provided in the n-th pixel (P(n)) as shown in FIG. 2 among the pixels 110. uses three scan signals (SCAN(n-2), SCAN(n), and SCAN(n+2)).

Below, the above components are described sequentially.

First, the pixels 110 and the signal lines are provided on the light emitting display panel 100 that constitutes the light emitting display device.

As shown in FIGS. 1 and 2, the light emitting display panel 100 includes the pixels 110, the data lines DL1 to Dld, the scan lines G1, G2, and G3, and initialization. Initialization lines (IL) to which a voltage (Vinit) is supplied, the emission lines (EL), first driving voltage lines (PLA), and second driving voltage lines (PLB) are provided.

The scan lines G1, G2, and G3 may be formed along a first direction of the light emitting display panel 100, for example, the horizontal direction.

Scan signals are supplied from the gate driver 200 to the pixel driving circuit (PDC) through the scan lines (G1, G2, and G3).

In the nth pixel (P(n)), an n-2th scan signal (SCAN(n-2)) is supplied to the first scan line (G1) among the scan lines (G1, G2, G3). , the nth scan signal (SCAN(n)) is supplied to the second scan line (G2), and the n+2th scan signal (SCAN(n+2)) is supplied to the third scan line (G3). .

The data lines DL include the first scan line G1, the second scan line G2, the third scan line G3, the initialization line IL, and the emission line EL. They are formed side by side so as to intersect at regular intervals along the second direction, for example, the vertical direction, of the organic light emitting display panel 100. A data voltage (Vdata) is supplied to the data lines (DL).

The first driving voltage lines (PLA) are formed parallel to the data lines (DL) along the second direction and are spaced apart from the data lines (DL) at regular intervals. The first driving voltage lines (PLA) are connected to the power supply unit and supply the first driving voltage (VDD) supplied from the power supply unit to the pixels 110.

The second driving voltage lines (PLB) supply the second driving voltages (VSS) supplied from the power supply to the pixels 110.

The emission lines EL extend in the first direction and supply an emission signal EM that controls the emission timing of the light emitting device ED to the pixels 110.

The initialization lines IL extend in the first direction and supply initialization voltages Vinit to the pixels 110 . The initialization voltage Vinit may be supplied to the initialization lines IL from the power supply or the gate driver 200.

Each of the pixels 110 is provided with the light emitting element (ED) and the pixel driving circuit (PDC).

The pixel driving circuit (PDC) includes a driving transistor (Tdr) and capacitors (C1, C2) that control the amount of current supplied to the light emitting element (ED). In addition to the driving transistor (Tdr) and the capacitors (C1 and C2), the pixel driving circuit (PDC) may include first to fifth transistors (T1 to T5), as shown in FIG. 2. .

That is, the pixel driving circuit (PDC) includes the driving transistor (Tdr) consisting of a first terminal, a second terminal, and a gate, the gate of which is connected to the third scan line (G3), and the first terminal of which is connected to the data line. A first transistor (T1) connected, the first terminal of which is connected to the second terminal of the first transistor, and a first capacitor (C1) whose second terminal is connected to the gate of the driving transistor (Tdr), the gate of which is connected to the second terminal of the first transistor (Tdr). 2 A second transistor (T2) connected to the scan line (G2), the first terminal of which is connected to the second terminal of the first capacitor (C1), and the second terminal of which is connected to the second terminal of the driving transistor (Tdr) ), a third transistor ( T3), a fourth transistor (T4) whose first terminal is connected to the second terminal of the driving transistor (Tdr), whose gate is connected to the emission line (EL), and whose second terminal is connected to the light emitting element (ED) ), a fifth transistor ( T5) and a second capacitor C2, the first terminal of which is connected to the initialization line IL and the second terminal of which is connected to the second terminal of the first transistor T1.

Here, the third transistor T3 is a 3-1 transistor (T3a) whose first terminal is connected to the initialization line (IL) and whose gate is connected to the first scan line (G1), and the 3-1 It includes a 3-2 transistor T3b that shares a semiconductor layer with the transistor T3a, has a gate connected to the first scan line G1, and a second terminal connected to the first terminal of the second transistor.

The first terminal of the third transistor (T3) refers to the first terminal of the 3-1 transistor (T3a), and the second terminal of the third transistor (T3) refers to the first terminal of the 3-2 transistor (T3b). refers to the second terminal of

In this case, the second terminal of the second capacitor C2 is the semiconductor layer shared by the 3-1 transistor T3a and the 3-2 transistor T3b and the second terminal of the first transistor T1. Connected to the second terminal. Additionally, the second terminal of the second capacitor C2 is also connected to the first terminal of the first transistor C1.

Accordingly, the initialization voltage Vinit charged in the second capacitor C2 is supplied to the first and second terminals of the first capacitor C1 through the third transistor T3.

In the following description, the first terminal of the first capacitor C1 is referred to as a first node (N1), and the gate of the driving transistor (Tdr) is referred to as a second node (N2).

The first terminal of the driving transistor (Tdr) is connected to the first driving voltage line (PLA) to which the first driving voltage (VDD) is supplied, and the second terminal is connected to the second terminal of the second transistor (T2). And it is connected to the first terminal of the fourth transistor (T4).

The first terminal of the light emitting device (ED) is connected to the second terminal of the fourth transistor (T4) and the second terminal of the fifth transistor (T5), and the second terminal is connected to the second driving voltage (VSS). ) is connected to the second driving voltage line (PLB) supplied.

The second transistor T2 may be formed as a double gate structure as shown in FIG. 2 . That is, the second transistor T2 includes a first terminal connected to the second terminal of the first capacitor C1 and a gate connected to the second scan line G2, as shown in FIG. 2. A 2-1 transistor (T2a) shares a semiconductor layer with the 2-1 transistor (T2a), has a gate connected to the second scan line (G1), and has a second terminal of the driving transistor (Tdr). It may include a 2-2 transistor (T2b) connected to terminal 2.

The first terminal of the first capacitor C1 is connected to the first terminal of the first transistor T1 and the second terminal of the second capacitor C2. The second terminal of the first capacitor C1 is connected to the gate of the driving transistor Tdr and the first terminal of the second transistor T2.

The first capacitor C1 functions as a storage capacitor.

That is, the first capacitor C1 can charge the data voltage Vdata supplied through the data line DL and the threshold voltage of the driving transistor Tdr.

The second capacitor C2 functions to prevent the first terminal of the first capacitor C1 from floating. That is, the initialization voltage Vinit is supplied to the first terminal of the first capacitor C2. Accordingly, even if the data voltage Vdata is not supplied through the data line DL, the second terminal of the second capacitor C2 can be maintained at a constant voltage. Therefore, even if the data voltage (Vdata) is not supplied through the data line (DL), the first and second terminals of the first capacitor (C1) connected to the second terminal of the second capacitor (C2) are also It can be maintained at a constant voltage.

The driving transistor (Tdr) is turned on by the data voltage (Vdata) stored in the first transistor (C1), and the light emitting element (ED) is turned on from the first driving voltage line (PLA) according to the data voltage (Vdata). Controls the amount of current flowing through.

The first driving voltage (VDD) is supplied to the first driving voltage line (PLA). The first driving voltage (VDD) is a direct current voltage. That is, the first driving voltage (VDD) is continuously supplied to the pixel driving circuit (PDC) while the light emitting display device is driven.

In the present invention, the first driving voltage (VDD) is used to sense the threshold voltage of the driving transistor (Tdr).

As described above, since the first driving voltage (VDD) is continuously supplied to the pixel driving circuit (PDC) while the light emitting display device is driven, in the present invention, the threshold of the driving transistor (Tdr) The voltage sensing period may be set regardless of the timing at which the data voltage Vdata is supplied.

For example, when the period during which the data voltage Vdata is supplied is 1 horizontal period, the period for sensing the threshold voltage of the driving transistor Tdr may be 2 horizontal periods or more. In the following description, an example in which the period for sensing the threshold voltage of the driving transistor (Tdr) is 2 horizontal periods will be described as an example of the present invention.

The first transistor (T1) is turned on or off by the third scan signal (SCAN(n+2)) supplied through the third scan line (G3) and supplied through the data line (DL). It performs a function of supplying or blocking the data voltage (Vdata) to the first capacitor (C1).

The second transistor is turned on by the second scan signal (SCAN(n)) supplied through the second scan line (G2), and at the timing of sensing the threshold voltage of the driving transistor (Tdr), the first It performs the function of supplying the driving voltage (VDD) to the second terminal of the first capacitor (C1).

The third transistor T3 functions to supply the initialization voltage Vinit to the first and second terminals of the first capacitor C1.

The fourth transistor T4 is turned on by the emission signal EM transmitted through the emission line EL to control the emission timing of the light emitting device ED.

The fifth transistor T5 supplies the initialization voltage Vinit to the light emitting diode ED, thereby initializing the light emitting diode ED.

The first to fifth transistors (T1 to T5), the first capacitor (C1), and the second capacitor (C2) perform a function of compensating for changes in the threshold voltage of the driving transistor (Tdr).

A method of compensating for a change in the threshold voltage of the driving transistor (Tdr) by the first to fifth transistors (T1 to T5), the first capacitor (C1), and the second capacitor (C2) is described below. This is explained in detail with reference to Figures 1 to 10.

The light emitting element (ED) emits light by the current (I) supplied through the driving transistor (Tdr), and emits light with a luminance corresponding to the current (I).

The light-emitting device ED includes a first electrode, a light-emitting layer provided on the first electrode, and a second electrode provided on the light-emitting layer. The light-emitting layer may include any one of a blue light-emitting part, a green light-emitting part, and a red light-emitting part for emitting light of a color corresponding to the color set in the pixel 110.

The light-emitting layer may include any one of an organic light-emitting layer, an inorganic light-emitting layer, and a quantum dot light-emitting layer, or may include a stacked structure or a mixed structure of the organic light-emitting layer (or the inorganic light-emitting layer) and the quantum dot light-emitting layer.

Second, the gate driver 200 uses the gate control signals (GCS) transmitted from the control unit 400 to supply a gate on signal to the first to third scan lines (G1, G2, and G3). do.

The gate control signals (GCS) include at least two gate clocks (CLK).

As shown in FIG. 3, the gate driver 200 includes a plurality of stages (ST1 to STg). Each of the stages (ST1 to STg) can output one scan signal (SCAN) and one emission signal (EM).

In the example described above with reference to FIG. 2, three scan signal lines G1, G2, and G3 connected to three stages are connected to the pixel 110. In the above example, the n-2th scan signal (Scan(n-2)) is supplied to the first scan signal line (G1), and the nth scan signal (Scan(n-2)) is supplied to the second scan signal line (G2). (n)) is supplied, and the n+2th scan signal (Scan(n+2)) is supplied to the third scan signal line (G3).

That is, when n is 3, the first scan signal line (G1) is connected to the first stage (ST1). In this case, the second scan signal line (G2) is connected to the third stage (ST3). Additionally, the first scan signal line (G3) is connected to the fifth stage.

In the above example, one emission line EL is connected to the pixel 110. Accordingly, the nth emission signal EM(n) is supplied through the nth emission line, and the nth emission line is connected to the nth stage.

The scan signal (SCAN) output from one stage is supplied as a scan start signal to another stage. When the scan start signal is supplied, the other stage outputs another scan signal (SCAN).

The emission signal (EM) output from one stage is supplied as an emission start signal to another stage. When the emission start signal is supplied, the other stage outputs another emission signal (EM).

The gate on signal refers to a signal that can turn on each of the transistors connected to the first to third scan lines (G1, G2, and G3). A signal that can turn off each of the transistors is called a gate-off signal. The gate on signal and the gate off signal are collectively referred to as a scan signal (Scan).

The scan signal supplied to the first scan line (G1) is called a first scan signal (Scan(n-2)), and the scan signal supplied to the second scan line (G2) is called a second scan signal (Scan(n-2)). n)), and the scan signal supplied to the third scan line (G3) is called the third scan signal (Scan(n+2)).

The gate driver 200 supplies the emission signals (EM) to the emission lines (EL). The emission signal EM also includes an emission on signal capable of turning on the fourth transistor T4 and an emission off signal capable of turning off the fourth transistor T4. The emission on signal and the emission off signal are collectively referred to as an emission signal (EM).

The gate driver 200 is formed independently from the organic light emitting display panel 100 and is connected to the organic light emitting display panel through a tape carrier package (TCP), chip-on-film (COF), or flexible printed circuit board (FPCB). It can be connected to (100). However, the gate driver 200 is directly installed on the outside of the organic light emitting display panel 100 through the manufacturing process of the pixel driver circuits (PDCs) using the gate in panel (GIP) method. may be formed.

Third, the power supply unit supplies power to the gate driver 200, the data driver, and the control unit 400. In particular, the power supply unit supplies the initialization voltage (Vinit) to the initialization line (IL) and the first driving voltage (VDD) to the first driving voltage line (PLA).

Fourth, the control unit 400 uses a timing synchronization signal (TSS) input from an external system to control the driving of the gate driver 200 and the gate control signal (GCS) to drive the data driver 300. Generates a data control signal (DCS) to control each. In addition, the control unit 400 converts the input image data (Ri, Gi, Bi) input from the external system into image data (Data), and transmits the image data (Data) to the data driver 300. send.

In order to perform the above-described function, the control unit 400 uses the timing synchronization signal (TSS) transmitted from the external system, as shown in FIG. 4, to input image data transmitted from the external system. A data alignment unit 430 for rearranging the images (Ri, Gi, Bi) and supplying the rearranged image data to the data driver 300, and the gate control signal using the timing synchronization signal (TSS). (GCS) and a control signal generator 420 for generating the data control signal (DCS), the timing synchronization signal (TSS) and the input image data (Ri, Gi, Bi) transmitted from the external system. An input unit 410 that distributes data to the data sorting unit 430 and the control signal generating unit 420, and the image data generated by the data sorting unit 430 and the control signal generating part 420. ) may include an output unit 440 for outputting the control signals (DCS, GCS) generated in the data driver 300 or the gate driver 200.

A storage unit 450 that stores information necessary for driving the control unit 400 may be included in the control unit 400, or may be provided in the light emitting display device independently of the control unit 400.

Fifth, the data driver 300 converts the image data transmitted from the control unit 400 into data voltages and then supplies the data voltages to the data lines DL1 to DLd.

FIG. 5 is an exemplary diagram showing waveforms of signals applied to a light emitting display device according to the present invention, and FIGS. 6 to 10 are exemplary diagrams showing how the light emitting display device according to the present invention is driven.

First, in the first period (A), as shown in FIGS. 5 and 6, the low-level first scan signal (SCAN(n-2)) is transmitted to the fifth transistor (T5) and the third transistor (T3). ), a high-level second scan signal (SCAN(n)) is supplied to the second transistor (T2), and a high-level third scan signal (SCAN(n+2)) is supplied to the first transistor (T2). (T1), and a high-level emission signal (EM) is supplied to the fourth transistor (T4).

Accordingly, as shown in FIG. 6, the 3-1 transistor T3a, the 3-2 transistor T3b, and the fifth transistor constituting the third transistor T3 are turned on, and the The first transistor (T1), the second transistor (T2), and the fourth transistor (T4) are all turned off.

In this case, the first node (N1) connected to the first terminal of the first capacitor (C1) and the second node (N2) connected to the gate of the driving transistor (Tdr) are connected to the initialization voltage. Initialized by (Vinit).

That is, the initialization voltage Vinit is supplied to the first terminal N1 and the second terminal N2 through the third transistor T3, and accordingly, the voltage of the first node N1 ( Hereinafter, simply referred to as the first node voltage (Vn1)) and the voltage of the second node (N2) (hereinafter, simply as the second node voltage (Vn2)) are each, as described in [Equation 1], the initialization voltage It becomes (Vinit).

Additionally, since the initialization voltage Vinit is transmitted to the light emitting device ED through the fifth transistor T5, the light emitting device ED is also initialized with the initialization voltage Vinit.

Next, in the second period (B), as shown in FIGS. 5 and 7, the high-level first scan signal (SCAN(n-2)) is transmitted to the third transistor (T3) and the fifth transistor (T5). ), the low-level second scan signal (SCAN(n)) is supplied to the second transistor (T2), and the high-level third scan signal (SCAN(n+2)) is supplied to the first transistor (T2). (T1), and a high-level emission signal (EM) is supplied to the fourth transistor (T4).

Accordingly, as shown in FIG. 7, the second transistor (T2) and the driving transistor (Tdr) are turned on, and the first transistor (T1), the third transistor (T3), and the fourth transistor ( T4) and the fifth transistor T5 are both turned off.

In this case, the first driving voltage (VDD) and the threshold voltage (Vth) of the driving transistor (Tdr) are supplied to the second node (N2) through the driving transistor (Tdr) and the second transistor (T2). do.

Accordingly, the first driving voltage (VDD) and the threshold voltage (Vth) of the driving transistor (Tdr) are supplied to the second node (N2). Accordingly, the voltage of the second terminal of the first capacitor C1, that is, the second node voltage Vn2, is the first driving voltage VDD and the driving voltage, as described in [Equation 2]. It becomes the sum voltage of the threshold voltage (Vth) of the transistor (Tdr). That is, the first driving voltage (VDD) and the threshold voltage (Vth) are charged in the second node (N2). In this case, the first terminal voltage (Vn1) is maintained at the initialization voltage (Vinit).

Next, in the third period (C), as shown in FIGS. 5 and 8, a high-level first scan signal (SCAN(n-2)) is supplied to the third transistor and the fifth transistor (T5). A high-level second scan signal (SCAN(n)) is supplied to the second transistor (T2), and a low-level third scan signal (SCAN(n+2)) is supplied to the first transistor (T1). and a high-level emission signal (EM) is supplied to the fourth transistor (T4).

Accordingly, as shown in FIG. 8, the first transistor T1 is turned on, and the driving transistor Tdr and the second transistors T2 to T5 are all turned on. It turns off.

In this case, the data voltage (Vdata) is supplied to the first node (N1) through the data line (DL). Accordingly, the first node voltage (Vn1) becomes the difference voltage between the data voltage (Vdata) and the initialization voltage (Vinit), as described in [Equation 3].

That is, the first node voltage Vn1 changes from the initialization voltage Vinit in the second period B to the difference voltage between the data voltage Vdata and the initialization voltage Vinit.

In this case, the second node voltage (Vn2) is initialized at the sum of the first driving voltage (VDD), the threshold voltage (Vth), and the data voltage (Vdata), as described in [Equation 3]. It is changed to the voltage minus the voltage (Vinit).

That is, in the second period (B), the second node voltage (Vn2) is the sum of the first driving voltage (VDD) and the threshold voltage (Vth). When the data voltage (Vdata) is input to the first node (N1) in the third period (C), the voltage of the first node (N1) is changed to the data voltage (Vdata). In this case, the second node (N2) changes by being coupled to a voltage change of the first terminal of the capacitor (C1), that is, the first node (N1). Therefore, as described above, the second node voltage (Vn2) is the initialization voltage (Vinit) from the sum of the first driving voltage (VDD), the threshold voltage (Vth), and the data voltage (Vdata). It changes to the voltage minus .

Accordingly, the second node (N2) can be continuously charged with the threshold voltage (Vth) of the driving transistor (Tdr).

In this case, the third period (C) may be a period during which the data voltage (Vdata) is supplied, that is, a second horizontal period (2H) that is twice the first horizontal period (1H).

The data voltage (Vdata) may be supplied to the data line (DL) during the first horizontal period of the third period (C), and may be supplied to the data line (DL) during the second horizontal period of the third period (C). It can also be supplied as (DL).

That is, the threshold voltage (Vth) charged in the second node (N2) by the first driving voltage (VDD) in the second period continues to be maintained in the third period regardless of the data voltage (Vdata). It may be charged to the second node (N2).

To elaborate, in the present invention, the threshold voltage (Vth) of the driving transistor (Tdr) can be charged in the first capacitor (C1) for two horizontal periods. Accordingly, the threshold voltage (Vth) of the driving transistor (Tdr) can be sufficiently charged in the first capacitor (C1), and therefore, the compensation efficiency of the threshold voltage (Vth) can be increased.

Next, in the fourth period (D), as shown in FIGS. 5 and 9, a high-level first scan signal (SCAN(n-2)) is supplied to the third transistor and the fifth transistor (T5). A high-level second scan signal (SCAN(n)) is supplied to the second transistor (T2), and a high-level third scan signal (SCAN(n+2)) is supplied to the first transistor (T1). and a high-level emission signal (EM) is supplied to the fourth transistor (T4).

Accordingly, as shown in FIG. 9, the first to fifth transistors T1 to T5 are turned off.

In this case, the second node voltage (Vn2) is maintained at the second node voltage (Vn2) of the third period (C), that is, the voltage described in [Equation 3].

That is, in the fourth period (D), the second node voltage (Vn2) is the initialization voltage ( It is maintained at the voltage minus Vinit).

Finally, in the fifth period (E), as shown in FIGS. 5 and 10, a high-level first scan signal (SCAN(n-2)) is supplied to the third transistor and the fifth transistor (T5). A high-level second scan signal (SCAN(n)) is supplied to the second transistor (T2), and a high-level third scan signal (SCAN(n+2)) is supplied to the first transistor (T1). and a low-level emission signal (EM) is supplied to the fourth transistor (T4).

Accordingly, as shown in FIG. 10, the first transistor (T1), the second transistor (T2), the third transistor (T3), and the fifth transistor (T5) are turned off, and the fourth transistor (T5) is turned off. Transistor (T4) is turned on.

In addition, the gate of the driving transistor (Tdr) has a voltage applied to the second node (N2) in the third period (C), that is, the second node voltage (Vn2) described in [Equation 3] ( = VDD + Vth + Vdata - Vinit) is continuously supplied from the third period (C). Accordingly, the driving transistor (Tdr) is also turned on.

Accordingly, the current (I) can be supplied to the light-emitting device (ED) through the driving transistor (Tdr) and the fourth transistor (T4), and the light-emitting device (ED) corresponds to the current (I) Light of sufficient brightness can be output.

In this case, the voltage applied to the gate of the driving transistor (Tdr) is the second node voltage (Vn2), that is, [VDD + Vth + Vdata - Vinit], and the voltage applied to the source of the driving transistor (Tdr) is The voltage is the first driving voltage (VDD). Therefore, the current (I) passing through the driving transistor (Tdr) is generated at the difference voltage (Vgs = [VDD + Vth + Vdata - Vinit] - VDD) between the gate and source of the driving transistor (Tdr). ) is proportional to the voltage minus the threshold voltage (Vth).

Accordingly, the current (I) supplied to the light emitting device (ED) through the driving transistor (Tdr) in the fifth period (E) can be expressed as [Equation 4] below.

That is, the current (I) supplied to the light emitting element (ED) through the driving transistor (Tdr) is determined by the data voltage (Vdata) and the initialization voltage (Vinit), and is the threshold of the driving transistor (Tdr). It is not determined by voltage (Vth). Here, k is a constant that reflects the characteristics of the circuit.

In general, the driving transistor (Tdr) may deteriorate as the organic light emitting display device is used for a long time, and accordingly, the threshold voltage (Vth) of the driving transistor (Tdr) may change.

Additionally, the degree of deterioration of the driving transistor Tdr provided in the pixel 110 formed in the organic light emitting display panel 100 may vary due to various causes.

If the degree of deterioration of the driving transistors (Tdr) varies, the threshold voltages of the driving transistors (Tdr) also change.

When the threshold voltages of the driving transistors (Tdr) are different, even if the same data voltages (Vdata) are supplied to the driving transistors (Tdr), the size of the current supplied to the light emitting elements (ED) through the driving transistors (Tdr) may be different. Accordingly, the light emitting elements (ED) provided in pixels supplied with the same data voltage (Vdata) may output light of different brightness.

In order to solve the problem described above, the present invention is designed so that the current (I) flowing through the driving transistor (Tdr) is not affected by the threshold voltage (Vth) of the driving transistor (Tdr).

That is, in the present invention, by the pixel structure as shown in FIG. 2 and the driving method described with reference to FIGS. 5 to 10, the magnitude of the current (I) passing through the driving transistor (Tdr) is [ As described in Equation 4, it is not affected by the threshold voltage of the driving transistor (Tdr).

Therefore, according to the present invention, even if the driving transistors (Tdr) are deteriorated, a normal current corresponding to the data voltage (Vdata) can be supplied to the light emitting device (ED) from each pixel, and accordingly, the light emitting device (ED) Can output light with brightness proportional to the data voltage (Vdata).

In particular, in the present invention, the threshold voltage (Vth) of the driving transistor (Tdr) may be charged in the first capacitor (C1) for two horizontal periods. Accordingly, the threshold voltage (Vth) of the driving transistor (Tdr) can be accurately sensed, and accordingly, the current (I) flowing into the light emitting device is not affected by the threshold voltage (Vth).

In the above description, it was explained that the threshold voltage (Vth) is charged in the first capacitor (C1) for two horizontal periods. However, in the present invention, the process of sensing the threshold voltage (Vth) is not related to the period during which the data voltage (Vdata) is supplied, but is related to the first driving voltage (VDD). Accordingly, the period for sensing the threshold voltage (Vth) may be longer than two horizontal periods. That is, the period for sensing the threshold voltage (Vth) may be three horizontal periods or more.

Therefore, in the present invention, the period for sensing the threshold voltage (Vth) can be freely set to a period of two horizontal periods or more.

Those skilled in the art to which the present invention pertains will understand that the present invention can be implemented in other specific forms without changing its technical idea or essential features. Therefore, the embodiments described above should be understood in all respects as illustrative and not restrictive. The scope of the present invention is indicated by the claims described below rather than the detailed description above, and all changes or modified forms derived from the meaning and scope of the claims and their equivalent concepts should be construed as being included in the scope of the present invention. do.

100: panel 200: gate driver
300: data driver 400: control unit
G: Scan line PDC: Pixel driving circuit
P(n): nth pixel P(n+1): nth+1 pixel
EM: Emission signal SCAN: Scan signal
IL: Initialization line EL: Emission line
110: pixel

Claims (11)

Pixels including a light-emitting element that outputs light and a pixel driving circuit that drives the light-emitting element; and
Includes signal lines connected to the pixel driving circuit,
The threshold voltage of the driving transistor provided in the pixel driving circuit to control the amount of current supplied to the light emitting element is sensed by the first driving voltage supplied to the driving transistor,
The pixel driving circuit is,
The driving transistor consisting of a first terminal, a second terminal and a gate;
a first transistor whose gate is connected to a third scan line and whose first terminal is connected to a data line;
a first capacitor whose first terminal is connected to a second terminal of the first transistor and whose second terminal is connected to the gate of the driving transistor;
a second transistor whose gate is connected to a second scan line, a first terminal connected to a second terminal of the first capacitor, and a second terminal connected to a second terminal of the driving transistor;
a third transistor whose gate is connected to a first scan line, a first terminal connected to an initialization line, and a second terminal connected to the first terminal of the second transistor;
a fourth transistor whose first terminal is connected to the second terminal of the driving transistor, whose gate is connected to an emission line, and whose second terminal is connected to the light emitting element;
a fifth transistor having a first terminal connected to the initialization line, a gate connected to the first scan line, and a second terminal connected to a second terminal of the fourth transistor; and
a second capacitor having a first terminal connected to the initialization line and a second terminal connected to a second terminal of the first transistor;
The first terminal of the driving transistor is connected to a first driving voltage line to which the first driving voltage is supplied.
The third transistor is,
a 3-1 transistor whose first terminal is connected to the initialization line and whose gate is connected to the first scan line; and
A 3-2 transistor that shares a semiconductor layer with the 3-1 transistor, has a gate connected to the first scan line, and has a second terminal connected to the first terminal of the second transistor,
The second terminal of the second capacitor is connected to the semiconductor layer of the third transistor and the first terminal of the first capacitor,
A light emitting display device in which the first driving voltage is supplied to a second terminal of the first capacitor at the timing of sensing the threshold voltage of the driving transistor. According to claim 1,
A light emitting display device in which a period during which the threshold voltage of the driving transistor is sensed is longer than one horizontal period during which a data voltage is supplied through a data line among the signal lines. delete According to claim 1,
The signal lines are,
Contains three scan lines to which three scan signals are supplied,
A light emitting display device in which a period during which each of the three scan signals is supplied is longer than one horizontal period during which a data voltage is supplied through a data line among the signal lines. delete According to claim 1,
A light emitting display device wherein a second terminal of the second capacitor is connected to a semiconductor layer of the third transistor and a first terminal of the first capacitor. delete According to claim 1,
The initialization voltage charged in the second capacitor is supplied to the first and second terminals of the first capacitor through the third transistor. According to claim 1,
The data voltage is supplied to the data line during one horizontal period,
A light emitting display device wherein each of the first scan signal supplied to the first scan line, the second scan signal supplied to the second scan line, and the third scan signal supplied to the third scan line is supplied for two horizontal periods. According to clause 9,
The data voltage is supplied to the data line during the first or second horizontal period of the two horizontal periods during which the third scan signal is supplied. According to claim 1,
In the first period, the first node corresponding to the first terminal and the second node corresponding to the second terminal of the first capacitor provided between the data line provided in the pixel driving circuit and the driving transistor are connected to an initialization voltage. initialized by
In the second period, the first driving voltage supplied to the driving transistor and the threshold voltage (Vth) of the driving transistor are supplied to the second node through the driving transistor and the second transistor,
In the third period, the voltage of the first node is the difference voltage between the data voltage supplied through the data line and the initialization voltage, and the voltage of the second node is the first driving voltage, the threshold voltage, and the data voltage. It is the voltage obtained by subtracting the initialization voltage from the sum voltage of
In the fourth period, the voltage of the second node is maintained at the voltage of the second node in the third period,
In a fifth period, a current corresponding to the data voltage is supplied to the light emitting element through the driving transistor.

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