KR102591880B1 - Manufacturing method of solar cell - Google Patents

Abstract

A method of manufacturing a solar cell according to an embodiment of the present invention includes forming a photoelectric conversion unit including an amorphous semiconductor layer; forming an electrode connected to the photoelectric conversion unit; and a post-processing step of post-processing the photoelectric conversion unit and the electrode by providing light to the photoelectric conversion unit and the electrode.

Description

Manufacturing method of solar cell {MANUFACTURING METHOD OF SOLAR CELL}

The present invention relates to a method of manufacturing a solar cell, and more specifically, to a method of manufacturing a solar cell including an amorphous semiconductor layer.

Recently, as the depletion of existing energy resources such as oil and coal is expected, interest in alternative energy to replace them is increasing. Among them, solar cells are attracting attention as next-generation cells that convert solar energy into electrical energy.

These solar cells can be manufactured by forming various layers and electrodes according to design. However, solar cell efficiency can be determined depending on the design of these various layers and electrodes. In order to commercialize solar cells, low efficiency must be overcome, so various layers and electrodes are designed to maximize the efficiency of solar cells, and various treatments are performed to maximize the efficiency of solar cells.

Accordingly, there is a need for a solar cell manufacturing method that includes a post-processing process for the solar cell to maximize efficiency depending on the structure of the solar cell. In particular, in solar cells containing an amorphous semiconductor layer, the efficiency of the solar cell may be reduced due to deterioration of the amorphous semiconductor layer at high temperatures or low-temperature processes to prevent this, so a solar cell manufacturing method that can solve this problem is required. .

The present invention seeks to provide a method for manufacturing solar cells that can improve thermal stability and efficiency.

A method of manufacturing a solar cell according to an embodiment of the present invention includes forming a photoelectric conversion unit including an amorphous semiconductor layer; forming an electrode connected to the photoelectric conversion unit; and a post-processing step of post-processing the photoelectric conversion unit and the electrode by providing light to the photoelectric conversion unit and the electrode.

According to this embodiment, light is provided to the solar cell in the post-processing step to reduce the amount of hydrogen contained within the amorphous semiconductor layer and reduce defects at the interface. At this time, this effect can be further improved by providing heat. As a result, deterioration of the amorphous semiconductor layer can be effectively prevented. Additionally, the conductivity of the electrode can be improved. As a result, the efficiency of the solar cell can be improved by improving the density of the solar cell.

1 is a cross-sectional view showing an example of a solar cell to which a solar cell manufacturing method according to an embodiment of the present invention can be applied.
FIG. 2 is a plan view of the second electrode layer of the solar cell shown in FIG. 1.
Figure 3 is a flowchart showing a method of manufacturing a solar cell according to an embodiment of the present invention.
FIGS. 4A to 4J are cross-sectional views showing the manufacturing method of the solar cell shown in FIG. 3.
FIG. 5 is a diagram illustrating the temperature of a solar cell (or semiconductor substrate) measured when only heat is applied and when heat and light are applied together in relation to the post-processing step of the solar cell manufacturing method shown in FIG. 3.
Figure 6 is a flowchart showing a method of manufacturing a solar cell according to another embodiment of the present invention.
Figure 7 is a cross-sectional view showing another example of a solar cell to which the post-processing step of the solar cell manufacturing method according to an embodiment of the present invention can be applied.
Figure 8 is a graph showing the relative densities of a plurality of solar cells manufactured according to Experimental Example 2 of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings. However, it goes without saying that the present invention is not limited to these embodiments and can be modified into various forms.

In the drawings, parts not related to the description are omitted in order to clearly and briefly explain the present invention, and identical or extremely similar parts are denoted by the same drawing reference numerals throughout the specification. In addition, in the drawings, the thickness, area, etc. are enlarged or reduced in order to make the explanation more clear, so the thickness, area, etc. of the present invention are not limited to what is shown in the drawings.

And when a part is said to “include” another part throughout the specification, it does not exclude other parts and may further include other parts, unless specifically stated to the contrary. Additionally, when a part of a layer, membrane, region, plate, etc. is said to be “on” another part, this includes not only cases where it is “directly above” the other part, but also cases where other parts are located in between. When a part of a layer, membrane, region, plate, etc. is said to be "directly on top" of another part, it means that the other part is not located in the middle.

Hereinafter, a method of manufacturing a solar cell according to an embodiment of the present invention will be described in detail with reference to the attached drawings. First, an example of a solar cell to which the solar cell manufacturing method according to an embodiment of the present invention can be applied will be described, and a solar cell manufacturing method including a post-processing step of post-processing the solar cell will be described.

1 is a cross-sectional view showing an example of a solar cell to which a solar cell manufacturing method according to an embodiment of the present invention can be applied.

Referring to FIG. 1, the solar cell 100 according to this embodiment includes a semiconductor substrate 110 including a base region 10, tunneling films 52 and 54 formed on the semiconductor substrate 110, and It includes conductive regions 20 and 30 formed on the tunneling films 52 and 54, and electrodes 42 and 44 connected to the conductive regions 20 and 30. Here, the tunneling films 52 and 54 are formed on the first surface (hereinafter, “front”) of the semiconductor substrate 110 and the second surface (hereinafter, “back”) of the semiconductor substrate 110. ) may include a second tunneling film 54 formed thereon. The conductive regions 20 and 30 include a first conductive region 20 formed on the first tunneling film 52 on the front side of the semiconductor substrate 110 and a second tunneling film 54 on the back side of the semiconductor substrate 110. ) may include a second conductive region 30 formed thereon. And the electrodes 42 and 44 may include a first electrode 42 connected to the first conductive region 20 and a second electrode 44 connected to the second conductive region 30. This will be explained in more detail.

The semiconductor substrate 110 may be made of a crystalline semiconductor. As an example, the semiconductor substrate 110 may be made of a single crystal or polycrystalline semiconductor (eg, single crystal or polycrystalline silicon). In particular, the semiconductor substrate 110 may be composed of a single crystal semiconductor (eg, a single crystal semiconductor wafer, more specifically, a single crystal silicon wafer). In this way, when the semiconductor substrate 110 is composed of a single crystal semiconductor (eg, single crystal silicon), the solar cell 100 forms a single crystal semiconductor solar cell (eg, single crystal silicon solar cell). In this way, the solar cell 100 based on the semiconductor substrate 110 made of a crystalline semiconductor with high crystallinity and few defects can have excellent electrical characteristics.

In this embodiment, a separate doped region is not formed in the semiconductor substrate 110 and the semiconductor substrate 110 may be composed of only the base region 10. In this way, if a separate doped region is not formed in the semiconductor substrate 110, damage to the semiconductor substrate 110 and increase in defects that may occur when forming the doped region are prevented, so that the semiconductor substrate 110 has excellent passivation characteristics. You can have it. As a result, surface recombination occurring on the surface of the semiconductor substrate 110 can be minimized.

In this embodiment, the semiconductor substrate 110 or the base region 10 may be doped with a first or second conductivity type dopant at a low doping concentration to have a first or second conductivity type. At this time, the semiconductor substrate 110 or the base region 10 may have a lower doping concentration, higher resistance, or lower carrier concentration than one of the first and second conductivity type regions 20 and 30 having the same conductivity type. . For example, in this embodiment, the base region 10 may have a second conductivity type.

The front and/or back side of the semiconductor substrate 110 may be textured to have irregularities. As an example, the unevenness may be composed of the (111) surface of the semiconductor substrate 110 and may have a pyramid shape with an irregular size. When irregularities are formed on the front surface of the semiconductor substrate 110 through such texturing and the surface roughness increases, the reflectance of light incident through the front surface of the semiconductor substrate 110 can be lowered. Therefore, the amount of light reaching the pn junction formed by the base region 10 and the first conductive region 20 can be increased, and light loss can be minimized. However, the present invention is not limited to this, and it is also possible that irregularities due to texturing are not formed on the front and back surfaces of the semiconductor substrate 110.

A first tunneling film 52 is formed on the front surface of the semiconductor substrate 110, and a second tunneling film 54 is formed on the rear surface of the semiconductor substrate 110.

The first and second tunneling films 52 and 54 act as a kind of barrier for electrons and holes, preventing minority carriers from passing through, and the first and second tunneling films 52 and 54 After accumulating in the adjacent portion, only majority carriers with energy above a certain level are allowed to pass through the first and second tunneling films 52 and 54, respectively. At this time, majority carriers with energy above a certain level can easily pass through the first and second tunneling films 52 and 54 due to the tunneling effect.

The first or second tunneling films 52 and 54 may include various materials through which carriers can tunnel, for example, nitride, semiconductor, conductive polymer, etc. For example, the first or second tunneling films 52 and 54 may be formed of silicon oxide, silicon nitride, silicon oxynitride, intrinsic amorphous semiconductor (e.g., intrinsic amorphous silicon), or intrinsic polycrystalline semiconductor (e.g., intrinsic polycrystalline silicon). It may include etc. At this time, the first and second tunneling films 52 and 54 may include an intrinsic amorphous semiconductor. As an example, the first and second tunneling films 52 and 54 may be composed of an amorphous silicon (a-Si) layer, an amorphous silicon carbide (a-SiCx) layer, an amorphous silicon oxide (a-SiOx) layer, etc. . Then, since the first and second tunneling films 52 and 54 have characteristics similar to those of the semiconductor substrate 110, the surface characteristics of the semiconductor substrate 110 can be improved more effectively.

At this time, the first and second tunneling films 52 and 54 may be formed entirely on the front and back surfaces of the semiconductor substrate 110, respectively. Accordingly, the entire front and rear surfaces of the semiconductor substrate 110 can be passivated and can be easily formed without separate patterning.

To sufficiently implement the tunneling effect, the thickness of the tunneling films 52 and 54 may be 5 nm or less, and may be 0.5 nm to 5 nm (for example, 1 nm to 4 nm). If the thickness of the tunneling films 52 and 54 exceeds 5 nm, tunneling may not occur smoothly and the solar cell 100 may not operate. If the thickness of the tunneling films 52 and 54 is less than 0.5 nm, tunneling of the desired quality may not be achieved. There may be difficulty in forming the films 52 and 54. To further improve the tunneling effect, the thickness of the tunneling films 52 and 54 may be 1 nm to 4 nm. However, the present invention is not limited to this, and the thickness of the tunneling films 52 and 54 may vary.

A first conductivity type region 20 having a first conductivity type may be formed on the first tunneling film 52. Additionally, a second conductivity type region 30 having a second conductivity type opposite to the first conductivity type may be located on the second tunneling film 54.

The first conductivity type region 20 may be a region having a first conductivity type including a first conductivity type dopant. And the second conductivity type region 30 may be a region having a second conductivity type including a second conductivity type dopant. For example, the first conductive region 20 may contact the second tunneling film 52 and the second conductive region 30 may contact the second tunneling film 54 . Then, the structure of the solar cell 100 can be simplified and the tunneling effect of the first and second tunneling films 52 and 54 can be maximized. However, the present invention is not limited to this.

The first and second conductive regions 20 and 30 may each include the same semiconductor material as that of the semiconductor substrate 110 (more specifically, a single semiconductor material, for example, silicon). For example, the first and second conductive regions 20 and 30 may be made of an amorphous silicon (a-Si) layer, an amorphous silicon carbide (a-SiCx) layer, an amorphous silicon oxide (a-SiOx) layer, etc. . Then, the first and second conductive regions 20 and 30 have similar characteristics to the semiconductor substrate 110, thereby minimizing differences in characteristics that may occur when they contain different semiconductor materials. However, since the first and second conductive regions 20 and 30 are formed separately from the semiconductor substrate 110, they are formed separately from the semiconductor substrate 110 so that they can be easily formed on the semiconductor substrate 110. May have different crystal structures.

For example, each of the first and second conductivity type regions 20 and 30 may be formed by doping a first or second conductivity type dopant into an amorphous semiconductor that can be easily manufactured by various methods such as deposition. Then, the first and second conductive regions 20 and 30 can be easily formed through a simple process. At this time, if the first and second tunneling films 52 and 54 are made of intrinsic amorphous semiconductor (eg, intrinsic amorphous silicon), they may have excellent adhesion properties, excellent electrical conductivity, etc.

When the base region 10 has a second conductivity type, the first conductivity type region 20 having a first conductivity type has a conductivity type different from that of the base region 10 to form a pn junction with the base region 10. Configures the emitter area. In addition, the second conductivity type region 30, which has a second conductivity type, has the same conductivity type as the semiconductor substrate 110 and forms a back surface field (BSF) with a higher doping concentration than the semiconductor substrate 110. Configures the rear electric field area. Then, the first conductive region 20 constituting the emitter region is located on the front side of the semiconductor substrate 110, so that the path of light joining the pn junction can be minimized.

However, the present invention is not limited to this. As another example, when the base region 10 has a first conductivity type, the first conductivity type region 20 constitutes a front electric field region and the second conductivity type region 30 constitutes an emitter region.

P-type dopants used as first or second conductivity type dopants include Group 3 elements such as boron (B), aluminum (Al), gallium (Ga), and indium (In), and n-type dopants include Group 5 elements such as phosphorus (P), arsenic (As), bismuth (Bi), and antimony (Sb) can be mentioned. However, the present invention is not limited to this and various dopants may be used as the first or second conductivity type dopant.

In this way, if at least one of the first and second tunneling films 52 and 54 and the first and second conductive regions 20 and 30 constituting the photoelectric conversion unit includes an amorphous semiconductor layer (for example, amorphous silicon) (if included), it can be manufactured simply, and the semiconductor substrate 110 has excellent characteristics because it is composed of only the base region 10 without a doped region, and the expensive semiconductor substrate 110 can reduce costs by reducing the thickness. You can. However, the amorphous semiconductor layer has many defects at the interface with the semiconductor substrate 110 constituting the heterojunction, and its characteristics can be easily deteriorated by high temperatures, so a low-temperature process must be applied. When a low-temperature process was applied, there was a limit to lowering the contact resistance of the conductive regions 20 and 30 and the electrodes 42 and 44. Considering this, in this embodiment, in the solar cell 100 having a photoelectric conversion unit including an amorphous semiconductor layer, deterioration of the amorphous semiconductor layer is prevented and the contact resistance of the conductive regions 20 and 30 and the electrodes 42 and 44 is reduced. A post-processing step (reference numeral ST50 in FIG. 3, hereinafter the same) that can prevent is performed. This will be described in more detail later in the manufacturing method or post-processing method of the solar cell 100.

First and second electrodes 42 and 44 connected to the first and second conductive regions 20 and 30 are positioned, respectively. The first and second electrodes 42 and 44 are connected to the first conductive region 20 and the first electrode 42 connected to the first conductive region 20 and to the second conductive region 30. It may include a second electrode 44 connected to the second conductive region 30 .

The first electrode 42 may include a first electrode layer 421 and a second electrode layer 422 that are sequentially stacked on the first conductive region 20.

Here, the first electrode layer 421 may be formed entirely on (for example, in contact with) the first conductive region 20 . Being formed as a whole may include covering the entire first conductive region 20 without empty spaces or empty areas, as well as cases where some parts are inevitably not formed. In this way, when the first electrode layer 421 is formed entirely on the first conductive region 20, the carrier can easily reach the second electrode layer 422 through the first electrode layer 421, resulting in resistance in the horizontal direction. can be reduced. Since the crystallinity of the first conductive region 20 composed of an amorphous semiconductor layer is relatively low, the mobility of carriers may be low, so the first electrode layer 421 is provided to allow carriers to move in the horizontal direction. This lowers the resistance.

In this way, since the first electrode layer 421 is formed entirely on the first conductive region 20, it may be made of a material that can transmit light (transmissive material). That is, the first electrode layer 421 is made of a transparent conductive material, allowing light to pass through and allowing carriers to easily move. Accordingly, even if the first electrode layer 421 is formed entirely on the first conductive region 20, the transmission of light is not blocked. As an example, the first electrode layer 421 may include indium tin oxide (ITO), carbon nanotubes (CNT), etc. However, the present invention is not limited to this and may include various materials other than the first electrode layer 421.

A second electrode layer 422 may be formed on the first electrode layer 421. For example, the second electrode layer 422 may be formed in contact with the first electrode layer 421 to simplify the structure of the first electrode 42. However, the present invention is not limited to this, and various modifications such as the presence of a separate layer between the first electrode layer 421 and the second electrode layer 422 are possible. Meanwhile, the second electrode layer 422 may have a single-layer structure as shown, or may have a multi-layer structure as shown.

The second electrode layer 422 located on the first electrode layer 421 may be made of a material having better electrical conductivity than the first electrode layer 421. As a result, characteristics such as carrier collection efficiency and resistance reduction by the second electrode layer 422 can be further improved. For example, the second electrode layer 422 may be made of an opaque metal with excellent electrical conductivity or a metal with lower transparency than the first electrode layer 421.

As such, the second electrode layer 422 may have a certain pattern to minimize shading loss because it is opaque or has low transparency, which may prevent light from entering. This allows light to enter the portion where the second electrode layer 422 is not formed. The planar shape of the second electrode layer 422 will be described in more detail later with reference to FIG. 2.

The second electrode 44 may include a first electrode layer 441 and a second electrode layer 442 that are sequentially stacked on the second conductive region 30. Except that the second electrode 44 is located on the second conductive region 30, the roles, materials, shapes, etc. of the first and second electrode layers 441 and 442 of the second electrode 44 are different from each other. Since the role, material, and shape of the first and second electrode layers 421 and 422 of the first electrode 42 are the same, the description thereof can be applied as is.

Additionally, various layers such as an anti-reflective film and a reflective film may be positioned on the first electrode layers 421 and 441 of the first and second electrodes 42 and 44.

At this time, in this embodiment, the second electrode layers 422 and 442 of the first and second electrodes 42 and 44 are made of a material that can be fired by low temperature firing (for example, firing at a process temperature of 300°C or lower). It can be configured. As an example, the second electrode layers 422 and 442 may not be provided with a glass frit and may include only a conductive material and resin (binder, hardener, additives). (Since they are not provided with a glass frit, they can be easily stored even at low temperatures. This is to enable it to be fired. Conductive materials may include silver (Ag), aluminum (Al), copper (Cu), etc., and resins may include binders such as cellulose-based or phenolic-based, amine-based, etc. It may contain a hardener, etc.

In this embodiment, since the second electrode layers 422 and 442 must be formed in contact with the first electrode layers 421 and 441, fire-through through the insulating film, etc. is not required. Accordingly, a low-temperature firing paste with the glass frit removed is used. As such, the second electrode layers 422 and 442 do not have a glass frit but only resin, so the conductive materials are not connected to each other by sintering but are in contact with each other. It can become conductive due to aggregation. Accordingly, conductivity may be low. Considering this, in this embodiment, a post-processing step (ST50) to improve conductivity is performed. This will be described in more detail later in the manufacturing method or post-processing method of the solar cell 100.

The planar shapes of the second electrode layers 422 and 442 of the above-described first and second electrodes 42 and 44 will be described in more detail with reference to FIG. 2.

FIG. 2 is a plan view of the second electrode layers 422 and 442 of the solar cell 100 shown in FIG. 1. FIG. 2 mainly shows the semiconductor substrate 110 and the second electrode layers 422 and 442 of the first and second electrodes 42 and 44.

Referring to FIG. 2 , the second electrode layers 422 and 442 may include a plurality of finger electrodes 42a and 44a each having a constant pitch and being spaced apart from each other. In the drawing, it is illustrated that the finger electrodes 42a and 44a are parallel to each other and to the edge of the semiconductor substrate 110, but the present invention is not limited thereto. In addition, the second electrode layers 422 and 442 may include bus bar electrodes 42b and 44b that are formed in a direction crossing the finger electrodes 42a and 44a and connect the finger electrodes 42a and 44a. These bus electrodes 42b and 44b may be provided alone, or, as shown in FIG. 2, may be provided in plural numbers with a pitch greater than that of the finger electrodes 42a and 44a. At this time, the width of the bus bar electrodes 42b and 44b may be larger than the width of the finger electrodes 42a and 44a, but the present invention is not limited thereto. Accordingly, the width of the bus bar electrodes 42b and 44b may be the same as or smaller than the width of the finger electrodes 42a and 44a.

In the drawing, it is illustrated that the second electrode layers 422 and 442 of the first electrode 42 and the second electrode 44 have the same planar shape. However, the present invention is not limited to this, and the width, pitch, etc. of the finger electrode 42a and the bus bar electrode 42b of the first electrode 42 are the same as those of the finger electrode 44a and the bus bar electrode of the second electrode 44. The width, pitch, etc. of (44b) may have different values. Additionally, it is possible for the second electrode layers 422 and 442 of the first electrode 42 and the second electrode 44 to have different planar shapes, and various other modifications are possible.

As such, in this embodiment, among the first and second electrodes 42 and 44 of the solar cell 100, the second electrode layers 422 and 442, which are opaque or contain metal, have a certain pattern and are formed on the semiconductor substrate 110. It has a bi-facial structure that allows light to enter the front and back. As a result, the amount of light used in the solar cell 100 can be increased, contributing to improving the efficiency of the solar cell 100. However, the present invention is not limited to this, and it is possible for the second electrode layer 442 of the second electrode 44 to have a structure formed entirely on the rear side of the semiconductor substrate 110.

As described above, the solar cell 100 including the photoelectric conversion unit including the amorphous semiconductor layer is used to prevent deterioration of the amorphous semiconductor layer and improve the conductivity of the electrodes 42 and 44 through the post-processing step (ST50). Can be post-processed. This will be described in more detail in the manufacturing method of the solar cell 100.

FIG. 3 is a flowchart showing a method of manufacturing a solar cell according to an embodiment of the present invention, and FIGS. 4A to 4I are cross-sectional views showing the method of manufacturing a solar cell shown in FIG. 3. Detailed description of content already described in the solar cell 100 with reference to FIGS. 1 and 2 will be omitted, and parts not described will be described in detail.

Referring to FIG. 3, the manufacturing method of the solar cell 100 according to this embodiment includes preparing a semiconductor substrate (ST10), forming a tunneling film (ST20), and forming a conductive region (ST30). , forming an electrode (ST40), and a post-processing step (ST50). Forming an electrode (ST40) includes forming a first electrode layer (ST41), forming a first low-temperature paste layer (ST42), first drying step (ST43), and forming a second low-temperature paste layer. (ST44), and a second drying step (ST45). This will be described in detail with reference to FIGS. 4A to 4I.

First, as shown in FIG. 4A, in the semiconductor substrate preparation step (ST10), the semiconductor substrate 110 consisting of the base region 10 is prepared.

Next, as shown in FIG. 4B, in the tunneling film forming step (ST20), the tunneling films 52 and 54 are formed entirely on the surface of the semiconductor substrate 110. More specifically, a first tunneling film 52 is formed on the front surface of the semiconductor substrate 110, and a second tunneling film 54 is formed on the rear surface of the semiconductor substrate 110. Although the drawing shows that the tunneling films 52 and 54 are not formed on the side of the semiconductor substrate 110, the tunneling films 52 and 54 may also be located on the side of the semiconductor substrate 110.

The tunneling films 52 and 54 may be formed, for example, by a thermal growth method or a deposition method (eg, chemical vapor deposition (PECVD), atomic layer deposition (ALD)). However, the present invention is not limited to this, and the tunneling films 52 and 54 can be formed by various methods.

Next, as shown in FIG. 4C, in the step of forming a conductive region (ST30), conductive regions 20 and 30 are formed on the tunneling films 52 and 54. More specifically, the first conductive region 20 may be formed on the first tunneling film 52 and the second conductive region 30 may be formed on the second tunneling film 54.

The conductive regions 20 and 30 may be formed, for example, by a deposition method (eg, chemical vapor deposition (PECVD), low pressure chemical vapor deposition (LPCVD), etc.). The first or second conductivity type dopant may be included in the process of growing the semiconductor layer forming the conductivity type regions 20 and 30, or may be used by ion implantation, thermal diffusion, laser doping, etc. after forming the semiconductor layer. It may also be doped. However, the present invention is not limited to this, and the conductive regions 20 and 30 can be formed by various methods.

Next, as shown in FIG. 4D, in the step of forming the first electrode layer (ST41), the first electrode layers 421 and 441 are formed on the conductive regions 20 and 30. More specifically, the first electrode layer 421 of the first electrode 42 is formed on the first conductive region 20, and the first electrode layer 421 of the second electrode 44 is formed on the second conductive region 30 ( 441) can be formed.

The first electrode layers 421 and 441 may be formed, for example, by a deposition method (eg, chemical vapor deposition (PECVD)) or a coating method. However, the present invention is not limited to this, and the first electrode layers 421 and 441 can be formed by various methods.

Subsequently, as shown in FIG. 4e, in the step of forming the first low-temperature paste layer (ST42), the first paste is placed on one of the conductive regions 20 and 30 (on the first conductive region 20 in the figure). A low-temperature paste layer 422a is formed. The first low-temperature paste layer 422a may include a conductive material, a resin (binder, curing agent, additive, etc.), and a solvent. The constituent materials of the conductive material and resin have already been described, so they are omitted. A variety of substances can be used as the solvent. For example, an ether-based solvent can be used. At this time, the first low-temperature paste layer 422a may contain 85 to 90 parts by weight of a conductive material, 1 to 15 parts by weight of a resin, and 5 to 10 parts by weight of a solvent, based on 100 parts by weight. However, the present invention is not limited to this.

This first low-temperature paste layer 422a can be formed by various methods. For example, it can be formed by printing with a desired pattern. Then, the first low-temperature paste layer 422a can be formed in a desired pattern through a simple process. Meanwhile, the first low-temperature paste layer 422a may have a single-layer structure as shown, or may have a multi-layer structure as shown.

Subsequently, as shown in FIG. 4F, in the first drying step (ST43), the first low-temperature paste layer 422a is dried to form one of the second electrode layers 422 and 442 (in the drawing, the first electrode 42). 2 electrode layer 422) is formed. The first drying step (ST43) may be performed at a temperature of 300°C or lower. This temperature is limited to a low temperature that can prevent deterioration of the tunneling films 52 and 54 and the conductive regions 20 and 30. However, the present invention is not limited to this.

By this first drying step (ST43), the solvent in the first low-temperature paste layer 422a is blown away and removed, thereby removing one of the second electrode layers 422 and 442 (in the drawing, the second electrode layer 422 of the first electrode 42). )) is composed of conductive materials and resin.

Subsequently, as shown in FIG. 4g, in the step of forming a second low-temperature paste layer (ST44), a second low-temperature paste layer is applied on the other one of the conductive regions 20 and 30 (the second conductive region 30 in the drawing). A paste layer 442a is formed. The second low-temperature paste layer 442a may include a conductive material, a binder, and a solvent. Since the second low-temperature paste layer 442a may have the same or similar materials and composition as the first low-temperature paste layer 422a, detailed description thereof will be omitted.

This second low-temperature paste layer 442a can be formed by various methods, for example, forming a desired pattern. It can be formed by printing in a branched state. Then, the second low-temperature paste layer 442a can be formed in a desired pattern through a simple process.

Subsequently, as shown in FIG. 4h, in the second drying step (ST45), the second low-temperature paste layer 442a is dried to dry the other one of the second electrode layers 422 and 442 (the second electrode 44 in the figure). A second electrode layer 442) is formed. The second drying step (ST45) may be performed at a temperature of 300°C or lower. This temperature is limited to a low temperature that can prevent deterioration of the tunneling films 52 and 54 and the conductive regions 20 and 30. However, the present invention is not limited to this.

By this second drying step (ST45), the solvent in the second low-temperature paste layer 442a is blown away and removed, thereby forming another one of the second electrode layers 422 and 442 (in the drawing, the second electrode layer of the second electrode 44). 442)) does not contain metal compounds containing oxygen, carbon, sulfur, etc., but is composed of conductive materials and resins.

In the drawing and the above description, the first low-temperature paste layer 422a is formed and then dried, and then the second low-temperature paste layer 442a is formed and then dried. It may be difficult to form the fluid first or second low-temperature paste layers 422a and 442a together to have a desired pattern on both surfaces. In consideration of this, after forming the first low-temperature paste layer 422a with fluidity, it is dried to form one of the second electrode layers 422 and 442, and then a second low-temperature paste layer 442a with fluidity is formed on the other side. form Then, problems such as the first low-temperature paste layer 422a flowing down when forming the second low-temperature paste layer 442a can be prevented. However, the present invention is not limited to this, and it is also possible to form the first and second low-temperature paste layers 442a on both sides simultaneously and then dry them together.

In the drawing and description, the first low-temperature paste layer 422a is formed on the first conductive region 20 located on the front surface of the semiconductor substrate 110, and after drying, the second electrode layer 422 of the first electrode 42 is formed. Compose. After that, the second low-temperature paste layer 442a is formed on the second conductive region 30 located on the rear side of the semiconductor substrate 110 and forms the second electrode layer 422 of the second electrode 44 after drying. . However, this order is only an example and the present invention is not limited thereto. The first low-temperature paste layer 422a may be formed on the second conductive region 30 located on the rear surface of the semiconductor substrate 110 to form the second electrode layer 442 of the second electrode 44 after drying. At this time, the second low-temperature paste layer 442a formed after the first low-temperature paste layer 422a is formed on the second conductive region 30 located on the rear side of the semiconductor substrate 110, and after drying, the first electrode ( It constitutes the second electrode layer 442 of 42).

Next, as shown in FIG. 4I, a post-processing step (ST50) of providing light to the solar cell 100 is performed. At this time, if heat is also provided to the solar cell 100, the effect of the post-processing step (ST50) can be further improved. Meanwhile, in this embodiment, the post-processing step (ST50) may be a two-step post-processing step. This will be described later.

When light is provided to the solar cell 100 in the post-processing step (ST50), the diffusion rate of hydrogen can be increased by improving the mobility of hydrogen. When the tunneling films 52 and 54 and/or the conductive regions 20 and 30 are made of an amorphous semiconductor layer, a large amount of hydrogen is contained therein, and the hydrogen is diffused by increasing the diffusion rate of hydrogen. It can easily spread to their interfaces. Then, the amount of hydrogen located inside the amorphous semiconductor layer can be greatly increased and defects at the interface can be reduced.

As a result, it is possible to prevent deterioration of the amorphous semiconductor layer that may occur due to increased reactivity of hydrogen inside the amorphous semiconductor layer due to light or heat. Accordingly, thermal stability can be secured at temperatures above 200°C. As an example, the solar cell 100 manufactured by the manufacturing method according to this embodiment may have thermal stability at 300°C or lower. As a result, it is possible to prevent the amorphous semiconductor layer from deteriorating in subsequent module processes, such as the process of attaching the ribbon to the solar cell 100. Additionally, the passivation characteristics can be improved by reducing defects at the interface.

The method for manufacturing a solar cell according to the present invention can be performed at a relatively low process temperature of 300°C or lower. Therefore, since the solar cell manufacturing process is not performed at a high process temperature (for example, exceeding 300°C), deterioration of the semiconductor layer included in the solar cell can be prevented during the manufacturing stage.

Additionally, the conductivity of the electrodes 42 and 44 formed from the first and second low-temperature pastes 422a and 442a can be improved by the light provided in the post-processing step (ST50). This is expected to be because light can have a light sintering effect by increasing the activity of the binder included in the first and second low-temperature pastes 422a and 442a.

At this time, the light provided to the solar cell 100 in the post-processing step (ST50) may have a luminous intensity of 100 W/m ² to 30,000 W/m ² . If the light intensity is less than 100 W/m ² , the effect of the post-processing step (ST50) may not be sufficient. It may be difficult to implement light using current light sources with a luminous intensity exceeding 30000 W/m ² . For example, the light provided to the solar cell 100 in the post-processing step (ST50) may have a luminous intensity of 100 W/m ² to 20,000 W/m ² . According to this, the effect of the post-processing step (ST50) can be effectively improved.

For example, the light provided to the solar cell 100 in the post-processing step (ST50) may have a wavelength of 300 nm to 1000 nm. Light in the infrared region with a wavelength exceeding 1000 nm can heat the solar cell 100 beyond a controllable level. Accordingly, in this embodiment, the effect of the post-processing step (ST50) of the solar cell 100 can be maximized by using only light having a wavelength in a range related only to the post-processing of the solar cell 100. As an example, light provided to the solar cell 100 may have a wavelength of 400 nm to 800 nm. In this way, if the amorphous semiconductor layer is prevented from deteriorating by using light of a wavelength directly involved in the photoelectric conversion of the solar cell 100, the effect in the post-processing step (ST50) of the solar cell 100 can be maximized.

Meanwhile, the light provided to the solar cell 100 in the post-processing step (ST50) may have a wavelength of 400 nm or less, and specifically may have a wavelength of 300 to 400 nm. In this case, the light intensity may be 100 W/m ² to 5000 W/m ² . In addition, the light provided to the solar cell 100 in the post-processing step (ST50) may have a wavelength of more than 400 nm and less than 1000 nm, and in this case, the luminous intensity may be 100 W/m ² to 30,000 W/m ² . This is because the solar cell 100 has different energies depending on the wavelength of the light provided to it, and accordingly, the light intensity may also change in response to the wavelength of the light.

Therefore, since a light source with a wavelength of 400 nm or less has high energy, the effect can be maximized by providing a lower luminous intensity compared to a light source with a wavelength of more than 400 nm. In this way, the light provided to the solar cell 100 in the post-processing step (ST50) promotes the firing of the first and second low-temperature pastes 422a and 442a at the wavelength and luminous intensity in the above-mentioned range, and improves the mobility of hydrogen. Deterioration of the amorphous semiconductor layer due to light can be prevented. In this embodiment, the post-processing step (ST50) may be performed at room temperature or with heat provided. In particular, when heat is provided along with light in the post-processing step (ST50), sintering of the first and second low-temperature pastes 422a and 442a can be promoted. And by improving the mobility of hydrogen, it is possible to prevent the amorphous semiconductor layer from being deteriorated by light. For example, the process temperature of the post-treatment step (ST50) may be room temperature to 300°C (for example, 15 to 300°C). Here, the process temperature may refer to the temperature of the solar cell 100 (or semiconductor substrate 110) at which the post-processing step (ST50) is performed. If the process temperature is lower than room temperature, the effect of the post-treatment step (ST50) may be reduced and a separate device must be used to lower the process temperature below room temperature. If the process temperature exceeds 300°C, the amorphous semiconductor layer may be deteriorated during the process of performing the post-processing step (ST50) before the effect of the post-processing step (ST50) is realized. As an example, the post-processing step (ST50) may have a process temperature of 100°C to 300°C. This is because the effect of the post-treatment step (ST50) can be further improved when the process temperature is above 100℃.

At this time, in this embodiment, the process temperature of the post-processing step (ST50) may be 200°C to 300°C. As described above, according to this embodiment, it is possible to prevent deterioration of the amorphous semiconductor layer in the solar cell 100 due to light applied in the post-processing step (ST50), thereby ensuring thermal stability at a temperature of 200 ° C. or higher. Because. As a result, the post-treatment step (ST50) can be performed even at a relatively high process temperature of 200°C to 300°C. Then, the self-resistance of the amorphous semiconductor layer can be minimized and the resistivity of the electrodes 42 and 44 can also be greatly improved. And in this embodiment, the process temperature, which is the temperature of the solar cell 100 in the post-processing step (ST50), can be effectively improved by light. That is, if light is used together with heat, the temperature of the solar cell 100 can be improved even by light, as shown in FIG. 5. As a result, manufacturing costs can be reduced by reducing the amount of heat supplied to the solar cell 100 through the heat source. In addition, it may be difficult to finely control the temperature of the solar cell 100 due to the heat applied by the heat source. By irradiating light with the solar cell 100 as the heat source in an approximate temperature range, the solar cell 100 The temperature of the battery 100 can be maintained stably by finely controlling it to a desired range.

In this embodiment, the post-processing step (ST50) can be performed by inserting the solar cell 100 into the post-processing device 200 that has the above-described process temperature and provides light without a separate preheating process. This is because the process temperature is not high, so there is not a high possibility that problems such as deterioration of the characteristics of the solar cell 100 due to a sudden temperature change will occur at the process temperature. Accordingly, productivity can be improved by eliminating the preheating process and equipment for it.

The process time of the post-processing step (ST50) may be 30 seconds to 1 hour. If the process time is less than 30 seconds, the effect of the post-processing step (ST50) may not be sufficient. If the process time exceeds 1 hour, productivity may decrease due to the long process time. For example, the process time of the post-processing step (ST50) may be 1 minute to 30 minutes. According to this, it is possible to maintain high productivity while stably implementing the effects of the post-processing step (ST50).

As an example, the solar cell 100 may be post-processed within the post-processing device 200 that includes the light source unit 222 to provide light to the solar cell 100. At this time, the post-processing device 200 may be a heat treatment device further including a heat source unit 224.

The light source unit 222 serves to provide light with a desired brightness to the solar cell 100. Since the luminous intensity of light required in the post-processing step (ST50) is 100 W/m ² to 30,000 W/m ² , the light source unit 222 can provide light with a luminous intensity of 100 W/m ² to 30,000 W/m ² .

At this time, various methods of adjusting the luminous intensity of the light source unit 222 may be applied to provide light of the luminous intensity required for the post-processing step (ST50). That is, the number, type, output, etc. of the light sources 222a and 222b constituting the light source unit 222 can be adjusted, or the distance between the light sources 222a and 222b and the solar cell 100 can be changed.

In this embodiment, the light source unit 222 may include a plurality of light sources 222a and 222b to provide sufficient light to the solar cell 100. However, the present invention is not limited to this, and if high intensity light is not required, it is possible to have only one light source (222a, 222b).

In this embodiment, the light sources 222a and 222b may be comprised of a plasma lighting system (PLS) that provides light by plasma emission. In the plasma lighting system, the inside of the bulb is filled with a specific gas, and electromagnetic waves such as microwaves generated by a magnetron or an incident beam are applied to highly ionize the gas inside the bulb (i.e., create plasma), and this Light is emitted from the plasma. The wavelength of light emitted from the plasma lighting system may be 300 to 1200 nm.

The plasma lighting system does not use electrodes, filaments, or mercury, which are components of conventional lighting systems, so it is environmentally friendly and has a semi-permanent lifespan. In addition, the luminous flux maintenance rate is very excellent, so there is little change in the amount of light even when used for a long time based on super luminous flux. It is resistant to heat and has excellent thermal stability, so there is no problem even if it is used in the same space as the heat source unit 224, and it can emit light of sufficient brightness. For reference, other light sources, such as light emitting diodes, are vulnerable to heat, making it difficult to use them with the heat source unit 224, and emit only low-level light intensity. Additionally, the plasma lighting system can emit almost uniform continuous light over the entire wavelength of the visible light region, providing light similar to sunlight. At this time, in this embodiment, an In-Br compound formed by combining indium (In) and bromine (Br) can be used as the gas that fills the inside of the bulb of the plasma lighting system. As a result, it is possible to have a spectrum more similar to sunlight than when conventional sulfur gas is used. In this way, if light with a spectrum similar to sunlight is provided, the post-processing step (ST50) can be performed under conditions similar to sunlight, and deterioration that may be caused by sunlight can be effectively prevented in advance in the post-processing step (ST50). It can be prevented.

In this embodiment, the use of a plurality of light sources 222a and 222b including a plasma lighting system is illustrated. As a result, light of the desired intensity can be stably provided to the solar cell 100. However, the present invention is not limited to this, and a xenon lamp, a halogen lamp, a laser, a light emitting diode (LED), etc. may be used as the light sources 222a and 222b. That is, at least one of a xenon lamp, a halogen lamp, a laser, a plasma lighting system, and a light emitting diode (LED) can be used as the light source (222a, 222b).

Meanwhile, UV lamps that emit ultraviolet rays may be used as the light sources 222a and 222b. In this case, the UV lamps may emit light with a wavelength of 300 to 400 nm. However, it is not limited to this, and the UV lamp may emit extreme ultraviolet rays of less than 300 nm.

In this embodiment, the cover substrate 223 located on the front side (i.e., the surface emitting light) of the light sources 222a and 222b is located on the base substrate 223a and the base substrate 223a and is made of materials with different refractive indices. It may include a plurality of layers 223b.

The base substrate 223a may be made of a material that has enough strength to protect the light sources 222a and 222b and has transparency to allow light to pass through. For example, the base substrate 223a may be made of glass or the like.

The plurality of layers 223b are composed of layers with different refractive indices stacked, and may function as a filter to block unwanted light. For example, the plurality of layers 223b may be made of oxide-based materials with different refractive indices, thereby providing wavelengths of less than 300 nm (for example, less than 600 nm) and more than 1200 nm (for example, more than 1000 nm). Eggplants can block light. The materials, laminated structures, etc. of the plurality of layers 223b can be applied to various materials, laminated structures, etc. that can block light having a wavelength of less than 300 nm (for example, less than 600 nm) and 1200 nm (for example, more than 1000 nm). You can.

In the drawing, it is illustrated that the plurality of layers 232b are located on the outer surface of the base substrate 223a, but the present invention is not limited thereto. Accordingly, it is possible for the plurality of layers 232b to be located on the inner surface of the base substrate 223a, or on both the inner and outer surfaces.

In this embodiment, some light is blocked by the cover substrate 223 constituting the light sources 222a and 222b, and only efficient light can be provided to the solar cell 100 in the post-processing step (ST50). Then, the effect of the post-processing step (ST50) can be maximized by using a simple structure. However, the present invention is not limited to this, and some light may be blocked by an optical filter installed between the light sources 222a and 222b and the solar cell 100, separately from the light sources 222a and 222b.

The heat source unit 224 provides appropriate heat so that the solar cell 100 can have a desired temperature in the post-processing device 200. At this time, various methods, structures, and shapes may be applied to the heat source unit 224.

For example, the heat sources 224a and 224b constituting the heat source unit 224 may be ultraviolet lamps, for example, halogen lamps. Alternatively, a coil heater or the like may be used as the heat sources 224a and 224b. If the heat sources 224a and 224b use ultraviolet lamps such as halogen lamps, the temperature can be increased at a faster rate than a coil heater. If the heat sources 224a and 224b include coil heaters, equipment costs can be reduced.

In this embodiment, the heat source unit 224 is located spaced apart from the solar cell 100 or the conveyor belt or worktable 204 on which the solar cell 100 is placed, and cools the atmosphere of the main area 220 by radiation. The solar cell 100 can be heated using an atmosphere heating method. Then, problems caused by damage to the solar cell 100 caused by the heat source unit 224 or heat generation in local parts of the solar cell 100 can be minimized. For example, when the heat sources 224a and 224b of the heat source unit 224 are ultraviolet lamps, direct irradiation of ultraviolet rays may deteriorate the passivation characteristics of the passivation films 22 and 32. In addition, when the heat sources 224a and 224b of the heat source unit 224 are in direct contact, if a process error or the like occurs, the solar cell 100 is locally heated, causing some parts of the solar cell 100 to be heated to an undesirable temperature. Problems such as these may occur. However, the present invention is not limited to this, and the solar cell 100 may be heated by conduction instead of atmospheric heating.

As described above, in the post-processing step (ST560), light can be provided by the light source unit 222 and a constant temperature can be maintained by the heat source unit 224. At this time, in this embodiment, the light source unit 222 and the heat source unit 224 provide light and heat to the solar cell 100 at separate locations. That is, the light sources 222a and 222b constituting the light source unit 222 are located together, and the light sources 222a and 222b constituting the light source unit 222 and the heat source unit 224 do not mix with each other. In this state, the light source unit 222 and the heat source unit 224 provide light and heat to the solar cell 100, thereby minimizing the influence of the light source unit 222 and the heat source unit 224 on each other.

For example, within the main area 220, the light source unit 222 may be located on one side of the solar cell 100, and the heat source unit 224 may be located on the other side of the solar cell 100. Then, light and heat from the light source unit 222 and the heat source unit 224 can be effectively transmitted to the solar cell 100 while minimizing interference between them.

For example, the light source unit 222 is located on the upper side of the solar cell 100 (i.e., on the upper side of the conveyor belt or worktable 204), and the heat source unit 224 is located on the lower side of the solar cell 100 (i.e., on the conveyor belt or worktable 204). It may be located on the lower side of (204). When the light source unit 222 is located below the conveyor belt 202, part of the light provided from the light source unit 222 is blocked by the conveyor belt or work table 204 and cannot effectively provide light, whereas the heat source unit 224 Even if it is located below the conveyor belt or worktable 204, sufficient heat can be provided to the solar cell 100 through atmospheric heating or conduction. Accordingly, in this embodiment, the light source unit 222 is located on the upper side of the solar cell 100 or the conveyor belt or the work table 204, and the heat source unit 224 is located on the lower side of the solar cell 100 or the conveyor belt or the work table 204. It is located in . However, the present invention is not limited to this, and the specific positions of the light source unit 222 and the heat source unit 224 may vary.

In this embodiment, the solar cell 100 may be post-processed within the post-processing device 200 having an independent batch structure. Then, external interference can be minimized during the process to maximize the effect of the process and improve process uniformity. Additionally, the conveyor belt can be omitted, reducing the burden on equipment. The solar cell 100 may be post-processed within the post-processing device 200 by an in-line process using a conveyor belt or the like. Then, the solar cell 100 can be post-processed at a high speed, thereby improving the production yield of the solar cell 100.

3 and 4A to 4I illustrate that the second drying step (ST45) and the post-processing step (ST50) are performed in separate processes. However, the present invention is not limited to this, and the second drying step (ST45) is performed in the post-processing device 200, and as shown in FIG. 6, the second drying step (ST45) and the post-processing step (ST50) are performed. may be performed simultaneously. According to this, the effect of the post-processing step (ST50) can be realized through a simple process without adding a separate process.

If heat treatment is performed on the solar cell 100 again at a high temperature after the post-processing step (ST50), the effect of the post-processing step (ST50) may be reduced or disappear. Accordingly, the post-processing step (ST50) is performed in the latter part of the method of manufacturing the solar cell 100 and can be performed together with or after the second drying step (ST45) performed at a relatively high temperature. there is. As a result, the effect of the post-processing step (ST50) can be prevented from deteriorating or disappearing.

Meanwhile, in the present invention, the post-processing step (ST50) may be comprised of two steps as described above. FIG. 4J is a schematic diagram for explaining the two-step post-processing step (ST50) in this embodiment.

4J, the post-processing step (ST50) includes the first step (1 ^st step) and the second step (2 ^st step). step). The first step (1 ^st step) may be a step in which only heat is multiplied through a heater, and the second step (2 ^st step) may be a step in which only heat is multiplied through a heater. step) may be a step in which heat and light are supplied simultaneously using a heater and a light source 222. Meanwhile, in this embodiment, the second step (2 ^st step) is greater than the first step (1 ^st step). Although the temperature of step) is shown to be relatively high, the technical idea of the present invention is not limited thereto. In this way, the city takes the second step (2 ^st step), the temperature range at which the solar cell 100 processed in the post-processing step (ST50) does not deteriorate may be relatively high compared to the first step (1 ^st step). It is shown to explain. Therefore, the first step (1 ^st step) and the second step (2 ^st step) The temperature of step) may be the same.

Referring again to FIG. 4J, the first step (1 ^st step) may be performed at 200°C or lower. Providing heat to the solar cell 100 can improve the mobility of hydrogen and increase the diffusion rate of hydrogen. That is, when the tunneling films 52 and 54 and/or the conductive regions 20 and 30 are composed of an amorphous semiconductor layer, a large amount of hydrogen is contained therein, and the diffusion rate of hydrogen is increased to increase the hydrogen diffusion rate. It can easily spread to their interfaces. Then, the amount of hydrogen located inside the amorphous semiconductor layer can be greatly increased and defects at the interface can be reduced.

Next, the second step (2 ^st step), additional light is supplied using the light source 222. 2nd step (2 ^st When light and heat are provided to the solar cell 100 together in step), the mobility of hydrogen can be improved compared to the first step (1 ^st step), thereby further increasing the diffusion rate of hydrogen. Additionally, the conductivity of the electrodes 42 and 44 formed from the first and second low-temperature pastes 422a and 442a can be improved. This is expected to be because light can have a light sintering effect by increasing the activity of the binder contained in the first and second low-temperature pastes 422a and 442a. The second step (2 ^st The light supplied from step) may be substantially the same as that described with reference to FIG. 4I.

In this embodiment, the first step (1 ^st step) and the second step (2 ^st step) step) may be performed continuously using a conveyor belt on which the solar cell 100 is placed, but is not limited thereto and may be performed separately.

In this embodiment, the second step (2 ^st Since light is supplied in step), the temperature at which the solar cell 100 deteriorates can be relatively increased. In manufacturing the solar cell 100, when the solar cell 100 includes an amorphous semiconductor layer, deterioration of the amorphous semiconductor layer may occur when the process temperature of the post-processing step (ST50) exceeds 200 degrees. . However, if the process is performed at a low temperature, a problem may arise in which the diffusion rate of hydrogen is reduced.

Therefore, the post-processing step (ST50) according to this embodiment is a second step (2 ^st ) that supplies heat and light simultaneously. If the solar cell 100 includes an amorphous semiconductor layer, the process temperature can be increased to 200 degrees or more. That is, the second step (2 ^st) of the post-processing step (ST50) according to this embodiment step), it is possible to prevent deterioration of the solar cell 100 and at the same time increase the diffusion rate of hydrogen.

As explained with FIGS. 4i and 4j, in the method of manufacturing the solar cell 100 according to the present embodiment, light is provided to the solar cell 100 in the post-processing step (ST50) to be contained within the amorphous semiconductor layer. It is possible to reduce the amount of hydrogen and reduce defects at the interface. At this time, this effect can be further improved by providing heat. As a result, deterioration of the amorphous semiconductor layer can be effectively prevented. As an example, the solar cell 100 manufactured by the manufacturing method according to this embodiment may have thermal stability at 300°C or lower. On the other hand, in the solar cell 100 that does not perform the post-processing step (ST50), the thermal stability is very low above 200°C, so the amorphous semiconductor layer can easily deteriorate. Additionally, the conductivity of the electrodes 42 and 44 can be improved. As a result, efficiency can be improved by improving the density of the solar cell 100.

In the above-described embodiment, along with the semiconductor substrate 110, the amorphous semiconductor layer includes first and second tunneling films 52 and 54, and first and second conductive regions 20 and 30 as photoelectric conversion units. An example of performing the post-processing step (ST50) according to this embodiment on the solar cell 100 is illustrated. However, the present invention is not limited to this. Therefore, the post-processing step (ST50) according to this embodiment can be performed on the solar cell 100 of various structures including an amorphous semiconductor layer.

For example, as shown in FIG. 7, the post-processing step (ST50) according to this embodiment may also be performed on the thin film amorphous solar cell 300.

Referring to FIG. 7, the thin film amorphous solar cell 300 according to this embodiment includes a first substrate (hereinafter “front substrate”) 310, and an area on the front substrate 310 (more specifically, in the drawing). It includes a first electrode 320, a photoelectric conversion unit 330, and a second electrode 340 formed on the lower surface of the front substrate 310. A sealant 350 and a second substrate (hereinafter referred to as “rear substrate”) 360 may be further formed on the second electrode 340. At this time, the photoelectric conversion unit 330 is electrically connected to each other by the first separator 322, the second separator 332, and the third separator 342 and has a plurality of unit cells 330a and 330b partitioned from each other. , 330c).

As an example, the front substrate 310 may be a transparent substrate made of a material such as glass or polymer.

The first electrode 320 may include a transparent conductive material that has light transparency and electrical conductivity. For example, the first electrode 320 is made of zinc oxide (ZnO), indium tin oxide (ITO), tin oxide (SnO ₂ ), or a metal oxide and one or more impurities added thereto (for example, , boron (B), fluorine (F), aluminum (Al), etc.).

The photoelectric conversion unit 330 is an amorphous semiconductor layer, which includes a first conductivity type semiconductor layer (for example, a first conductivity type silicon layer) and an intrinsic semiconductor layer (for example, an intrinsic silicon layer). and a second conductivity type semiconductor layer (for example, a second conductivity type silicon layer) having a second conductivity type, and may have a pin junction structure. Since various known materials, structures, etc. can be applied to the first conductivity type semiconductor layer, the intrinsic semiconductor layer, and the second conductivity type semiconductor layer forming the pin junction structure, description thereof will be omitted.

The second electrode 340 has better reflection characteristics than the first electrode 320 and may include a material with excellent conductivity (for example, a metal material). For example, the second electrode 340 may include a single or multiple layers containing silver, aluminum, gold, nickel, chromium, titanium, palladium, or alloys thereof.

As the sealant 350, ethylene vinyl acetate copolymer resin (EVA), polyvinyl butyral (PVB), silicon resin, ester resin, olefin resin, etc. may be used.

The rear substrate 360 may have the form of a substrate, film, or sheet, and may be made of a material such as glass or polymer.

In the method of manufacturing the thin film amorphous solar cell 300 according to this embodiment, a post-processing step is performed after forming at least the first electrode 320, the photoelectric conversion unit 330, and the second electrode 340 on the front substrate 310. (ST50) can be performed. As a result, deterioration of the characteristics of the photoelectric conversion unit 330 including an amorphous semiconductor layer (for example, an amorphous silicon layer) can be prevented and the conductivity of the second electrode 340 connected to the photoelectric conversion unit 330 can be improved. .

Hereinafter, the present invention will be described in more detail with reference to experimental examples. The following experimental examples are provided only to explain the present invention in more detail, and the present invention is not limited thereto.

Experiment example One

Forming first and second tunneling films and first and second conductive regions composed of an amorphous silicon layer on a crystalline silicon substrate, forming a first low-temperature paste layer, performing a first drying step, and forming a second low-temperature paste layer. After forming the layer, a second drying step was performed to manufacture a solar cell having the structure shown in FIG. 1. At this time, a paste containing 90 parts by weight of silver (Ag), 5 parts by weight of binder, and 5 parts by weight of solvent was used as the first and second low-temperature paste layers.

Subsequently, light having a luminous intensity of about 0 W/m ² (or natural light without separate light), about 800 W/m ² , and 10,000 W/m ² is provided to each of the plurality of solar cells for 20 minutes. Processing steps were performed. At this time, the process temperature was maintained at approximately 100°C. In this case, if the luminous intensity is assumed to be 1 when the luminous intensity is 0 W/m ² , the relative value of the luminous intensity is about 1.03 when the luminous intensity is about 800 W/m ² , and the luminous intensity is about 10000 W/m In the case of ² , it was confirmed from the experimental results that the relative value of the density was about 1.07.

In other words, it can be seen that when light is used in the post-processing step, the density is higher compared to when light is not used.

Accordingly, it can be seen that the density of the solar cell can be improved by the post-processing step of providing light.

Experiment example 2

Forming first and second tunneling films and first and second conductive regions composed of an amorphous silicon layer on a crystalline silicon substrate, forming a first low-temperature paste layer, performing a first drying step, and forming a second low-temperature paste layer. After forming the layer, a second drying step was performed to manufacture a plurality of solar cells having the structure shown in FIG. 1. This is called the solar cell according to Example 1.

Forming first and second tunneling films and first and second conductive regions composed of an amorphous silicon layer on a crystalline silicon substrate, forming a first low-temperature paste layer, performing a first drying step, and forming a second low-temperature paste layer. By forming a layer, a plurality of solar cells were manufactured without performing the second drying step, as shown in FIG. 4g. This is called the solar cell according to Example 2.

At this time, a paste containing 90 parts by weight of silver (Ag), 5 parts by weight of binder, and 5 parts by weight of solvent was used as the first and second low-temperature paste layers.

Next, a post-processing step was performed by providing light with a luminous intensity of about 2500 W/m ² to the plurality of solar cells according to Examples 1 and 2 for 20 minutes. At this time, the plurality of solar cells according to Example 1 and Example 2 each had a process temperature of about 20°C (room temperature without additional heat supply), about 50°C, about 110°C, about 200°C, about Post-treatment steps were performed at different temperatures of 300°C, about 400°C, and about 500°C. The densities of a plurality of solar cells according to Examples 1 and 2 that underwent the post-processing step as described above were measured, and the relative values are shown in FIG. 8.

Referring to FIG. 8, in the plurality of solar cells according to Example 1, the density when the post-treatment step was performed at a temperature of 300 ° C. or lower was higher than that when the post-treatment step was performed at a temperature exceeding 300 ° C. You can see that In addition, the density is higher when the post-treatment step is performed at a temperature of about 50°C to about 300°C with separate heat supply than when the post-treatment step is performed at a room temperature of about 20°C without separate heat supply. It can be seen that it is even higher. In particular, it can be seen that the density is very high when the post-treatment step is performed at a temperature of about 100°C to about 300°C.

In addition, it can be seen that the density of Example 2, in which the post-treatment step was performed simultaneously with the second drying step, was generally higher than that of Example 1, in which the post-treatment step was performed after the second drying step. The properties of the first and second low-temperature pastes may deteriorate somewhat when the drying step is repeated. In Example 2, a separate post-treatment step was not added, thereby minimizing the number of drying times of the first and second low-temperature pastes, thereby increasing the density. It is predicted to be even higher.

According to this embodiment, light is provided to the solar cell in the post-processing step to reduce the amount of hydrogen contained within the amorphous semiconductor layer and reduce defects at the interface. At this time, this effect can be further improved by providing heat. As a result, deterioration of the amorphous semiconductor layer can be effectively prevented. Additionally, the conductivity of the electrode can be improved. As a result, the efficiency of the solar cell can be improved by improving the density of the solar cell.

The features, structures, effects, etc. described above are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, etc. illustrated in each embodiment can be combined or modified and implemented in other embodiments by a person with ordinary knowledge in the field to which the embodiments belong. Therefore, contents related to such combinations and modifications should be construed as being included in the scope of the present invention.

Claims (23)

Forming a photoelectric conversion unit including an amorphous semiconductor layer;
forming an electrode connected to the photoelectric conversion unit; and
A post-processing step of providing light to the photoelectric conversion unit and the electrode to post-process the photoelectric conversion unit and the electrode,
Forming the electrode may include forming a first electrode layer including a transparent conductive material that entirely covers the surface of the amorphous semiconductor layer; and
It includes forming a second electrode layer having a pattern on the first electrode layer,
The process temperature in the post-treatment step is 100°C to 300°C,
A method of manufacturing a solar cell, wherein the step of forming the electrode is performed at a process temperature of 300° C. or lower. According to paragraph 1,
The photoelectric conversion unit,
semiconductor substrate;
a tunneling film located on the semiconductor substrate; and
Conductive region located on the tunneling film
Including,
A method of manufacturing a solar cell, wherein at least one of the tunneling film and the conductive region is composed of the amorphous semiconductor layer. According to paragraph 2,
The conductive region is composed of an amorphous silicon layer, an amorphous silicon carbide layer, or an amorphous silicon oxide layer containing a p-type or n-type dopant,
A method of manufacturing a solar cell wherein the tunneling film is composed of an intrinsic amorphous silicon layer, an amorphous silicon carbide layer, or an amorphous silicon oxide layer. According to paragraph 2,
The second electrode layer is formed by forming a low-temperature paste layer containing a solvent, a conductive material, and a binder and drying it. According to paragraph 2,
The tunneling film includes a first tunneling film positioned on one side of the semiconductor substrate, and a second tunneling film positioned on a back surface of the semiconductor substrate,
The conductive region includes a first conductive region positioned on the first tunneling film, and a second conductive region positioned on the second tunneling film. According to paragraph 1,
A method of manufacturing a solar cell that provides heat together with the light in the post-processing step. According to paragraph 1,
A method of manufacturing a solar cell wherein the luminous intensity of the light in the post-processing step is 100 W/m ² to 30000 W/m ² . In clause 7,
A method of manufacturing a solar cell wherein the luminous intensity of the light in the post-processing step is 100 to 20000 W/m2. According to paragraph 1,
A method of manufacturing a solar cell using any one of a xenon lamp, a halogen lamp, a laser, a plasma lighting system (PLS), and a light emitting diode (LED) as a light source in the post-processing step. delete delete According to paragraph 1,
A method of manufacturing a solar cell wherein the process temperature in the post-processing step is 200°C to 300°C. According to paragraph 1,
A method of manufacturing a solar cell wherein the wavelength of the light in the post-processing step is 300 nm to 1000 nm. According to clause 13,
A method of manufacturing a solar cell wherein the wavelength of the light is 400 nm to 800 nm. According to paragraph 1,
A method of manufacturing a solar cell wherein the process time in the post-processing step is 30 seconds to 1 hour. According to clause 15,
A method of manufacturing a solar cell wherein the process time in the post-treatment step is 1 minute to 30 minutes. According to paragraph 1,
The post-processing step is performed after the step of forming the electrode, or performed simultaneously with at least a portion of the step of forming the electrode. According to clause 17,
The step of forming the electrode is,
forming a low-temperature paste layer including a solvent, a conductive material, and a binder; and
A drying step of drying the low-temperature paste layer to form an electrode layer including the conductive material and the binder.
Including,
A method of manufacturing a solar cell, wherein the post-treatment step is performed after the drying step or simultaneously with the drying step. According to clause 18,
A method of manufacturing a solar cell in which the second electrode layer is formed by forming the low-temperature paste layer and the drying step. According to clause 18,
A method of manufacturing a solar cell wherein the low-temperature paste layer does not include a glass frit. According to paragraph 1,
The post-processing step includes a first step and a second step,
The first step provides only heat, and the second step provides both heat and light. According to clause 21,
The method of manufacturing a solar cell wherein the temperature of the heat provided in the second step is greater than or equal to the temperature of the heat provided by the first step. According to clause 1,
In the post-processing step, the wavelength of the light is 400 nm or less, and the luminous intensity of the light is 100 to 5000 W/m2.