KR102584403B1 - Liquid Crystal Display Device And Driving Method Thereof - Google Patents

Abstract

A display device according to an embodiment of the present specification includes a display panel; a panel driver that drives signal lines of the display panel to write an input image to the display panel; and an LRR driver that determines a frame skip rate and intermittently activates the panel driver's operation according to the determined frame skip rate during the period when the panel self-refresh operation is activated. And, the frame skip rate varies depending on the representative luminance of the input image.

Description

Display device and driving method {Liquid Crystal Display Device And Driving Method Thereof}

This specification relates to a display device and its driving method.

The display device may be implemented in the form of a liquid crystal display device, a field emission display device, an electrophoresis display device, an electrowetting display device, an organic light emitting display device, and a quantum dot display device. Among these, liquid crystal displays are widely used mainly for large-area and high-resolution models.

To achieve low power consumption, display devices use panel self-refresh (PSR) technology and low refresh rate (LRR) technology. PSR technology is a technology that stops the host system's output when a still image continues and repeatedly outputs the same image using the frame buffer installed in the display module. LRR technology stops (deactivates) the output of the panel driver at regular intervals when a still image continues, and reduces power consumption by intermittently omitting video output, such as frame skip.

However, when applying LRR technology, if the frame skip rate is set constant without considering the luminance of the input image or the system status, flickering may become worse in an unspecified luminance section and display quality may deteriorate.

Therefore, this specification provides a display device and a driving method that can improve the level of flickering by adjusting the frame skip rate differently depending on the luminance of the input image or system status when applying LRR technology when driving PSR.

A display device according to an embodiment of the present specification includes a display panel; a panel driver that drives signal lines of the display panel to write an input image to the display panel; and an LRR driver that determines a frame skip rate and intermittently activates the panel driver's operation according to the determined frame skip rate during the period when the panel self-refresh operation is activated. And, the frame skip rate varies depending on the representative luminance of the input image.

According to the embodiments of the present specification, the present invention has the following effects.

In applying the LRR technology when driving PSR, the present invention reduces power consumption by checking the representative luminance of the input image, or checking the representative luminance and system status of the input image and adjusting the frame skip rate according to the check result. Not only can this be effectively reduced, but the flickering level can also be effectively improved.

The effects according to the present specification are not limited to the contents exemplified above, and further various effects are included in the present specification.

1 is a diagram showing a display device according to an embodiment of the present specification.
Figures 2 to 4 are diagrams showing an example of adjusting the frame skip rate according to the luminance of the input image.
5 to 7 are diagrams showing examples of system state conditions that serve as other standards for adjusting the frame skip rate.
Figure 8 is an embodiment of the present specification and is a diagram showing an example of adjusting the frame skip rate differently depending on the luminance of the input image or system status when applying the LRR technology when driving PSR.
FIG. 9 is a comparative example of the present specification and shows an example in which the frame skip rate is kept constant regardless of the luminance of the input image or the system state when applying the LRR technology when driving the PSR.
Figure 10 is a diagram showing a method of driving a display device according to an embodiment of the present specification.

The advantages and features of the present specification and methods for achieving them will become clear by referring to the embodiments described in detail below along with the accompanying drawings. However, the present specification is not limited to the embodiments disclosed below and will be implemented in various different forms, but the present embodiments only serve to ensure that the disclosure of the present specification is complete and are within the scope of common knowledge in the technical field to which the present invention pertains. It is provided to fully inform those who have the scope of the invention, and the present invention is only defined by the scope of the claims.

The shape, size, ratio, angle, number, etc. disclosed in the drawings for explaining the embodiments of the present specification are illustrative, and the present specification is not limited to the matters shown. Like reference numerals refer to like elements throughout the specification. When 'includes', 'has', 'consists of', etc. mentioned in the specification are used, other parts may be added unless '~ only' is used. When a component is expressed in the singular, the plural is included unless specifically stated otherwise.

When interpreting a component, it is interpreted to include the margin of error even if there is no separate explicit description.

In the case of a description of a positional relationship, for example, if the positional relationship between two parts is described as 'on top', 'on top', 'at the bottom', 'next to ~', 'right next to' Alternatively, there may be one or more other parts placed between the two parts, unless 'directly' is used.

First, second, etc. may be used to describe various components, but these components are not limited by these terms. These terms are merely used to distinguish one component from another. Accordingly, the first component mentioned below may also be the second component within the technical spirit of the present invention.

In the following description, if it is determined that a detailed description of a known function or configuration related to the present invention may unnecessarily obscure the gist of the present invention, the detailed description will be omitted.

Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings.

1 is a diagram showing a liquid crystal display device according to an embodiment of the present invention.

Referring to FIG. 1, a liquid crystal display device according to an embodiment of the present specification may include a host system 10 and a display module 20.

The host system 10 may be implemented as a variety of systems, such as a television system, set-top box, navigation system, DVD player, Blu-ray player, personal computer, home theater system, and phone system. The host system 10 includes a system on chip (SoC) with a built-in scaler and converts the data (DATA) of the input image into a format suitable for the panel resolution of the display module 20. The host system 18 can transmit the PSR control signal and various timing signals along with the data (DATA) of the input image to the display module 20.

The host system 10 may be connected to the display module 20 through various interface circuits. As an example, the host system 10 may be connected to the display module 20 through an embedded display port (hereinafter referred to as 'eDP'). The eDP standard is an interface standard corresponding to the DP interface designed for devices with built-in display devices such as laptop PCs, tablets, netbooks, and all-in-one desktop PCs. eDP may include PSR technology. PSR is a technology that minimizes power consumption by utilizing the frame buffer (RFB) mounted within the display module 20.

The host system 10 includes an eDP transmitter 12. The eDP transmitter 12 can transmit input image data (DATA), PSR on/off signals, and external timing control signals to the display module 20 through the eDP interface. The eDP transmitter 12 may activate the PSR operation when the input image data (DATA) is a still image, and deactivate the PSR operation when the input image data (DATA) is a moving image. The eDP transmitter 12 transmits a PSR on signal to the display module 20 to activate the PSR operation when the input video data (DATA) is a still image, and activates the PSR operation when the input video data (DATA) is a moving image. A PSR off signal for deactivation may be transmitted to the display module 20. After the PSR on signal is transmitted to the display module 20, the data (including input video data and external timing control signals) transmission operation between the eDP transmitter 12 and the display module 20 is blocked (i.e., floating). By doing so, power consumption due to data transmission can be minimized.

The display module 20 may include a timing controller 22, a level shifter 24, a source driver 26, and a display panel 28.

The display panel 28 can be applied to various types of display devices.

As an example, the display panel 28 can be applied to a liquid crystal display device.

In this case, two substrates and liquid crystal cells formed between them are provided. On this lower substrate, multiple data lines and multiple gate lines are formed to intersect. On the lower substrate of the display panel 28, a TFT (Thin Film Transistor) is installed at each intersection of the data lines and the gate lines, each pixel electrode is connected to the pixel electrode to charge the liquid crystal cell with a data voltage, and is connected to the pixel electrode to provide a voltage of the liquid crystal cell. A storage capacitor, etc. is formed to maintain . Additionally, a color filter array is formed on the upper substrate of the display panel 28. The color filter array includes a black matrix and color filters. A pixel array including a plurality of liquid crystal cells (i.e., pixels) is formed in the display panel 28 by an intersection structure of data lines and gate lines.

An upper polarizing film is attached to the upper substrate of the display panel 28, a lower polarizing film is attached to the lower substrate of the display panel 28, and an alignment film is formed on the inner surface in contact with the liquid crystal layer to set the pre-tilt angle of the liquid crystal. It can be. A column spacer may be further formed between the upper and lower substrates to maintain a cell gap of the liquid crystal cell.

A common electrode to which a common voltage is supplied is formed on the lower substrate. The common electrode is electrically contacted with a common voltage supply line formed on the lower substrate and receives a common voltage from the common voltage supply line. An electric field is formed between the common electrode and the pixel electrode, and the transmittance of the liquid crystal cell is determined by this electric field. Liquid crystal cells can be driven in Normally Black Mode, in which the transmittance or gradation increases as the potential difference between the data voltage applied to the pixel electrode and the common voltage applied to the common electrode increases, and conversely, the difference between the data voltage and the common voltage increases. It can be driven in Normally White Mode, where the larger the potential difference, the lower the transmittance or gray level.

The display panel 28 may be implemented in any form, such as a transmissive display device, a transflective display device, or a reflective display device. Transmissive display devices and transflective display devices require a backlight unit. The backlight unit may be implemented as a direct type backlight unit or an edge type backlight unit.

As another example, the display panel 28 may be applied to an organic light emitting display device.

In this case, the display panel 28 is provided with a plurality of pixel lines, and each pixel line is provided with a plurality of pixels and a plurality of signal lines. The signal lines include data lines for supplying data voltages to pixels, reference voltage lines for supplying reference voltages to pixels, gate lines for supplying gate signals to pixels, and high-potential pixel voltage lines for pixels. It may include high potential power lines to supply.

The pixels of the display panel 28 are arranged in a matrix form to form a pixel array. Each pixel included in the pixel array may include a light emitting element, a driving element, at least one switch element, and at least one capacitor. Each pixel may be connected to one of the data lines, one of the reference voltage lines, and one of the high potential power lines. Additionally, each pixel included in the pixel array may be connected to at least one gate line. The number of gate lines connected to each pixel may vary depending on the pixel structure. Additionally, each pixel included in the pixel array may further receive a low-potential pixel voltage from the power generator. The power generator may supply a low-potential pixel voltage to the pixel through a low-potential power line or pad portion.

As such, in the pixel array of the display panel 28 applied to various display devices, each of the pixels may be connected to the source output channels of the source driver 26 through data lines, and the gate driver 281 through gate lines. ) can be connected to the gate output channels.

The timing controller 22 may be connected to the host system 10 through an eDP interface and may be connected to the source driver 26 through an EPI interface. The EPI interface connects the timing controller 22 and the source drive ICs constituting the source driver 26 in a point-to-point manner to minimize the number of wires between the timing controller 22 and the source drive ICs and facilitate signal transmission. It is a signal transmission protocol for stabilization. However, the technical idea of the present invention is not limited to the EPI interface and can be applied to various interface methods. The timing controller 22 and the source driver 26 may be connected through another interface method, for example, mini LVDS or V1.

The timing controller 22 can selectively activate the PSR operation and the normal refresh (hereinafter referred to as 'NR') operation according to the PSR control signal transmitted from the host system 10. Specifically, the timing controller 22 may activate the PSR operation according to the PSR on signal and activate the NR operation according to the PSR off signal. And, the timing controller 22 may activate the LRR operation after the PSR operation is activated. Whether or not the LRR operation is activated may vary depending on whether the LRR mode is set. For devices in which the LRR mode is not set, the LRR operation may not be performed. In the case of the present invention, the target is a device in which LRR mode is set.

The timing controller 22 controls overall operations of the source driver 26 and gate driver 281 related to the PSR operation, LRR operation, and NR operation. For this purpose, the timing controller 22 includes an eDP receiver 221 connected to the eDP transmitter 12 through an eDP interface, an LRR controller 222 that generally controls the LRR operation, and a GDC that generates a gate timing control signal. It may include a generator 223 and an EPI transmitter 224 that generates a source timing control signal and transmits it to the source driver 26 along with the input image data (DATA).

Additionally, the timing controller 22 includes a luminance calculation unit 225 for calculating the representative luminance of the input image and a system check unit 226 for checking the system status. The representative luminance or system state serves as a standard for determining the frame skip rate in the LRR control unit 222.

The eDP receiver 221 turns on the built-in frame buffer (RFB) when a PSR on signal is input from the eDP transmitter 12, and sends the input video data (DATA) transmitted from the eDP transmitter 12 to the frame buffer (RFB). It can be saved in . Data stored in the frame buffer (RFB) can be written to the display panel 28 through the source driver 26 while the PSR on signal is maintained.

When the LRR operation is activated, the LRR control unit 222 intermittently deactivates (i.e., floats) the source output channels of the source driver 26 according to the frame skip rate, thereby reducing power consumption. For this purpose, the LRR control unit 222 receives the representative luminance of the input image from the luminance calculation unit 225, receives system status information from the system check unit 226, and then receives the representative luminance and/or system status information of the input image. The frame skip rate can be determined based on . The LRR control unit 222 may generate a source output masking signal (ABDEN) according to the determined frame skip ratio and apply it to the source driver 26. Meanwhile, the LRR control unit 222 can further reduce power consumption by intermittently deactivating (i.e., floating) the gate output channels of the gate driver 281 when the LRR operation is activated. To this end, the LRR controller 222 may further generate a gate output masking signal (not shown) according to the determined frame skip rate and apply it to the gate driver 281.

The LRR control unit 222 can control the positions of data frames and skip frames according to the frame skip rate. A data frame refers to a frame in which writing of image data (DATA) is made to the display panel 28, and a skip frame refers to a frame in which writing of image data (DATA) to the display panel 28 is stopped. In the skip frame, the output channels of the source driver 26 and the gate driver 281 float in response to a masking signal (ABDEN, etc.). The LRR control unit 222 may control the output channels of the source driver 26 and the gate driver 281 so that at least one skip frame is placed between neighboring data frames.

The GDC generator 223 generates gate timing control signals (VST, GCLK) suitable for PSR operation, NR operation, and LRR operation. The voltage level of these gate timing control signals (VST, GCLK) is boosted by the level shifter 24 to match the TFT operation of the pixel and then applied to the gate driver 281.

The EPI transmitter 224 transmits the input image data (DATA) and the source output masking signal (ABDEN) received from the LRR control unit 222 to the source driver 26.

The source driver 26 may be implemented with a plurality of source driver ICs, each including an EPI receiver 261. The EPI receivers 261 of the source driver ICs are connected to the EPI transmitter 224 in a point-to-point manner, so that the number of interface wires can be minimized and signal transmission can be stabilized. Each of the source driver ICs converts input image data (DATA) into an analog data voltage and supplies it to the data lines. Source output channels of each of the source driver ICs may be floated according to the source output masking signal (ABDEN).

Meanwhile, the gate driver 281 may be built into the display panel 28. That is, the gate driver 281 can be formed directly in the non-display area (bezel area) of the display panel 28 through a pixel array TFT process. The gate driver 281 generates a gate signal (scan signal) that is synchronized with the data voltage and supplies it to the gate lines. Gate output channels of the gate driver 281 may be floated according to the gate output masking signal.

Figures 2 to 4 are diagrams showing an example of adjusting the frame skip rate according to the luminance of the input image.

The luminance calculation unit 225 operates on the premise that the PSR on signal is activated, and therefore operates when the input image is a still image. The luminance calculation unit 225 analyzes the input image data (DATA) and calculates the representative luminance of the input image. The luminance calculation unit 112 may include a grayscale-luminance conversion table and convert the grayscale of the input image data DATA into luminance. The luminance calculation unit 112 calculates the representative luminance of the input image by analyzing the luminance of the input image data DATA in units of pixels or in units of blocks of a predetermined size including a plurality of pixels. If the representative luminance is calculated on a pixel basis, the representative luminance of the input image can be accurately calculated. Calculating representative luminance in block units has the advantage of reducing the time required to calculate luminance and the size of the calculation algorithm. The representative luminance may be determined as the average luminance in pixel or block units of the still image, or as the mode luminance.

The luminance calculation unit 225 supplies the calculated representative luminance to the LRR control unit 222.

The LRR control unit 222 stores a luminance-skip ratio conversion table in advance as shown in FIGS. 2 to 4, maps the representative luminance input from the luminance calculation unit 225 to the luminance-skip ratio conversion table, and skips a frame appropriate for the representative luminance. Determine the ratio.

In the luminance-skip ratio conversion table, frame skip ratios (1/X1 to 1/Xn) may correspond one-to-one to a plurality of luminance sections (Y1 to Yn). In the luminance-skip ratio conversion table, the luminance value increases as it goes from Y1 to Yn, and the frame skip rate decreases as it goes from 1/X1 to 1/Xn. In the luminance-skip ratio conversion table, a luminance section with relatively high flicker visibility is mapped to a relatively low frame skip rate, and conversely, a luminance section with relatively low flicker visibility is mapped to a relatively high frame skip rate. As the frame skip ratio is lower, the number of skip frames decreases when driving LRR, and conversely, when the frame skip ratio is higher, the number of skip frames increases when driving LRR. In this way, the level of flickering can be reduced and display quality can be improved in an unspecified luminance section when driving LRR.

The brightness-skip ratio conversion table can be set in various ways according to the flicker characteristics of the display panel 28 according to the brightness sections Y1 to Yn. In other words, the luminance-skip ratio conversion table can be set in various ways in advance for each display panel 28 through a flicker recognition experiment according to the luminance section.

As an example, the luminance-skip ratio conversion table of FIG. 2 takes into account the tendency for flicker visibility to increase in proportion to the luminance of the input image, and as another example, the luminance-skip ratio conversion table of FIGS. 3 and 4 considers the tendency of the flicker visibility to increase in proportion to the luminance of the input image. This takes into account the tendency for flicker visibility to become more noticeable in the section (Y2-Y3).

The LRR control unit 222 stores the luminance-skip ratio conversion table of FIG. 2 in advance, and sets the frame skip ratio to “1/X1” when the representative luminance input from the luminance calculation unit 225 falls within the luminance range “0 to Y1”. is determined, and if the representative luminance falls within the luminance range “Y1~Y2”, the frame skip rate is determined to be “1/X2”, which is smaller than “1/ If the representative luminance falls within the luminance range "Yn-1 to Yn", the frame skip rate is determined to be "1/X3", which is less than "1/X2". It can be determined with a small "1/Xn". Therefore, according to the luminance-skip ratio conversion table of FIG. 2, the number of skip frames during LRR driving is largest in the luminance range “0 to Y1” and smallest in the luminance range “Yn-1 to Yn.” In the case of a display panel corresponding to the luminance-skip ratio conversion table of FIG. 2, flicker visibility increases in proportion to the luminance of the input image, so if the number of skip frames is reduced from low luminance to high luminance through the LRR control unit 222, , the level of flickering when driving LRR can be dramatically improved.

Meanwhile, the LRR control unit 222 stores the luminance-skip ratio conversion table of FIG. 3 in advance, and when the representative luminance input from the luminance calculation unit 225 falls within the luminance range “0 to Y1”, the frame skip ratio is set to “1/ X1", and if the representative luminance falls within the luminance range "Y1~Y2", the frame skip rate is determined to be "1/X3" which is smaller than "1/X1", and the representative luminance falls within the luminance range "Y3~Y4". If the representative luminance belongs to the luminance range "Yn-1~Yn", the frame skip rate is determined to be "1/Xn", which is less than "1/ It can be determined by a specific value that is greater than "1/X3". Therefore, according to the luminance-skip ratio conversion table of FIG. 3, the number of skip frames during LRR driving is largest in the luminance range “0 to Y1” and smallest in the luminance range “Y2 to Y3”. In the case of a display panel corresponding to the luminance-skip ratio conversion table of FIG. 3, flicker visibility is noticeable in a specific luminance section (Y2 to Y3) of the input image, so the LRR control unit 222 switches the display panel to a specific luminance section (Y2 to Y3). By relatively reducing the number of skip frames, the level of flickering during LRR driving can be dramatically improved.

Meanwhile, the LRR control unit 222 stores the luminance-skip ratio conversion table in FIG. 4 in advance, and when the representative luminance input from the luminance calculation unit 225 falls within the luminance range “0 to Y1”, the frame skip ratio is set to “1/ X1", and if the representative luminance falls within the luminance range "Y1~Y2", the frame skip rate is determined to be "1/X3" which is smaller than "1/X1", and the representative luminance falls within the luminance range "Y3~Y4". If the representative luminance falls within the luminance range "Yn-1~Yn", the frame skip rate is set to "1/X3", which is smaller than "1/X3". You can decide. Therefore, according to the luminance-skip ratio conversion table in FIG. 4, the number of skip frames during LRR driving is largest in the luminance range “0 to Y1” and smallest in the luminance range “Y2 to Y3”. In the case of a display panel corresponding to the luminance-skip ratio conversion table of FIG. 4, flicker visibility is noticeable in a specific luminance section (Y2 to Y3) of the input image, so the LRR control unit 222 switches the display panel to a specific luminance section (Y2 to Y3) By relatively reducing the number of skip frames, the level of flickering during LRR driving can be dramatically improved.

5 to 7 are diagrams showing examples of system state conditions that serve as other standards for adjusting the frame skip rate.

The system check unit 226 operates on the premise that the PSR on signal is activated, and therefore operates when the input image is a still image. The system check unit 226 may output power option information when LRR is driven. As shown in FIG. 5, power option information may include, but is not limited to, a battery mode for using battery power, an external power mode for using external power, and a power saving mode for power saving. The LRR control unit 222 can further change the frame skip rate determined according to the representative luminance of the input image according to the power option, thereby more effectively reducing power consumption when driving the LRR. For example, in the external power mode, the LRR control unit 222 maintains the frame skip rate at a value determined according to the representative luminance of the input image, and in the battery mode, increases the frame skip rate to a value determined according to the representative luminance of the input image, and in the power saving mode. In , the frame skip rate can be higher than in battery mode.

Additionally, the system check unit 226 may further output remaining battery information in battery mode and power saving mode when LRR is driven. Battery remaining amount information may have different values corresponding to certain steps (Step 1 to Step 5), as shown in FIG. 6. The LRR control unit 222 can further change the frame skip rate determined according to the representative luminance of the input image and the power option according to the remaining battery information, thereby more effectively reducing power consumption when driving the LRR. For example, in step 1, the LRR control unit 222 maintains the frame skip rate at a value determined according to the representative luminance and power option of the input image, and in steps 2 to 5, the frame skip rate is adjusted according to the representative luminance and power option of the input image. It can be gradually increased from the determined value.

Additionally, the system check unit 226 may further output screen brightness information in battery mode and power saving mode when LRR is driven. Screen brightness information may have different values corresponding to certain steps (Step 1 to Step 5), as shown in FIG. 7 . The LRR control unit 222 can further change the representative brightness of the input image and the frame skip rate determined according to the power option according to the screen brightness information, thereby more effectively reducing power consumption when driving the LRR. For example, in step 1, the LRR control unit 222 maintains the frame skip rate at a value determined according to the representative luminance and power option of the input image, and in steps 2 to 5, the frame skip rate is adjusted according to the representative luminance and power option of the input image. It can be gradually increased from the determined value.

Figure 8 is an embodiment of the present specification and is a diagram showing an example of adjusting the frame skip rate differently depending on the luminance of the input image or system status when applying the LRR technology when driving PSR.

Referring to FIG. 8, in the first to third frames (F1 to F3), the 12th to 14th frames (F12 to F14), and the 19th frame (F19) in which the PSR operation is deactivated, the PSR off signal is activated. In synchronization, the data transmission channel (eDP Tx) of the host system 10 and the display module 20 are connected, and input video data (N+1 to N+7) is transmitted from the host system 10 to the display module 20. is transmitted. At this time, the timing controller 22 drives the source driver 26 and the gate driver 281 to write the input image data (N+1 to N+7) to the display panel.

On the other hand, in the fourth to eleventh frames (F4 to F11) in which the PSR operation is activated, the data transmission channel (eDP Tx) of the host system 10 is floated in synchronization with the first PSR on signal to display the display module 20. The connection is cut off, and input image data (N+3) is stored in the frame buffer (RFB) of the display module 20. At this time, the timing controller 22 not only activates the LRR operation, but also internally determines the brightness of the input image (Y4), power option (battery mode), remaining battery level (Step 3), and screen brightness (Step 2). The operation of the panel driver (source driver 26 and gate driver 281) is intermittently activated according to the first frame skip ratio (1/Xa). The timing controller 22 floats the output channels of the panel driver in the skip frames (F4 to F6, F8 to F10), and floats the output channels of the panel driver in the data frames (F7 and F11) to the data line and gate line, respectively. You can connect to fields. In the skip frames (F4~F6, F8~F10), the input image data (N+3) is maintained in the display panel 28, and in the data frames (F7, F11), the panel driver is driven and the input image data (N+3) is maintained in the display panel 28. +3) is written again on the display panel 28.

In addition, in the 15th to 18th frames (F15 to F18) in which the PSR operation is activated again, the data transmission channel (eDP Tx) of the host system 10 is floated in synchronization with the second PSR on signal and displayed in the display module 20. ) is disconnected, and input image data (N+6) is stored in the frame buffer (RFB) of the display module 20. At this time, the timing controller 22 re-activates the LRR operation and internally adjusts the settings according to the representative luminance (Y2) of the input image, power option (battery mode), remaining battery level (Step 4), and screen brightness (Step 2). The operation of the panel driver (source driver 26 and gate driver 281) is intermittently activated according to the determined second frame skip ratio (1/Xb). The timing controller 22 can float the output channels of the panel driver in the skip frames (F15 and F17) and connect the output channels of the panel driver to the data lines and gate lines in the data frames (F16 and F18), respectively. there is. In the skip frames F15 and F17, the input image data (N+6) is maintained in the display panel 28, and in the data frames F16 and F18, the panel driver is driven to store the input image data (N+6). It is written again on the display panel 28.

The timing controller 22 may activate the source output masking signal (ABDEN) and the gate output masking signal during vertical blank periods in which no image data is written and vertical active periods of skip frames.

In this embodiment, the flicker visibility according to the representative luminance (Y4) of the input image is lower than the flicker visibility according to the representative luminance (Y2) of the input image. Accordingly, the frame skipping rate when driving the LRR synchronized with the first PSR on signal is determined to be higher than the frame skipping rate when driving the LRR synchronized with the second PSR on signal. This frame skip rate can be additionally adjusted depending on the remaining battery capacity. The higher the frame skip rate, the longer the period in which the operation of the panel driver is deactivated within the period in which the PSR operation is activated. As can be clearly seen through this embodiment, when applying LRR technology when driving PSR, the present invention can improve power consumption and flickering levels by adjusting the frame skip rate differently depending on the luminance of the input image or system status. .

FIG. 9 is a comparative example of the present specification and shows an example in which the frame skip rate is kept constant regardless of the luminance of the input image or the system state when applying the LRR technology when driving the PSR.

Referring to FIG. 9, in the first to third frames (F1 to F3), the 12th to 14th frames (F12 to F14), and the 19th frame (F19) in which the PSR operation is deactivated, the PSR off signal is activated. In synchronization, the data transmission channel (eDP Tx) of the host system 10 and the display module 20 are connected, and input video data (N+1 to N+7) is transmitted from the host system 10 to the display module 20. is transmitted. At this time, the timing controller 22 drives the source driver 26 and the gate driver 281 to write the input image data (N+1 to N+7) to the display panel.

On the other hand, in the fourth to eleventh frames (F4 to F11) in which the PSR operation is activated, the data transmission channel (eDP Tx) of the host system 10 is floated in synchronization with the first PSR on signal to display the display module 20. The connection is cut off, and input image data (N+3) is stored in the frame buffer (RFB) of the display module 20. At this time, the timing controller 22 activates the LRR operation and operates the panel driver (source driver 26) according to a predetermined 1/2 frame skip rate regardless of the representative luminance of the input image, power option, remaining battery level, screen brightness, etc. ) and the gate driver 281) are controlled to alternate between skip frames and data frames. The timing controller 22 floats the output channels of the panel driver in the skip frames (F4, F6, F8, and F10), and floats the output channels of the panel driver in the data frames (F5, F7, F9, and F11) as data lines, respectively. can be connected to fields and gate lines. In the skip frames (F4, F6, F8, F10), the input image data (N+3) is maintained in the display panel 28, and in the data frames (F5, F7, F9, F11), the panel driver is driven to input the input image data (N+3). The video data (N+3) is written again to the display panel 28.

In addition, in the 15th to 18th frames (F15 to F18) in which the PSR operation is activated again, the data transmission channel (eDP Tx) of the host system 10 is floated in synchronization with the second PSR on signal and displayed in the display module 20. ) is disconnected, and input image data (N+6) is stored in the frame buffer (RFB) of the display module 20. At this time, the timing controller 22 re-activates the LRR operation and operates the panel driver (source driver ( 26) and the gate driver 281) are controlled to alternate skip frames and data frames. The timing controller 22 can float the output channels of the panel driver in the skip frames (F15 and F17) and connect the output channels of the panel driver to the data lines and gate lines in the data frames (F16 and F18), respectively. there is. In the skip frames F15 and F17, the input image data (N+6) is maintained in the display panel 28, and in the data frames F16 and F18, the panel driver is driven to store the input image data (N+6). It is written again on the display panel 28.

The timing controller 22 may activate the source output masking signal (ABDEN) and the gate output masking signal during vertical blank periods in which no image data is written and vertical active periods of skip frames.

In this comparative example, the frame skip rate synchronized to the first and second PSR on signals is predetermined to be the same as the 1/2 frame skip rate. In this way, if the frame skip rate is determined regardless of the representative luminance of the input image, power option, remaining battery amount, screen brightness, etc., not only will the power consumption reduction effect be small, but in some cases, flicker may be significantly perceived.

Figure 10 is a diagram showing a method of driving a display device according to an embodiment of the present specification.

Referring to FIG. 10, the method of driving a display device according to an embodiment of the present specification enters the LRR mode when the LRR operation is activated in the active state of the PSR operation, and otherwise enters the existing PSR mode. And, if the PSR operation (or LRR operation) is completed and deactivated, it enters normal mode (S1, S2, S6, S7).

Next, the method of driving the display device is to determine the frame skip rate by checking the representative luminance of the input image after entering the LRR mode, or to determine the frame skip rate by further checking the system conditions along with the representative luminance of the input image after entering the LRR mode. can be determined (S3, S4, S5).

Through the above-described content, those skilled in the art will be able to see that various changes and modifications can be made without departing from the technical idea of the present specification. Therefore, the technical scope of the present specification is not limited to the content described in the detailed description of the specification, but should be determined by the scope of the patent claims.

26: source driver 28: display panel
222: LRR control unit 225: Luminance calculation unit
226: system check unit 281: gate driver

Claims (14)

display panel;
a panel driver that drives signal lines of the display panel to write an input image to the display panel; and
During a period when a panel self-refresh operation is activated, the input image is stored in a frame buffer, the panel driver is controlled to write the input image stored in the frame buffer to the display panel, and the input image is stored in a frame buffer. An LRR driver that determines a frame skip rate based on the representative luminance of the image and system status information, and intermittently activates the operation of the panel driver according to the determined frame skip rate,
The frame skip rate varies depending on the representative luminance of the input image,
The system status information includes external power mode, battery mode, and power saving mode,
In the external power mode, the frame skip rate is maintained at a value determined according to the representative luminance of the input image,
In the battery mode, the frame skip rate is higher than the value determined according to the representative luminance of the input image,
A display device that increases the frame skip rate in the power saving mode more than in the battery mode. According to claim 1,
The LRR driving unit,
If the representative luminance of the input image belongs to a first luminance section with strong flicker visibility, the frame skip rate is determined as a first value,
A display device that determines the frame skip rate to be a second value greater than the first value when the representative luminance of the input image falls within a second luminance section in which flicker visibility is low. delete delete According to claim 1,
The LRR driving unit,
A display device that further changes the frame skip rate according to screen brightness in the battery mode and power saving mode. According to claim 1,
The higher the frame skip rate, the longer the period during which the operation of the panel driver is deactivated within the period in which the panel self-refresh operation is activated. According to claim 1,
The panel self-refresh operation is activated when the input image is a still image,
A display device in which the representative luminance of the input image is determined by the average luminance or mode luminance of the still image. A method of driving a display device having a display panel and a panel driver that drives signal lines of the display panel to write an input image to the display panel, comprising:
During the period when the panel self-refresh operation is activated, the input image is stored in a frame buffer, the panel driver is controlled to write the input image stored in the frame buffer to the display panel, and the input image is stored in the frame buffer. Determining a frame skip rate based on representative luminance of the image and system status information; and
Intermittently activating the operation of the panel driver according to the determined frame skip rate,
The frame skip rate varies depending on the representative luminance of the input image,
The system status information includes external power mode, battery mode, and power saving mode,
In the external power mode, the frame skip rate is maintained at a value determined according to the representative luminance of the input image,
In the battery mode, the frame skip rate is higher than the value determined according to the representative luminance of the input image,
A method of driving a display device in which the frame skip rate is increased in the power saving mode to a higher level than in the battery mode. According to claim 8,
The step of determining the frame skip rate is,
If the representative luminance of the input image belongs to a first luminance section with strong flicker visibility, the frame skip rate is determined as a first value,
A method of driving a display device, wherein when the representative luminance of the input image falls within a second luminance section in which flicker visibility is low, the frame skip rate is determined to be a second value greater than the first value. delete delete According to claim 8,
The step of determining the frame skip rate is,
A method of driving a display device that further changes the frame skip rate according to screen brightness in the battery mode and power saving mode. According to claim 8,
A method of driving a display device in which the higher the frame skip rate, the longer the period during which the operation of the panel driver is deactivated within the period in which the panel self-refresh operation is activated. According to claim 8,
The panel self-refresh operation is activated when the input image is a still image,
A method of driving a display device wherein the representative luminance of the input image is determined by the average luminance or mode luminance of the still image.