KR102562839B1 - Subharmonic single-balanced radio frequency receiving circuit - Google Patents

Abstract

The present invention relates to a subharmonic single-balanced radio frequency (RF) receiver circuit. A low-harmonic single-balanced RF receiving circuit according to an embodiment of the present invention includes a low-noise amplifier for low-noise amplifying an RF received signal; and a differential voltage controlled oscillator stacked at a lower end of the low noise amplifier and operating as a single-balanced subharmonic mixer and a local oscillator.

Description

Subharmonic single balanced RF receiving circuit {SUBHARMONIC SINGLE-BALANCED RADIO FREQUENCY RECEIVING CIRCUIT}

The present invention relates to a subharmonic single balanced radio frequency (RF) receive circuit.

BACKGROUND With the development of portable electronic devices, interest in low power and/or high integration of integrated circuits is increasing. For example, a single-stage method for providing high integration and low power by combining a mixer and an oscillator is applied to a wireless communication circuit included in an electronic device. In addition, in order to achieve low power consumption and high integration of the integrated circuit, a technique of reusing current between various functional blocks is generally proposed. For example, a mixer may be cascoded at the top of an input stage of a low noise amplifier (LNA). As another example (preceding 1), a double balanced mixer may be stacked on top of an oscillator (eg, a voltage controlled oscillator (VCO)) using a current reuse topology. At this time, a radio frequency (RF) input signal (or frequency) is applied to the input of the double balanced mixer and an oscillator signal is applied to the source node of the double balanced mixer. However, since the oscillator is connected to the source of the RF transistor, the impedance of the LC tank is considerably low, and it is difficult to perform oscillation with low power consumption. In addition, the above structure requires a separate DC bias to be applied to the oscillator.

As another example (preceding 2), a radio communication circuit (eg, RF front end) may combine a low noise amplifier (LNA), a mixer, and an oscillator (VCO) in a single stage (hereafter referred to as LMV). In this topology, the oscillator is stacked on top of the mixer. The mixer's current source is modified with a low-noise amplifier with inductor degeneration. This topology can perform RF amplification, mixing, and local oscillation (LO) signal generation while sharing the same bias current and the same devices among all blocks in the RF front end, providing a low-power, small-area chip solution. However, since the output of the intermediate frequency (IF) is connected to the source node of the voltage oscillator (VCO), the voltage gain is limited due to the low impedance of the source node. In addition, this topology has a problem in that the local oscillation signal leaks to the IF output through the parasitic capacitance of the switching transistor.

As another example, a wireless communication circuit, as shown in FIG. 7 . A differential voltage controlled oscillator 720 may be stacked on top of the low noise amplifier 710 . The differential voltage controlled oscillator 720 may include two VCOs 721 and 722 quadrature coupled using an S-QVCO or P-QVCO topology. At this time, the intermediate frequency can be directly sensed from the center tap of the inductor (L) of each oscillator. However, when using the S-QVCO topology, the switching transistor (M _SW ) and the coupling transistor (M _cpl ) are connected in a cascoding manner, so that the output impedance increases. On the other hand, when the P-QVCO topology is used, the switching transistor and the coupling transistor are connected in parallel, so there is a problem in that the parasitic capacitance of the tank increases (leakage current increases) and the swing of the local oscillation (LO) signal decreases.

preceding 1. T. -P. Wang, C.-C. Chang, R.-C. Liu, et al., A low-power oscillator mixer in 0.18-μm CMOS technology, IEEE Trans. Microw. Theor. Tech. 54 (2006) 88-95. 2. A. Liscidini, A. Mazzanti, R. Tonietto, L. Vandi, P. Andreani, R. Castello, Single-stage low-power quadrature RF receiver front-end: the LMV cell, IEEE J. Solid State Circ . 41 (2006) 2832-2841.

The present invention, to solve the above problem, can provide a low-harmonic single balanced RF receiving circuit that can prevent (reduce) leakage of a local oscillation (LO) signal.

In addition, the present invention can provide a low-harmonic single balanced RF receiving circuit capable of reducing the chip size by minimizing the number of required components.

The problems to be solved by the present invention are not limited to the above-mentioned problems, and other problems not mentioned will be clearly understood by those skilled in the art from the following description.

A low-harmonic single-balanced RF receiving circuit according to an embodiment of the present invention includes a low-noise amplifier for low-noise amplifying an RF received signal; and a differential voltage controlled oscillator stacked at a lower end of the low noise amplifier and operating as a single-balanced subharmonic mixer and a local oscillator.

The differential voltage controlled oscillator may include switching transistors having a fixed direct current (DC) bias and cross-coupled through capacitors.

The low noise amplifier includes a pair of RF transistors; a pair of symmetrical first inductors connected to the gates of each RF transistor; a pair of second inductors connected to the source of each RF transistor (M _RF ) and symmetrical; and output resistors and intermediate frequency output terminals connected to the drain of each RF transistor M _RF .

The pair of RF transistors and the switching transistors may be connected in a cascode manner.

The low noise amplifier may further include an active load positioned between drains of the pair of RF transistors.

The low noise amplifier may include a capacitor positioned between the intermediate frequency output terminals.

A low-harmonic single balanced RF receiving circuit according to an embodiment of the present invention prevents leakage of a local oscillation signal (eg, leakage of a local oscillation signal between a local oscillator and an intermediate frequency output terminal, and/or between a local oscillator and an RF output terminal). (decrease) can. In addition, since the low-harmonic single balanced RF receiving circuit according to an embodiment of the present invention requires only one indenter for the differential voltage oscillator, the chip size can be reduced.

1 is a diagram illustrating a subharmonic single balanced RF receiving circuit according to an embodiment of the present invention.
2 is a diagram showing an equivalent circuit of a low noise amplifier constituting a low harmonic single balanced RF receiving circuit according to an embodiment of the present invention.
3 is a diagram showing IF output spectra of a conventional low-harmonic single balanced RF receiving circuit and a low-harmonic single balanced RF receiving circuit according to an embodiment of the present invention.
4 is a diagram illustrating signal swings of RF input and IF output of a conventional low-harmonic single balanced RF receiving circuit and a low-harmonic single balanced RF receiving circuit according to an embodiment of the present invention.
5 is a diagram illustrating noise performance of a conventional low-harmonic single balanced RF receiving circuit and a low-harmonic single balanced RF receiving circuit according to an embodiment of the present invention.
6 is a graph comparing performance of a conventional low-harmonic single balanced RF receiving circuit and a low-harmonic single balanced RF receiving circuit according to an embodiment of the present invention.
7 is a diagram showing a conventional low-harmonic single balanced RF receiving circuit.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. Advantages and features of the present invention, and methods of achieving them, will become clear with reference to the detailed description of the following embodiments taken in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various different forms, only these embodiments make the disclosure of the present invention complete, and common knowledge in the art to which the present invention belongs. It is provided to fully inform the holder of the scope of the invention, and the present invention is only defined by the scope of the claims. Like reference numbers designate like elements throughout the specification.

Although first, second, etc. are used to describe various elements, components and/or sections, it is needless to say that these elements, components and/or sections are not limited by these terms. These terms are only used to distinguish one element, component or section from another element, component or section. Accordingly, it goes without saying that the first element, first element, or first section referred to below may also be a second element, second element, or second section within the spirit of the present invention.

Terminology used herein is for describing the embodiments and is not intended to limit the present invention. In this specification, singular forms also include plural forms unless specifically stated otherwise in a phrase. As used in the specification, a referenced component, step, operation and/or element to "comprises" and/or "made of" refers to one or more other components, steps, operations and/or elements. Existence or additions are not excluded.

Unless otherwise defined, all terms (including technical and scientific terms) used in this specification may be used in a meaning commonly understood by those of ordinary skill in the art to which the present invention belongs. In addition, terms defined in commonly used dictionaries are not interpreted ideally or excessively unless explicitly specifically defined.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

1 is a diagram showing a low harmonic single balanced RF receiving circuit according to an embodiment of the present invention, and FIG. 2 is an equivalent circuit of a low noise amplifier constituting a low harmonic single balanced RF receiving circuit according to an embodiment of the present invention. It is a drawing showing

1 and 2, a low-harmonic single balanced RF receiving circuit 100 according to an embodiment of the present invention includes a low noise amplifier (LNA) 110 and a differential voltage controlled oscillator (voltage VCO (voltage) controlled oscillator)) (120).

The differential voltage controlled oscillator 120 may be stacked at the bottom of the low noise amplifier 110 . The differential voltage controlled oscillator 120, similar to the class C voltage controlled oscillator, has a fixed direct current (DC) bias, and the gate and drain of the switching elements M _SW cross through the capacitor 121. can be cross-coupled. The differential voltage controlled oscillator 120 may operate as a single-balanced subharmonic mixer and local oscillator. For example, the differential voltage controlled oscillator 120 may generate a local oscillation (LO) signal (or frequency) (f _LO ) based on a resonant frequency of a variable capacitor (Cvar) and the inductor 122 connected in parallel. In addition, the differential voltage controlled oscillator 120, when the RF signals V _RF+ and V _RF- are input through the low noise amplifier 110, the RF _signal ( It operates as a mixer that mixes V _RF+ , V _RF- ) and a signal twice (2f _LO ) of the local oscillation (LO) signal (f _LO ). The leakage of the double signal 2f _LO to the intermediate frequency output can be suppressed (or prevented or reduced) by a relatively small capacitor C _IF . In addition, the leakage of the local oscillation (LO) signal (f _LO ) is reduced because the switching transistors (M _SW ) are connected to the RF transistor (M _RF ) in a cascode manner to reduce the parasitic coupling between the local oscillation signal and the intermediate frequency signal. can be suppressed accordingly.

The low noise amplifier 110 may amplify the received RF signal with low noise. The low-noise amplified signal may be input to the differential voltage controlled oscillator 120 and converted into a baseband signal. A low noise amplifier 110 may be stacked on top of the differential voltage controlled oscillator 120 . The low noise amplifier 110 may be expressed as an equivalent circuit shown in FIG. 2 . Here, the size (capacitance) of the inductors (Lg, Ls) included in the low noise amplifier 110 may be selected based on simultaneous noise and input matching (SNIM) technology for matching the impedance (eg, 50 ohms) of a signal source. there is. For example, the input impedance Zin of the low noise amplifier 110 is as shown in Equation 1 below. In <Equation 1>, "g _m " is the transconductance of the transistor "M _RF ".

… … … … … <Equation 1>

SNIM for impedance matching must satisfy the condition of <Equation 2> below. In <Equation 2>, "Zopt" is the optimal noise impedance.

… … … … … <Equation 2>

The source degeneration inductor “Ls” can be approximated as shown in Equation 3 below. Assuming that "α" in <Equation 3> is less than 1, "δ/τ" is about 2, and for a short channel transistor, "|c|=0.395" and "ω _T " is It is the cutoff frequency, and may be equal to "g _m /C _gs ".

… … … … … <Equation 3>

The low noise amplifier 110 includes a pair of RF transistors (M _RF ), a pair of first inductors (Lg) connected to the gates of each RF transistor (M _RF ), and a source connected to the source of each RF transistor (M _RF ). It may include a pair of second inductors Ls, and output resistors and intermediate frequency output terminals V _IF+ and V _IF- connected to drains of each RF transistor M _RF . The pair of inductors Lg and Ls have a symmetrical structure and have a higher quality (Q) factor to improve phase noise performance.

The low noise amplifier 110 is located between the drains of a pair of RF transistors M _RF and uses an active load 111 with negative resistance to improve (enhance) the voltage conversion gain. can include more. According to another embodiment, the low noise amplifier 110 may not include an active load 111 having a negative resistance.

The low-harmonic single balanced RF receiving circuit 100 according to one embodiment of the present invention described above prevents leakage of a local oscillation signal as the switching transistor (M _SW ) is connected to the RF transistor (M _RF ) in a cascode manner. (decrease) can. In addition, the low-harmonic single balanced RF receiving circuit 100 according to one embodiment of the present invention includes only one inductor 122 as it includes one oscillator (differential VCO). Due to this, the low harmonic single balanced RF receiving circuit 100 according to one embodiment of the present invention provides a larger local oscillation swing for the same DC power consumption as compared to the low harmonic single balanced RF receiving circuit of FIG. can do. That is, as a conventional low-harmonic single balanced RF receiver circuit includes two oscillators (VCOs) each having an inductor, DC power is divided into two oscillators, resulting in a decrease in local oscillation swing. In addition, since the low-harmonic single balanced RF receiving circuit 100 according to one embodiment of the present invention includes one inductor, the overall chip size can be reduced.

Meanwhile, the present invention has been described in FIGS. 1 and 2 based on an example in which the present invention is applied to a wireless receiving circuit that converts a wireless signal into a baseband using an intermediate frequency (IF). However, the present invention can also be applied to a wireless receiving circuit that directly converts a wireless signal into a baseband signal without using an intermediate frequency.

3 is a diagram showing an IF output spectrum of a conventional low-harmonic single balanced RF receiving circuit and a low-harmonic single balanced RF receiving circuit according to an embodiment of the present invention, and FIG. 4 is a conventional low-harmonic single balanced RF receiving circuit. And a diagram showing the signal swing of the RF input and the IF output of the low-harmonic single balanced RF receiving circuit according to an embodiment of the present invention. FIG. It is a diagram showing noise performance of a low-harmonic single balanced RF receiving circuit according to an embodiment, and FIG. 6 is a conventional low-harmonic single balanced RF receiving circuit and a low-harmonic single balanced RF receiving circuit according to an embodiment of the present invention. Here is a graph comparing performance.

Referring to FIG. 3, identification code 310 is an intermediate frequency (IF) output spectrum of a conventional low-harmonic single balanced RF receiving circuit, and identification code 320 is low-harmonic single balanced RF reception according to an embodiment of the present invention. is the mid-frequency output spectrum of the circuit. Referring to the graphs of identification codes 310 and 320, the low harmonic single balanced RF receiving circuit according to an embodiment of the present invention, compared to the conventional low harmonic single balanced RF receiving circuit, a local oscillation (LO) signal (f _LO ) And it can be seen that the double signal (2f _LO ) is further suppressed. However, a subharmonic single balanced RF receiving circuit according to an embodiment of the present invention includes an intermediate frequency (IF) output. At this time, if a small capacitor (eg, C _IF in FIG. 1 ) is placed between the intermediate frequency output terminals V _IF+ and V _IF- , leakage of the double frequency 2f _LO can be easily suppressed.

Referring to FIG. 4, identification code 410 is a graph showing a signal swing between an RF input and an IF output when an RF input signal of 60 dBm is input to a conventional low-harmonic single balanced RF receiving circuit, and identification code 420 is this It is a graph showing the signal swing between the RF input and the IF output when an RF input signal of 60 dBm is input to the low-harmonic single balanced RF receiving circuit according to an embodiment of the present invention.

Comparing the graphs of the identification code 410 and the identification code 420, the signal swing of the low harmonic single balanced RF receiving circuit according to an embodiment of the present invention is larger than that of the conventional low harmonic single balanced RF receiving circuit (in the identification code 420). It can be seen that the amplitudes of the graphs 421 and 422 representing the IF output are large) and clean (line width of the graphs 421 and 422 representing the IF output is thin at identification code 420). This is because the low-harmonic single balanced RF receiving circuit according to an embodiment of the present invention has cascode-like transistors (RF transistor M _RF ) and switching transistors ( This is because it has low local oscillation leakage (eg, leakage of a local oscillation signal between the local oscillator and the intermediate frequency output terminal and/or between the local oscillator and the RF output terminal) as the M _SW )) is connected.

Referring to FIG. 5, identification code 510 is a graph showing phase noise performance of a conventional low-harmonic single balanced RF receiving circuit and a low-harmonic single balanced RF receiving circuit according to an embodiment of the present invention. It is a graph showing a double sideband (DSB) noise figure for a low-harmonic single balanced RF receiving circuit and a low-harmonic single balanced RF receiving circuit according to an embodiment of the present invention.

First, referring to the graph of identification code 510, it can be seen that the low harmonic single balanced RF receiving circuit according to an embodiment of the present invention has improved phase noise performance by about 5 dB compared to the conventional low harmonic single balanced RF receiving circuit. there is. For example, the phase noise of a conventional low-harmonic single balanced RF receiving circuit is -57 dBc/Hz, -82 dBc/Hz, and -104.5 dBc/Hz at 10 kHz, 100 kHz, and 1 MHz, respectively, and the present invention The phase noise of the low-harmonic single balanced RF receiving circuit according to an embodiment of is -62 dBc / Hz, -87 dBc / Hz, and -109 dBc / Hz at 10 kHz, 100 kHz, and 1 MHz, respectively.

Next, referring to the graph of identification code 520, the double sideband noise figure of the conventional subharmonic single balanced RF receiving circuit is 14.5 dB at an offset frequency of 1 MHz, and the low harmonic single balanced RF according to an embodiment of the present invention The double sideband noise figure of the receive circuit is 9.5 dB at 1 MHz offset frequency with active load and 8.9 dB at 1 MHz offset frequency without active load.

Referring to FIG. 6, the low-harmonic single balanced RF receiving circuit according to an embodiment of the present invention has direct current power consumption (P _DC ) and swing (LO Swing) of the local oscillation signal compared to the conventional low-harmonic single balanced RF receiving circuit. ), phase noise (PN), double sideband noise figure (DSB NF), and voltage conversion gain (Voltage gain) are improved. On the other hand, it can be seen that the low-harmonic single balanced RF receiving circuit according to an embodiment of the present invention has a slightly reduced double-sideband noise figure when an active load is present, but a greatly improved voltage conversion gain.

The low-harmonic single balanced RF receiving circuit according to an embodiment of the present invention described above is integrated into one block and operates with low power, thereby converting an RF signal into a baseband signal through an intermediate frequency or RF It can be applied to various wireless communication devices (e.g., smart phones, wireless LANs, GPS, satellite communication receivers, medical devices, set-top boxes, etc.) can

Although the embodiments of the present invention have been described with reference to the accompanying drawings, those skilled in the art can realize that the present invention can be implemented in other specific forms without changing the technical spirit or essential features. you will be able to understand Therefore, the embodiments described above should be understood as illustrative in all respects and not limiting.

100: subharmonic single balanced RF receiving circuit
110: low noise amplifier
111: active load
120: differential voltage controlled oscillator

Claims (6)

In a subhaminic single-balanced radio frequency (RF) receiver circuit,
a low-noise amplifier for low-noise amplifying the RF received signal; and
Stacked at the bottom of the low noise amplifier and comprising a single-balanced subharmonic mixer and a differential voltage controlled oscillator operating as a local oscillator Subharmonic single balanced RF receiving circuit.
According to claim 1,
The differential voltage controlled oscillator is
A low-harmonic single-balanced RF receiver circuit comprising switching transistors having a fixed direct current (DC) bias and cross-coupled through capacitors.
According to claim 2,
The low noise amplifier
a pair of RF transistors;
a pair of symmetrical first inductors connected to the gates of each RF transistor;
a pair of second inductors connected to the source of each RF transistor (M _RF ) and symmetrical; and
A low-harmonic single-balanced RF receiving circuit comprising an output resistor connected to a drain of each RF transistor (M _RF ) and intermediate frequency output stages.
According to claim 3,
The pair of RF transistors and the switching transistors are connected in a cascode manner.
According to claim 3,
The low noise amplifier
Low harmonic single balanced RF receiving circuit, characterized in that it further comprises an active load (active load) located between the drains of the pair of RF transistors.
According to claim 3,
The low noise amplifier
A low-harmonic single balanced RF receiver circuit, characterized in that it comprises a capacitor located between the intermediate frequency output stages.