KR102559658B1 - Scheduling method and apparatus thereof - Google Patents

Abstract

A scheduling method and apparatus are provided. The scheduling method according to the present disclosure includes determining a minimum processing time required to process a plurality of components included in the deep learning model for each accelerator node, determining energy consumption consumed for processing the plurality of components in each accelerator node based on the minimum processing time, determining maximum allocated data that can be processed by each accelerator node based on the minimum processing time and a preset processing limit time, and determining energy cost efficiency of each accelerator node based on the consumed energy and the maximum allocated data. and selecting at least one accelerator node from among the accelerator nodes to allocate input data by comparing the energy cost efficiency of each accelerator node with each other.

Description

Scheduling method and apparatus {SCHEDULING METHOD AND APPARATUS THEREOF}

The present disclosure relates to a scheduling method and apparatus.

A high-performance computing environment is a computing environment that enables high-complexity processing of large-scale data. Recently, clusters supporting accelerators such as GPUs and FPGAs are being utilized for large-scale deep learning processing. In the past, a cluster of a homogeneous computing environment was mainly used, but the use of a cluster of a heterogeneous computing environment to which heterogeneous accelerators such as GPUs and FPGAs are applied is increasing.

A heterogeneous accelerator-supported high-performance computing environment refers to a cluster environment composed of accelerators suitable for processing deep learning models such as GPUs and FPGAs as well as CPUs. Because deep learning models have high complexity instead of showing innovative accuracy in data analysis, the processing speed is slow with general-purpose computing performance at the CPU level, so it is common to use heterogeneous accelerators such as FPGAs and GPUs for fast processing.

Scheduling technology is a technology that plans and executes a given task in advance according to a specific goal in a given computing environment. A fixed schedule is sometimes used in a fixed environment, but it is effective to apply adaptive scheduling accordingly because the system environment that is usually applied dynamically changes. Such adaptive scheduling is aimed at minimizing processing cost while satisfying a given processing time limit.

An object of some embodiments of the present disclosure is to provide a scheduling method and apparatus for accelerating processing of multiple requests for a deep learning model by sequentially distributing each internal component processing task to computing resources of an accelerator node in consideration of a high-performance computing environment supporting heterogeneous accelerators.

As a technical means for achieving the above-described technical problem, a first aspect of the present disclosure is an operation of determining a minimum processing time required to process a plurality of components included in a deep learning model for each accelerator node, an operation of determining consumption energy consumed to process the plurality of components in each accelerator node based on the minimum processing time, an operation of determining maximum allocation data that can be processed by each accelerator node based on the minimum processing time and a preset processing limit time, and based on the consumed energy and the maximum allocation data An operation of determining the energy cost efficiency of each accelerator node and an operation of comparing the energy cost efficiency of each accelerator node with each other to select at least one accelerator node to which input data is allocated among the respective accelerator nodes. A scheduling method may be provided.

The operation of determining the minimum processing time required to process the plurality of components included in the deep learning model for each accelerator node is the operation of determining the processing time per accelerator for each component so that the time required for the plurality of accelerators included in each accelerator node to process each component is the same for each accelerator, the operation of determining the processing time per accelerator for each component as the minimum processing time for each component, and the minimum processing time required to process the plurality of components by adding all the minimum processing times for each component It may include an operation to determine.

The processing time for each accelerator for each component includes a data processing time and may include at least one of an input data transmission time and an output data transmission time.

The operation of determining the energy consumption consumed for processing the plurality of components in each accelerator node based on the minimum processing time, the operation of determining the energy consumption of the CPU included in each accelerator node based on the active power and idle power of the CPU included in each accelerator node, the pre-processing time of the CPU, and the minimum processing time required to process the plurality of components, and the active power and idle power of each accelerator included in each accelerator node, and the processing time for each accelerator for each component. An operation of determining consumed energy of a plurality of accelerators included in the accelerator node may be included.

The operation of comparing the energy cost efficiency of each accelerator node with each other and selecting at least one accelerator node from among the accelerator nodes to which input data is to be allocated may include sequentially selecting an accelerator node having a low energy cost efficiency among the accelerator nodes so as to process all of the input data within the predetermined processing time limit.

In addition, a second aspect of the present disclosure includes a memory and at least one processor, wherein the at least one processor determines a minimum processing time required to process a plurality of components included in a deep learning model for each accelerator node, determines consumption energy consumed to process the plurality of components at each accelerator node based on the minimum processing time, determines maximum allocation data that can be processed at each accelerator node based on the minimum processing time and a preset processing limit time, and determines the consumed energy and the maximum allocation data Based on this, the energy cost efficiency of each accelerator node is determined, and the energy cost efficiency of each accelerator node is compared with each other to select at least one accelerator node from among the accelerator nodes to which input data is allocated. A scheduling device may be provided.

A computer-readable recording medium recording a program for executing a scheduling method on a computer, which includes determining energy, determining maximum allocation data that can be processed by each accelerator node based on the minimum processing time and a predetermined processing time limit, determining energy cost efficiency of each accelerator node based on the consumed energy and the maximum allocation data, and selecting at least one accelerator node among the accelerator nodes to which input data is to be allocated by comparing the energy cost efficiency of each accelerator node with each other.

In addition, in a third aspect of the present disclosure, an operation of determining a minimum processing time required to process a plurality of components included in the deep learning model for each accelerator node, an operation of determining energy consumption consumed for processing the plurality of components in each accelerator node based on the minimum processing time, an operation of determining maximum allocation data that can be processed by each accelerator node based on the minimum processing time and a predetermined processing limit time, and energy cost efficiency of each accelerator node based on the consumed energy and the maximum allocation data A computer readable recording medium containing instructions for causing a processor to perform a scheduling method including an operation of determining, and an operation of selecting at least one accelerator node to allocate input data among the accelerator nodes by comparing the energy cost efficiency of each accelerator node with each other. A computer readable recording medium may be provided.

In addition, in a fourth aspect of the present disclosure, an operation of determining a minimum processing time required to process a plurality of components included in the deep learning model for each accelerator node, an operation of determining energy consumption consumed for processing the plurality of components in each accelerator node based on the minimum processing time, an operation of determining maximum allocation data that can be processed by each accelerator node based on the minimum processing time and a preset processing limit time, and energy cost efficiency of each accelerator node based on the consumed energy and the maximum allocation data A computer program including instructions for causing a processor to perform a scheduling method including an operation of determining and an operation of selecting at least one accelerator node to which input data is to be allocated among the respective accelerator nodes by comparing the energy cost efficiency of each accelerator node with each other.

According to the present disclosure, in consideration of a high-performance computing environment supporting heterogeneous accelerators, a scheduling method and apparatus for accelerating processing of multiple requests for a deep learning model by sequentially distributing processing tasks of each internal component to computing resources of an accelerator node. There is an effect that can be provided.

1 is a conceptual diagram illustrating a method in which a scheduling apparatus allocates input data to each accelerator node according to some embodiments.
2 is a flowchart illustrating a scheduling method according to some embodiments.
3 is a diagram showing speed and time at which an accelerator node processes a component included in a deep learning model according to some embodiments.
4 is a diagram illustrating consumed energy consumed when an accelerator node processes a component included in a deep learning model according to some embodiments.
5 is a block diagram illustrating a configuration of a scheduling device according to some embodiments.

Hereinafter, embodiments of the present disclosure will be described in detail so that those skilled in the art can easily practice them with reference to the accompanying drawings. However, the present disclosure may be embodied in many different forms and is not limited to the embodiments described herein. And in order to clearly describe the present disclosure in the drawings, parts irrelevant to the description are omitted, and similar reference numerals are attached to similar parts throughout the specification.

Throughout the specification, when a part is said to be “connected” to another part, this includes not only the case where it is “directly connected” but also the case where it is “electrically connected” with another element interposed therebetween. In addition, when a part "includes" a certain component, it means that it may further include other components without excluding other components unless otherwise stated.

Hereinafter, the present disclosure will be described in detail with reference to the accompanying drawings.

1 is a conceptual diagram illustrating a method in which a scheduling apparatus allocates input data to each accelerator node according to some embodiments.

Referring to FIG. 1 , each request for a deep learning model according to some embodiments is given as input data, and the scheduling device 10 uses M accelerator nodes to process the total input data D for a plurality of requests in the deep learning model [S ₁ , . . . ,S _i ,... , S _M ] may be used.

Each accelerator node included in the heterogeneous accelerator cluster 12 may include at least one accelerator. The scheduling device 10 according to some embodiments uses an accelerator node allocation strategy X=[x ₁ , . . . ] to allocate the total input data D to each accelerator node. ,x _i ,... ,x _M ] can be used. At this time, x _i ={0,1} indicates whether data is allocated to the accelerator node Si. According to the accelerator node allocation strategy X, each accelerator node allocates data [D ₁ ,… ,D _i ,... , D _M ] may be assigned.

A deep learning model according to some embodiments has a plurality of components [DL ₁ , . . . ,DL _k ,… ,DL _K ]. The 0th component, DL ₀ , which is a preprocessing task before the execution of the deep learning model, can be processed by the CPU of each accelerator node. Afterwards, the plurality of components constituting the deep learning model can be sequentially processed in each accelerator node.

Assignment data D _i given to accelerator node Si is input to component DL ₀ . In the present disclosure, input data of component DL _k is defined as D _k ⁱ , output data is defined as D^ _k ⁱ , and D _i input to component DL ₀ can be denoted as D ₀ ⁱ . When the allocation data D _i and the structure of the deep learning model are determined, D _k ⁱ /D^ _k ⁱ has a fixed value.

In the present disclosure, the allocation data D _i processing time pt ⁱ of the accelerator node Si may be defined as the following equation.

[Equation 1]

In Equation 1, pt ₀ ⁱ is the time required for pre-processing of the deep learning model for D ₀ ^{i in} the CPU _of accelerator node _{S i} , which is the i-th accelerator node, and pt _K ⁱ is the i-th accelerator _node .

2 is a flowchart illustrating a scheduling method according to some embodiments.

Referring to FIG. 2 , in step S201, the scheduling device 10 may determine a minimum processing time required to process a plurality of components included in the deep learning model for each accelerator node.

According to some embodiments, the scheduling device 10 may determine the processing time for each accelerator for the component such that the time required for a plurality of accelerators included in each accelerator node to process each component is the same for each accelerator. In this case, the scheduling apparatus 10 may determine the processing time for each accelerator for each component as the minimum processing time for each component.

When the minimum processing time for each component is determined, the scheduling device 10 may add up all minimum processing times for each component to determine the minimum processing time required to process a plurality of components.

A specific method for determining the minimum processing time required for the scheduling device 10 to process a plurality of components included in the deep learning model for each accelerator node according to some embodiments will be described later with reference to FIG. 3 .

When the minimum processing time required to process the plurality of components is determined, in step S202, the scheduling device 10 may determine consumed energy consumed in processing the plurality of components at each accelerator node based on the minimum processing time.

According to some embodiments, the scheduling device 10 may determine the consumed energy consumed by the CPU of each accelerator node based on the active power and idle power of the CPU included in each accelerator node, the preprocessing time of the CPU, and the minimum processing time required to process the plurality of components.

Similarly, the scheduling device 10 consumes energy consumed in a plurality of accelerators included in each accelerator node based on the active power and idle power of each accelerator included in each accelerator node, and the processing time of each accelerator for each component. Energy consumption can be determined.

When the consumed energy consumed by the CPU and the consumed energy consumed by the plurality of accelerators are determined, the scheduling apparatus 10 sums up the consumed energy consumed by the CPU and the consumed energy consumed by the plurality of accelerators to determine the consumed energy consumed in processing the plurality of components at each accelerator node.

A method of determining consumed energy consumed in processing a plurality of components in each accelerator node based on a minimum processing time by the scheduling apparatus 10 according to some embodiments will be described later with reference to FIG. 4 .

When the consumed energy consumed to process the plurality of components in each accelerator node is determined, in step S203, the scheduling device 10 can determine the maximum allocated data that can be processed in each accelerator node based on the minimum processing time and the predetermined processing limit time.

When the maximum allocation data that can be processed by each accelerator node is determined, in step S204, the scheduling device 10 may determine the energy cost efficiency of each accelerator node based on the consumed energy and the maximum allocation data.

When the energy cost efficiency of each accelerator node is determined, in step S205, the scheduling device 10 compares the energy cost efficiency of each accelerator node with each other and selects at least one accelerator node from among the accelerator nodes to which input data is allocated.

According to some embodiments, the scheduling device 10 may sequentially select an accelerator node having a low energy cost efficiency among accelerator nodes so as to process all input data within a predetermined processing time limit.

3 is a diagram showing speed and time at which an accelerator node processes a component included in a deep learning model according to some embodiments.

Upon receiving the allocation data Di, the accelerator node Si sequentially processes a plurality of components included in the deep learning model. The scheduling apparatus 10 distributes D _k ⁱ given to the processing of component DL _k to be processed by N _i accelerators. In the present disclosure, the data distributed to N _i accelerators at the accelerator node Si [D _k ^i,1 ,... ,D _k ^i,j ,... ,D _k ^i,Ni ]. At this time, = satisfies

In the present disclosure, throughput for a plurality of components (DL ₁ to DL _K ) of N _i accelerators is [TH _k ^i,1 ,... ,TH _k ^i,j ,... ,TH _k ^i,Ni ]. At this time, the data allocated to each of the N _i accelerators [D _k ^i,1 ,... ,D _k ^i,j ,... ,D _k ^i,Ni ] processing time [cl _k ^i,1 ,… ,cl _k ^i,j ,... ,cl _k ^i,Ni ] can be calculated as follows.

[Equation 2]

[ ],

As described above, pt _K ⁱ is the time required to process the component DL _k of the deep learning model for D _k ⁱ at the k-th accelerator of the i-th accelerator node, accelerator node S _i . At this time, pt _K ⁱ can be calculated in detail as in the following equation.

[Equation 3]

According to Equation 3, when the accelerator node S _i processes the input data D _k ⁱ for the component DL _k , the processing time is defined as the sum of the input data transfer time ti _k ⁱ , the data processing time cl _k ⁱ , and the output data transfer time to _k ⁱ .

Assuming that the PCI express bandwidth BW _pci between the main memory of the accelerator node S _i and the global memory of the accelerator is significantly higher than the throughput of each accelerator, the pt _K ⁱ of the accelerator node S _i for the input data D _k ⁱ and the component DL _k can be approximated as cl _k ⁱ as shown in the following equation.

[Equation 4]

Data distributed to each accelerator [D _k ^i,1 ,… ,D _k ^i,j ,... ,D _k ^i,Ni ], the data processing time cl _k ⁱ may be determined as the largest value among the processing times cl _k ^i,j of each accelerator. According to some embodiments, the distributed data [D _k ^i,1 ,... ,D _k ^i,j ,... ,D _k ^i,Ni ], when the processing time of each accelerator is equal to each other, the minimum execution time pt _K ^*i can be achieved.

The minimum execution time pt _K ^*i of the accelerator node S _i for the input data D _k ⁱ and the component DL _k can be derived as in the following equation.

[Equation 5]

4 is a diagram illustrating consumed energy consumed when an accelerator node processes a component included in a deep learning model according to some embodiments.

The energy consumption E _i consumed by the accelerator node _Si to process the plurality of components of the deep learning model is the sum of CPU active energy, CPU idle energy, and GPU effective energy consumption (GPU idle energy is relatively small and can be ignored), and can be calculated as in the following equation.

[Equation 6]

In Equation 6, P _act ^i,0 is the CPU's active power for preprocessing (i.e., input image batching and decoding) at the accelerator node S _i , P _idl ^i,0 is idle CPU power for operations other than preprocessing at the accelerator node S _i , and P _k,act ^i,j≠0 is the active power of the jth accelerator for processing the component DL _k at the accelerator node S _i .

pt ₀ ⁱ is the CPU pre-processing time required to perform pre-processing at _accelerator node S _i , pt _k ⁱ is the total processing time required to process component DL _k at accelerator node S _i , and cl _k ^i,j is the processing time of the j-th accelerator required to process component DL _k at accelerator node S i.

The goal of the scheduling device 10 of the present disclosure is to achieve minimum energy cost while satisfying a service level target in processing a deep learning model for total input data D. The scheduling apparatus 10 according to some embodiments defines a service level target as a processing deadline (Deadline), and is denoted as L ^Inf in the present disclosure.

The allocated data Di having the maximum amount of data that the accelerator node S _i can process within the processing time limit L ^Inf can be calculated as follows.

[Equation 7]

In Equation 7, D _i =D ₀ ⁱ , and the input D _k ⁱ for the component DL _k of the deep learning model is D _k ⁱ =σ _k *D ⁱ using σ _k , which is the unit data amount of the component DL _k per input data in the fixed structure of the deep learning model.

A scheduling device according to some other embodiments has an accelerator node allocation strategy for X=[x ₁ , . . . ,x _i ,... ,x _M ], the following objective function with the decision variable set to X based on the Optimal Problem method can be used.

[Equation 8]

However, since the use of the objective function may present a problem related to NP-hard (Non-deterministic Polynomial-time hard), the scheduling device 10 according to some embodiments uses a heuristic algorithm to find a suboptimal solution and uses an accelerator node allocation strategy X=[x ₁ ,... ,x _i ,... , x _M ] can reduce the computational complexity used in the determination.

The scheduling apparatus 10 using a heuristic algorithm may calculate energy cost efficiency for all accelerator nodes as follows.

[Equation 9]

, where

As described above through Equation 7, the allocated data Di in Equation 9 may consist of the maximum amount of data that the accelerator node S _i can process within the processing time limit L ^Inf . The ratio of the energy consumption E _i consumed by the accelerator node S _i to process the plurality of components of the deep learning model and the allocated data Di corresponds to the energy cost efficiency of the accelerator node S _i .

The scheduling device 10 according to some embodiments may sequentially select at least one accelerator node from an accelerator node having low energy cost efficiency among accelerator nodes included in the heterogeneous accelerator cluster 12 under the condition that all input data can be processed within a predetermined processing time limit. In this case, the scheduling device 10 may allocate input data only to the selected accelerator node to accelerate processing of multiple requests for the deep learning model.

5 is a block diagram illustrating a configuration of a scheduling device according to some embodiments.

Referring to FIG. 5 , a scheduling device 10 according to some embodiments may include a memory 101 and a processor 103 .

The memory 101 may store a program for controlling the operation of the scheduling device 10 . The memory 101 may include at least one instruction for controlling the operation of the scheduling device 10 . Programs stored in the memory 101 may be classified into a plurality of modules according to their functions.

The memory 101 according to some embodiments may store information about a deep learning model, an accelerator node allocation strategy, input data, and allocation data.

The memory 101 may include, for example, a flash memory type, a hard disk type, a multimedia card micro type, a card type memory (eg SD or XD memory, etc.), RAM (Random Access Memory), SRAM (Static Random Access Memory), ROM (Read-Only Memory), EEPROM (Electrically Erasable Programmable Read-Only Memory), PROM (Programmable Read-Only Memory) Memory), a magnetic memory, a magnetic disk, and an optical disk, but may include at least one type of storage medium, but is not limited thereto.

The processor 103 may control overall operations of the scheduling device 10 by executing programs stored in the memory 101 .

The processor 103 according to some embodiments may determine a minimum processing time required to process a plurality of components included in the deep learning model for each accelerator node.

According to some embodiments, the processor 103 may determine a processing time for each accelerator for each component so that a plurality of accelerators included in each accelerator node take the same time to process each component. The processor 103 may determine the processing time for each accelerator as the minimum processing time for each component, and sum the minimum processing times for each component to determine the minimum processing time required to process the plurality of components.

The processor 103 according to some embodiments may determine consumed energy consumed to process the plurality of components at each accelerator node based on a minimum processing time.

The processor 103 according to some embodiments may determine energy consumption of a CPU included in each accelerator node based on active power and idle power of a CPU included in each accelerator node, a preprocessing time of the CPU, and a minimum processing time required to process a plurality of components. The processor 103 may determine energy consumption of a plurality of accelerators included in each accelerator node based on active power and idle power of each accelerator included in each accelerator node, and processing time for each accelerator for each component. The processor 103 may determine consumed energy consumed in processing a plurality of components in each accelerator node by summing the consumed energy of the CPU included in each accelerator node and the consumed energy of the plurality of accelerators.

The processor 103 according to some embodiments determines the maximum allocated data that can be processed by each accelerator node based on the minimum processing time and the predetermined processing time limit, and determines the energy cost efficiency of each accelerator node based on the consumed energy and the maximum allocated data.

The processor 103 according to some embodiments may select at least one accelerator node to allocate input data from among accelerator nodes by comparing energy cost efficiency of each accelerator node with each other.

The processor 103 according to some embodiments may select at least one accelerator node to which input data is allocated among accelerator nodes by sequentially selecting an accelerator node having a low energy cost efficiency among accelerator nodes so as to process all of the input data within a predetermined processing time limit.

The processor 103 according to some embodiments may, for example, perform artificial intelligence calculations. The processor 103 may be, for example, any one of a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), a Neural Processing Unit (NPU), a Field Programmable Gate Array (FPGA), and an application specific integrated circuit (ASIC), but is not limited thereto.

Some embodiments may be implemented in the form of a recording medium including instructions executable by a computer, such as program modules executed by a computer. Computer readable media can be any available media that can be accessed by a computer and includes both volatile and nonvolatile media, removable and non-removable media.

Also, computer readable media may include computer storage media. Computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data.

The description of the present disclosure described above is for illustrative purposes, and those skilled in the art to which the present disclosure pertains can easily be modified into other specific forms without changing the technical spirit or essential features of the present disclosure. It will be appreciated. Therefore, the embodiments described above should be understood as illustrative in all respects and not limiting. For example, each component described as a single type may be implemented in a distributed manner, and similarly, components described as distributed may be implemented in a combined form.

The scope of the present disclosure is indicated by the claims to be described later rather than the detailed description above, and all changes or modifications derived from the meaning and scope of the claims and equivalent concepts thereof should be construed as being included in the scope of the present disclosure.

10: scheduling device
12: heterogeneous accelerator cluster

Claims (12)

A scheduling method for distributing input data to a plurality of accelerator nodes each including a deep learning model composed of a plurality of components by a scheduling device,
determining a minimum processing time required to process the plurality of components at each accelerator node;
determining consumed energy consumed in processing the plurality of components at each accelerator node based on the minimum processing time;
determining maximum allocated data that can be processed by each accelerator node based on the minimum processing time and a predetermined processing time limit;
Determining energy cost efficiency of each accelerator node based on the consumed energy and the maximum allocation data; and
and comparing the energy cost efficiency of each accelerator node with each other and selecting at least one accelerator node from among the accelerator nodes to which the input data is allocated. According to claim 1,
The operation of determining the minimum processing time required to process the plurality of components,
determining a processing time for each accelerator for each component such that a time required for each of the plurality of accelerators included in each accelerator node to process each component is equal to each other; and
Determining the processing time for each accelerator for each component as the minimum processing time for each component: and
and determining the minimum processing time by summing up the minimum processing times of the respective components. According to claim 2,
The processing time for each accelerator for each component,
A scheduling method comprising at least one of data processing time, input data transmission time, and output data transmission time. According to claim 2,
The operation of determining the consumed energy consumed in processing the plurality of components,
determining energy consumption of the CPU based on active power and idle power of the CPU included in each accelerator node, a preprocessing time of the CPU, and the minimum processing time; and
and determining consumed energy of the plurality of accelerators based on active power and idle power for each accelerator of each accelerator node and processing time for each accelerator. According to claim 1,
The operation of selecting at least one accelerator node to which the input data is to be allocated,
The scheduling method of sequentially selecting an accelerator node having a low energy cost efficiency among the accelerator nodes so as to process all of the input data within the predetermined processing time limit. A scheduling device for distributing input data to a plurality of accelerator nodes each including a deep learning model composed of a plurality of components,
Memory; and
at least one processor;
the at least one processor
Determining a minimum processing time required to process the plurality of components at each accelerator node, determining energy consumption consumed for processing the plurality of components at each accelerator node based on the minimum processing time, determining maximum allocation data that can be processed at each accelerator node based on the minimum processing time and a predetermined processing time limit, determining energy cost efficiency of each accelerator node based on the consumed energy and the maximum allocation data, and comparing the energy cost efficiency of each accelerator node with each other to determine the energy cost efficiency of each accelerator node. Scheduling apparatus for selecting at least one accelerator node to allocate the input data among the nodes. According to claim 6,
The at least one processor,
A scheduling device that determines a processing time per accelerator for each component so that the time required for each of the plurality of accelerators included in each accelerator node to process each component is the same, determines the processing time per accelerator for each component as the minimum processing time for each component, and sums the minimum processing times of each component to determine the minimum processing time. According to claim 7,
The processing time for each accelerator for each component,
A scheduling device including at least one of data processing time, input data transmission time, and output data transmission time. According to claim 7,
The at least one processor,
The scheduling device determines energy consumption of the CPU based on active power and idle power of the CPU included in each accelerator node, preprocessing time of the CPU, and the minimum processing time, determines energy consumption of the plurality of accelerators based on active power and idle power of each accelerator of each accelerator node, and processing time of each accelerator, and determines energy consumption consumed to process the plurality of components. According to claim 6,
The at least one processor,
Scheduling device for selecting at least one accelerator node to allocate the input data among the accelerator nodes by sequentially selecting an accelerator node having a low energy cost efficiency among the accelerator nodes so as to process all the input data within the predetermined processing time limit. A computer-readable recording medium storing a computer program,
The computer program,
determining a minimum processing time required to process the plurality of components at each of a plurality of accelerator nodes each of which includes a deep learning model composed of the plurality of components;
determining consumed energy consumed in processing the plurality of components at each accelerator node based on the minimum processing time;
determining maximum allocated data that can be processed by each accelerator node based on the minimum processing time and a predetermined processing time limit;
Determining energy cost efficiency of each accelerator node based on the consumed energy and the maximum allocation data; and
Instructions for causing a processor to perform a scheduling method comprising an operation of comparing the energy cost efficiency of each accelerator node with each other and selecting at least one accelerator node to allocate input data from among the accelerator nodes A computer readable recording medium storing a computer program. As a computer program stored on a computer-readable recording medium,
The computer program,
determining a minimum processing time required to process the plurality of components at each of a plurality of accelerator nodes each of which includes a deep learning model composed of the plurality of components;
determining consumed energy consumed in processing the plurality of components at each accelerator node based on the minimum processing time;
determining maximum allocated data that can be processed by each accelerator node based on the minimum processing time and a predetermined processing time limit;
Determining energy cost efficiency of each accelerator node based on the consumed energy and the maximum allocation data; and
A computer program comprising instructions for causing a processor to perform a scheduling method comprising an operation of comparing the energy cost efficiency of each accelerator node with each other and selecting at least one accelerator node to allocate input data from among the accelerator nodes.

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