KR102558699B1 - Micro led display device whitout bezel - Google Patents

Abstract

The present invention relates to a micro LED (Light Emitting Device) display device capable of minimizing a bezel, and is composed of a substrate on which thin film transistors are disposed, a plurality of micro LEDs (Light Emitting Devices) provided on the upper surface of the substrate, a plurality of canal-shaped grooves formed on at least one of the side surface or rear surface of the substrate, and link lines formed inside the grooves and on the upper surface of the substrate.

Description

Bezel-less micro LED display {MICRO LED DISPLAY DEVICE WHITOUT BEZEL}

The present invention relates to a micro LED display device capable of minimizing a bezel.

Since organic electroluminescent devices using poly(p-phenylinvinyline) (PPV), which is one of the conjugate polymers, have been developed, research on organic materials such as conductive conjugated polymers has been actively conducted. Research on the application of these organic materials to thin film transistors, sensors, lasers, photoelectric devices, etc. is still being conducted, and among them, research on organic light emitting display devices is being actively conducted.

In the case of an electroluminescent device made of inorganic materials of the phosphors system, an operating voltage of 200 V or more is required, and since the manufacturing process of the device is performed by vacuum deposition, it is difficult to increase the size and especially difficult to emit blue light, and the manufacturing cost is high. However, electroluminescent devices made of organic materials are in the limelight as a next-generation display device due to their excellent luminous efficiency, ease of large-area display, simplicity of process, and especially the ability to easily obtain blue light emission, as well as the possibility of developing bendable electroluminescent devices.

Currently, an active matrix organic light emitting display having an active driving element in each pixel, like a liquid crystal display, is being actively researched as a flat panel display.

However, such an organic light emitting display device has the following problems.

In general, an organic light emitting display device deposits an organic light emitting layer on a substrate using a fine metal shadow mask. However, a process using such a metal shadow mask has limitations in forming a large-area organic light emitting display device. In addition, in the case of a high-resolution display device, a metal shadow mask must be manufactured in high resolution, but there are limitations in manufacturing the metal shadow mask.

In order to solve this problem, an organic light emitting display device combining a white light emitting device and a color filter has been proposed. Such a white organic light emitting display device has advantages in that the amount of organic materials used is small, the processing time is short, the yield is high, and the cost is reduced. However, in the white organic light emitting display device, luminance and color purity are deteriorated due to light absorption by the color filter. In addition, there are still limitations in manufacturing a large-area display device.

The present invention has been made in view of the above points, and an object of the present invention is to provide a micro LED display device capable of minimizing a bezel area.

Another object of the present invention is to provide a micro LED display device that can be manufactured using a single substrate.

In order to achieve the above object, a microLED display panel according to the present invention is composed of a substrate on which thin film transistors are disposed, a plurality of micro LEDs (Light Emitting Devices) provided on the upper surface of the substrate, a plurality of canal-shaped grooves formed on at least one of the side surface or rear surface of the substrate, and link lines formed inside the grooves and on the upper surface of the substrate.

A buried layer covering the link line is provided inside the groove, and a signal module is provided on the lower surface of the substrate to apply a signal to the microLED through the link line.

In addition, the tiling micro LED display device according to the present invention is configured by tiling a plurality of micro LED display panels having the above structure, and substrate side surfaces of the adjacent micro LED display panels are disposed at intervals of assembly tolerances.

In the micro LED display device of the present invention, since the link line is disposed on the side of the substrate to connect the pad on the upper surface of the substrate and the signal module on the rear surface of the substrate, space for arranging a connection means such as FPCB is unnecessary, and the bezel can be greatly reduced. Furthermore, in the present invention, a bezel can be further reduced by forming a plurality of grooves on the back and side surfaces of the substrate and forming link lines in the grooves.

In addition, in the present invention, since the link line is formed inside the groove formed on the back surface of the substrate, even when the back surface is placed on a process table during the photo-etching process of the upper surface of the substrate, defects due to contact with the fixed table do not occur. Moreover, since the buried layer is provided inside the groove, defects due to deposition or etching during the upper surface process can be prevented. As a result, in the present invention, thin film transistors and circuit modules can be provided on the upper and lower surfaces of a single substrate, so that manufacturing costs can be reduced and weight and volume can be reduced.

1 is a perspective view schematically illustrating a micro LED display device according to the present invention;
Figure 2 is a cross-sectional view showing the structure of a micro LED display device according to the present invention in detail.
3 is a cross-sectional view showing the structure of the microLED shown in FIG. 2;
Figure 4 is a partial perspective view showing the rear and side of the micro LED display device according to the present invention.
5A and 5B are a perspective view and a cross-sectional view of area A of FIG. 4, respectively.
6a and 6b are a perspective view and a cross-sectional view of region B of FIG. 4, respectively.
7 is a perspective view schematically illustrating a tiling micro LED display device composed of a plurality of micro LED display panels;
8 is a partial cross-sectional view of a micro LED display panel having a structure in which grooves are not formed on the side and rear surfaces of a substrate.
9A is a view showing a structure in which a micro LED display panel having a structure in which grooves are not formed on the side and rear surfaces of a substrate is tiled;
9B is a diagram showing a tiled structure of a microLED display panel according to the present invention.
10 is a flowchart showing a method of manufacturing a micro LED display device according to the present invention.

Advantages and features of the present invention, and methods of achieving them, will become clear with reference to the detailed description of the following embodiments taken in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various different forms, and only the present embodiments make the disclosure of the present invention complete, and those skilled in the art are provided to fully inform the scope of the invention, and the present invention is only defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are illustrative, so the present invention is not limited to the details shown. Like reference numbers designate like elements throughout the specification. In addition, in describing the present invention, if it is determined that a detailed description of related known technologies may unnecessarily obscure the subject matter of the present invention, the detailed description will be omitted. When 'includes', 'has', 'consists of', etc. mentioned in this specification is used, other parts may be added unless 'only' is used. In the case where a component is expressed in the singular, the case including the plural is included unless otherwise explicitly stated.

In interpreting the components, even if there is no separate explicit description, it is interpreted as including the error range.

In the case of a description of a positional relationship, for example, when the positional relationship of two parts is described as 'on ~', 'upon ~', 'on ~ below', 'next to', etc., one or more other parts may be located between the two parts unless 'directly' or 'directly' is used.

In the case of a description of a temporal relationship, for example, when a temporal precedence relationship is described with 'after', 'after', 'after', 'before', etc., it may include non-continuous cases unless 'immediately' or 'directly' is used.

Although first, second, etc. are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from another. Therefore, the first component mentioned below may also be the second component within the technical spirit of the present invention.

Each feature of the various embodiments of the present invention can be partially or entirely combined or combined with each other, technically various interlocking and driving are possible, and each embodiment can be implemented independently of each other or can be implemented together in a related relationship.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is a diagram showing a micro LED display device according to an embodiment of the present invention.

As shown in FIG. 1 , a micro LED display device 100 according to an embodiment of the present invention includes a substrate 110 and a plurality of micro LEDs 140 mounted on the substrate 110 .

The substrate 110 may be made of a transparent material such as glass, and a plurality of pixel regions P are formed. Although not shown in the drawings, the substrate 110 is a TFT array substrate, and thin film transistors and various wirings for driving the micro LED 140 are formed in the pixel region P on the upper surface. When the thin film transistor is turned on, a driving signal input from the outside through the wiring is applied to the micro LED 140 so that the micro LED 140 emits light to implement an image.

At this time, since three micro LEDs 140R, 140G, and 140B emitting monochromatic lights of R, G, and B, respectively, are mounted in each pixel region P of the substrate 110, R, G, and B color lights are emitted from the R, G, and B micro LEDs 140R, 140G, and 140B when an external signal is applied to display an image.

The micro LEDs 140R, 140G, and 140B are manufactured by a process separate from the TFT array process of the substrate 110. In a general organic light emitting display device, both the TFT array process and the organic light emitting layer are formed by a photo process, whereas in the micro LED display device of the present invention, the thin film transistors and various wirings disposed on the substrate 110 are formed by a photo process. fer) to produce a display device.

The microLED 140 is an LED with a size of 10-100 μm. After growing a plurality of thin films of inorganic materials such as Al, Ga, N, P, As In, etc. on a sapphire substrate or a silicon substrate, the sapphire substrate or silicon substrate. It can be formed by cutting and separating. In this way, since the microLED 140 is formed in a fine size, it can be transferred to a flexible substrate such as plastic, and thus a flexible display device can be manufactured. In addition, since the microLED 140 is formed by growing an inorganic material as a thin film, unlike the organic light emitting layer, the manufacturing process is simple and the yield is improved. In addition, since the individually separated microLEDs 140 are simply transferred onto the large area substrate 110, a large area display device can be manufactured. Furthermore, the micro LED 140 made of inorganic materials has advantages of high luminance, long lifespan, and low unit cost compared to LEDs made of organic light emitting materials.

Although not shown in the drawings, a plurality of gate lines and data lines are vertically and horizontally disposed on the substrate 110 to define a plurality of matrix-shaped pixel regions P. At this time, the gate line and the data line are connected to the micro LED 140, and a gate pad and a data pad connected to the outside are provided at ends of the gate line and the data line, respectively. As an external signal is applied to the micro LED 140 through the gate line and the data line, the micro LED 140 operates and emits light.

2 is a cross-sectional view showing the structure of a micro LED display device 100 according to the present invention in detail. At this time, only the outermost sub-pixels of the microLED display device 100 are shown in the drawings for convenience of explanation.

As shown in FIG. 2 , a thin film transistor (TFT) is disposed in the display area of the substrate 110 and a pad 152 is disposed in the pad area. The substrate 110 is made of a transparent material such as glass, but is not limited thereto and may be made of various transparent materials. Also, the substrate 110 may be made of a flexible transparent material.

The thin film transistor (TFT) is composed of a gate electrode 101 formed on a substrate 110, a gate insulating layer 112 formed over the entire area of the substrate 110 to cover the gate electrode 101, a semiconductor layer 103 formed on the gate insulating layer 112, and a source electrode 105 and a drain electrode 107 formed on the semiconductor layer 103.

The gate electrode 101 may be formed of a metal such as Cr, Mo, Ta, Cu, Ti, Al or an Al alloy or an alloy thereof, and the gate insulating layer 112 may be formed of a single layer made of an inorganic insulating material such as SiOx or SiNx or a plurality of layers made of SiOx and SiNx.

The semiconductor layer 103 may be formed of an amorphous semiconductor such as amorphous silicon or an oxide semiconductor such as indium gallium zinc oxide (IGZO), TiO ₂ , ZnO, WO ₃ , or SnO ₂ . When the semiconductor layer 103 is formed of an oxide semiconductor, the size of the thin film transistor (TFT) can be reduced, driving power can be reduced, and electrical mobility can be improved. Of course, in the present invention, the semiconductor layer of the thin film transistor is not limited to a specific material, and all types of semiconductor materials currently used in thin film transistors can be used.

The source electrode 105 and the drain electrode 107 may be made of metals such as Cr, Mo, Ta, Cu, Ti, Al, Al alloys or alloys thereof. At this time, the drain electrode 107 serves as a first electrode for applying a signal to the microLED.

Meanwhile, in the drawing, the thin film transistor (TFT) is a bottom gate type thin film transistor, but the present invention is not limited to such a specific structure thin film transistor, and various structures such as a top gate type thin film transistor may be applied.

The pad 152 disposed in the pad region may be formed of a metal such as Cr, Mo, Ta, Cu, Ti, Al, or an Al alloy or an alloy thereof. At this time, the pad 152 may be formed by a process different from that of the gate electrode 101 of the thin film transistor (TFT), but in order to simplify the process, it is preferable to form the pad 152 in the same process as the gate electrode 101.

Although not shown in the drawing, the pad may be formed on the gate insulating layer 112 . At this time, the pad may be formed by a process different from that of the source electrode 105 and the drain electrode 107 of the thin film transistor (TFT), but to simplify the process, it is preferable to form the pad in the same process as the source electrode 105 and the drain electrode 107.

In addition, a second electrode 109 is formed on the gate insulating layer 114 of the display area. At this time, the second electrode 109 may be formed of a metal such as Cr, Mo, Ta, Cu, Ti, Al or an Al alloy or an alloy thereof, and may be formed by the same process as the second electrode 107 (ie, the drain electrode of the thin film transistor).

A first insulating layer 114 is formed on the substrate 110 on which the thin film transistor (TFT) is formed, and a micro LED 140 is disposed on the first insulating layer 114 in a display area. At this time, in the drawing, a portion of the first insulating layer 114 is removed and the microLED 140 is disposed in the removed region, but the first insulating layer 114 may not be removed. The first insulating layer 114 may be composed of an organic layer such as photoacrylic, an inorganic layer/organic layer, or an inorganic layer/organic layer/inorganic layer.

The microLED 140 mainly uses a group III-V nitride semiconductor material, but is not limited thereto.

3 is a diagram showing the structure of the microLED 140 of the display device according to the present invention. As shown in FIG. 3, the microLED 140 according to the present invention includes an undoped GaN layer 144, an n-type GaN layer 145 disposed on the GaN layer 144, an active layer 146 having a multi-quantum-well (MQW) structure disposed on the n-type GaN layer 145, and a p-type GaN layer 147 disposed on the active layer 145. ), an ohmic contact layer 148 formed of a transparent conductive material and disposed on the p-type GaN layer 147, a p-type electrode 141 in contact with a portion of the ohmic contact layer 148, and an n-type electrode 143 in contact with a portion of the n-type GaN layer 145 exposed by etching portions of the active layer 146, the p-type GaN layer 147, and the ohmic contact layer 148 It consists of

The n-type GaN layer 145 is a layer for supplying electrons to the active layer 146 and is formed by doping a GaN semiconductor layer with an n-type impurity such as Si.

The active layer 146 is a layer in which injected electrons and holes are combined to emit light. Although not shown in the drawing, the multi-quantum well structure of the active layer 146 includes a plurality of barrier layers and well layers alternately arranged, the well layer being composed of an InGaN layer and the barrier layer being composed of GaN, but is not limited thereto.

The p-type GaN layer 147 is a layer for injecting holes into the active layer 146, and is formed by doping a GaN semiconductor layer with p-type impurities such as Mg, Zn, and Be.

The ohmic contact layer 148 is for making ohmic contact between the p-type GaN layer 147 and the p-type electrode 141, and a transparent metal oxide such as indium tin oxide (ITO), indium gallium zinc oxide (IGZO), or indium zinc oxide (IZO) may be used.

The p-type electrode 141 and the n-type electrode 143 may be formed of a single layer or a plurality of layers made of at least one metal among Ni, Au, Pt, Ti, Al, and Cr or an alloy thereof.

In the microLED 140 having such a structure, when electrons and holes are injected from the n-type GaN layer 145 and the p-type GaN layer 147 to the active layer 145 as voltage is applied to the p-type electrode 141 and the n-type electrode 143, excitons are generated in the active layer 146, and as these excitons decay, the LUMO (Lowest Unoccupied Light corresponding to the energy difference between Molecular Orbital (Molecular Orbital) and HOMO (Highest Occupied Molecular Orbital) is generated and emitted to the outside.

At this time, the wavelength of light emitted from the microLED 140 can be adjusted by adjusting the thickness of the barrier layer of the multi-quantum well structure of the active layer 146 .

The micro LED 140 is formed to have a size of about 10-100 μm. Although not shown in the drawing, the microLED 140 is manufactured by forming a buffer layer on a substrate and growing a GaN thin film on the buffer layer. In this case, sapphire, silicon (si), GaN, silicon carbide (SiC), gallium arsenide (GaAs), zinc oxide (ZnO), or the like may be used as a substrate for growing the GaN thin film.

In addition, when the substrate for growing a GaN thin film is made of a material other than the GaN substrate, the buffer layer is to prevent quality degradation due to lattice mismatch that occurs when the n-GaN layer 120, which is an Epi layer, is directly grown on the substrate, and AlN or GaN may be used.

The n-type GaN layer 145 may be formed by growing a GaN layer 144 undoped with impurities and then doping an n-type impurity such as Si on top of the undoped thin film. In addition, the p-type GaN layer 147 can be formed by growing an undoped GaN thin film and then doping it with a p-type impurity such as Mg, Zn, or Be.

In the drawing, a microLED 140 having a specific structure is disposed on the first insulating layer 114, but the present invention is not limited to the microLED 140 having a specific structure, and microLEDs having various structures such as a vertical microLED and a horizontal microLED may be applied.

Again, referring to FIG. 2 , a second insulating layer 116 is formed on the first insulating layer 114 on which the micro LED 140 is mounted. At this time, the second insulating layer 116 may be composed of an organic layer such as photoacrylic, may be composed of an inorganic layer/organic layer, or may be composed of an inorganic layer/organic layer/inorganic layer, and the upper area of the micro LED 140. Covers.

A first contact hole 114a and a second contact hole 114b are formed in the first insulating layer 114 and the second insulating layer 116 above the thin film transistor (TFT) and the second electrode 119, respectively, so that the drain electrode 107 and the second electrode 119 of the thin film transistor (TFT) are exposed to the outside, respectively. In addition, a third contact hole 116a and a fourth contact hole 116b are formed in the second insulating layer 116 above the p-type electrode 141 and the n-type electrode 143 of the microLED 140, respectively, so that the p-type electrode 141 and the n-type electrode 143 are exposed to the outside.

A first connection electrode 117a and a second connection electrode 117b made of a transparent metal oxide such as ITO, IGZO, or IGO are formed on the second insulating layer 116, and the drain electrode 107 of the thin film transistor (TFT) and the p-type electrode 141 of the micro LED 140 are connected through the first contact hole 114a and the third contact hole 116a. It is electrically connected by the first connection electrode 117a, and the second electrode 109 and the n-type electrode 143 of the microLED 140 are electrically connected by the second connection electrode 117b through the second contact hole 114b and the fourth contact hole 116b.

Meanwhile, a link line 154 is formed on the upper surface of the substrate 110 in the pad area, and a signal module 170 is disposed on the rear surface of the substrate 110, and is electrically connected to the pad 152 through the link line 154.

The signal module 170 may be a printed circuit board (PCB) formed with circuits such as a timing controller, a memory such as EEPROM, a voltage source for driving the micro LED 140, and various wires electrically connected to the link line 154, or may be a PCB formed with a gate driver and data driver for applying scan signals and image signals to gate lines and data lines, respectively.

In this structure, after the signal output from the signal module 170 is applied to the pad 152 through the link line 154, the signal is supplied through the gate line and the data line to turn on the thin film transistor (TFT). As the thin film transistor (TFT) is turned on, a signal is supplied to the micro LED 140 through the thin film transistor (TFT) and the second electrode 109, so that the micro LED 140 emits light.

Meanwhile, the link line 154 is formed on the top, side, and rear surfaces of the substrate 110 to electrically connect the pad 152 and the signal module 170. A plurality of first canal-shaped grooves 162 extending from the signal module 170 to the side of the substrate 110 are formed on the rear surface of the substrate 110 on which the link line 154 is disposed. In addition, a plurality of canal-shaped second grooves 164 extending from the upper surface to the side surface of the substrate 110 are formed. The link line 154 is formed inside the plurality of grooves 162 and 164 .

At this time, since a plurality of link lines 154 are formed and connected to the plurality of gate pads and data pads disposed on the substrate 110 on a one-to-one basis, a plurality of grooves 162 and 164 formed on the side and rear surfaces of the substrate 110 are also formed to correspond to the gate pads and data pads on a one-to-one basis.

The plurality of grooves 162 and 164 in which the link line 154 is formed are filled with an insulating material to prevent the link line 154 from being exposed and corroded.

In addition, a buffer layer 118 made of an inorganic material or/and an organic material is formed on the upper surface of the substrate 110 to cover the micro LED 140 and the link line 154 on the upper surface of the substrate 110.

As described above, in the present invention, since the link line 154 is formed from the upper surface of the substrate 110 to the rear surface through the side surface and is connected to the signal module 170, the bezel area of the display device can be minimized.

In the case of a conventional organic light emitting display device, a flexible printed circuit board (FPCB) having various wires formed thereon is attached to a pad area, and then the FPCB is folded on its back side and connected to a signal module on the back side. Therefore, in the case of a conventional organic light emitting display device, an area to which the FPCB is adhered is required, so the area of the pad area is increased and a space in which the FPCB is folded backward is required. Therefore, a bezel area of a set area must be secured outside the display area.

However, in the micro LED display device of the present invention, the link line 154 is disposed on the side surface of the substrate 110 without the FPCB, and the pad 152 on the upper surface of the substrate 110 and the signal module 170 on the rear surface of the substrate 110 are connected. Therefore, the attachment area and folding space of the FPCB are unnecessary, and the bezel can be greatly reduced.

Furthermore, in the present invention, a plurality of grooves 162 and 164 are formed on the back and side surfaces of the substrate 110 to form the link line 154 inside the grooves 162 and 164, thereby further reducing the bezel. This will be described in more detail below.

4 is a partial perspective view showing the side and rear surfaces of the micro LED display device according to the present invention.

As shown in FIG. 4, the signal module 170 is disposed on the rear surface 110a of the substrate 110, and a plurality of link lines 154 are disposed on the rear surface 110a and the side surface 110b of the substrate 110. The signal module 170 has a pad portion 172 connected to various wires formed therein, and the pad portion 172 is electrically connected to the link line 154.

At this time, since the width of the signal module pad part 172 is smaller than the width of the substrate 110 and the link line 154 is disposed over the entire width of the rear surface 110a and the side surface 110b of the substrate 110, the link line 154 disposed on the rear surface 110a of the substrate is disposed in a fan shape from the signal module pad part 172 side to the side surface 110b of the substrate.

FIG. 5 is an enlarged view of area A of FIG. 4 showing a partial area of the rear surface 110a of the substrate 110. FIG. 5A is a perspective view and FIG. 5B is a cross-sectional view taken along line II′ of FIG. 5A.

As shown in FIGS. 5A and 5B, a plurality of first grooves 162 extending from the signal module 170 to the corner adjacent to the side surface 110b are formed on the rear surface 110a of the substrate 110. At this time, the first groove 162 may be formed in a semicircular canal shape having a diameter of R in cross section, or may be formed in a canal shape in a 2/3, 1/3 or 1/4 circular cross section. In addition, the first groove 162 may be formed in various shapes such as a semi-elliptical cross section or a polygonal shape such as a quadrangular shape or a triangular shape.

A link line 154 is disposed in the first groove 162. The link line 154 electrically connects the signal module 170 and the pad 152, and may be formed by laminating and etching a metal such as Cr, Mo, Ta, Cu, Ti, Al or an Al alloy or an alloy thereof by a sputtering method, or by coating liquid Ag having a viscosity into the first groove 162.

In addition, a filling layer 155 made of an insulating material is formed inside the first groove 162 in which the link line 154 is formed, so that the link line 154 can be buried by the filling layer 155 . The buried layer 155 may be formed of an inorganic insulating material or an organic insulating material, or a polymer such as resin. As the plurality of first grooves 162 are buried by the filling layer 155 , the area where the first grooves 162 are formed also forms a flat plane with the surface of the substrate 110 . In addition, the link line 154 can be prevented from being exposed to the outside and oxidized by the filling layer 155, and can be protected from the outside to prevent damage due to external impact.

FIG. 6 is a view showing region B of FIG. 4 , wherein FIG. 6A is an enlarged perspective view and FIG. 6B is a cross-sectional view.

As shown in FIGS. 6A and 6B , a plurality of second grooves 164 extending from an upper edge adjacent to the upper surface to a lower edge adjacent to the lower surface are formed on the side surface 110b of the substrate 110. At this time, the second groove 164 may be formed in a semicircular canal shape with a cross section of R, or may be formed in a 2/3, 1/3 or 1/4 circular canal shape in cross section. In addition, the second groove 164 may be formed in various shapes such as a semi-elliptical cross section or a polygonal shape such as a quadrangular shape or a triangular shape.

A link line 154 is disposed in the second groove 164. The link line 154 electrically connects the signal module 170 and the pad 152, and may be formed by laminating and etching a metal such as Cr, Mo, Ta, Cu, Ti, Al or an Al alloy or an alloy thereof by a sputtering method, or by coating liquid Ag having a viscosity inside the second groove 164.

The link line 154 of the second groove 164 is formed integrally with the link line 154 of the first groove 162 by the same process, but may be formed by different processes.

A buried layer 155 made of an insulating material is also formed inside the second groove 164 in which the link line 154 is formed to prevent the link line 154 from being exposed to the outside and being oxidized, and is protected from the outside to prevent damage due to external impact. At this time, the buried layer 155 inside the second groove 164 is formed of the same material as the buried layer 155 inside the first groove 162 in the same process, but may be formed of a different material in a different process.

As described above, in the present invention, since the link line 154 is formed on the side surface 110b of the substrate 110 to connect the signal module 170 on the rear surface 110a to the pad 152, the bezel area can be minimized.

Furthermore, in the present invention, a plurality of first grooves 162 and second grooves 164 in a canal shape extending upward from the signal module 170 are formed on the rear surface 110a and side surface 110b of the substrate 110, and the first groove 162 and the second groove 164 are filled with an insulating material and a link line 154 is formed.

When the link line 154 is formed in a pattern having a certain height on the surface of the side surface 110b of the substrate 110, since the link line 154 is exposed to the outside, a separate protective layer for protecting the link line 154 must be formed or the buffer layer 118 formed on the upper part of the substrate 110 must be formed by extending to the side surface of the substrate 110. Therefore, in the case of this structure, since a separate protective layer or buffer layer must be formed on the side surface 110b of the substrate 110, the manufacturing process becomes complicated and the manufacturing cost increases. In addition, since the link line 154 and the protective layer protrude from the side of the substrate 110, the area of the bezel area of the display device increases. Moreover, when assembling the display device with the outer case, the link line 154 formed on the surface of the side surface 110b of the substrate 110 may collide with the outer case. Accordingly, since a certain level of assembly tolerance must be secured, the area of the bezel area of the display device is further increased.

7 is a diagram showing a micro LED display device according to another embodiment of the present invention. The micro LED display device of this embodiment is a display device in which a plurality of micro LED display panels 200 are tiled. In the drawing, four microLED display panels 200 are tiled for convenience of description, but six, eight or more microLED display panels 200 may be tiled to form a microLED display device.

The micro LED display panel 200 has the same structure as the micro LED display device 100 shown in FIG. 1 . In the embodiment shown in FIG. 1, one microLED display panel constitutes a microLED display device, and in the embodiment shown in FIG. 7, a plurality of microLED display panels constitutes a microLED display device.

As shown in FIG. 7 , in the micro LED display device of this embodiment, a plurality of micro LED display panels 200 are tiled. At this time, each micro LED display panel 200 includes a plurality of pixel regions P, and R, G, and B micro LEDs 240R, 240B, and 240G are arranged side by side in each pixel region P.

The plurality of micro LED display panels 200 are designed to be tiled at set intervals d. When the distance d1 between the actually tiled microLED display panels 200 is greater than the set distance d (d1>d), a seam area between the microLED display panels 200 where no image is implemented is recognized by the user. In particular, the seam area is displayed as a dark line because no light is emitted.

The micro LEDs 240G provided in one pixel area P inside the micro LED display panel 200 and the micro LEDs 240R provided in the adjacent pixel area P are arranged at an interval of ℓ1, and the nearest micro LEDs 240G and 240R of two adjacently tiled microLED display panels 200 are arranged at an interval of ℓ2.

At this time, the interval ℓ1 is an optimal interval for realizing an image by being disposed within one microLED display panel 200, and if the microLEDs 240G and 240R are disposed at intervals greater than this interval ℓ1, the image quality deteriorates. In addition, if the distance between the micro LEDs 240G and 240R increases so that the actual distance exceeds the set range α of the set distance and the micro LEDs 240G and 240R are disposed, the core area between the two micro LEDs 240G and 240R is indicated by a dark line.

When tiling the plurality of micro LED display panels 200, if the distance d1 between adjacent micro LED display panels 200 exceeds the set distance (d1>d), the distance ℓ2 between the micro LEDs 240G and 240R closest to each other in the micro LED display panel 200 exceeds the distance ℓ1 between the micro LEDs 240G and 240R inside one micro LED display panel 200 (ℓ2> ℓ1) Image quality deteriorates in the boundary area of the micro LED display panel 200 .

In particular, when the interval ℓ2 between the closest microLEDs 240G and 240R of the adjacent microLED display panel 200 exceeds the interval ℓ1 between the microLEDs 240G and 240R inside one microLED display panel 200 by exceeding the set range α (ℓ2>ℓ1+α), the deep region between the adjacent microLED display panels 200 is displayed as a dark line.

When the link line connecting the micro LED 240 on the front side of the micro LED display panel 200 and the circuit module (not shown) on the back side is formed on the surface of the side surface of the substrate, not only the link line but also the protective layer is formed on the side surface. Therefore, it is difficult to form the distance d1 between adjacent micro LED display panels 200 to the set distance d.

In order to solve the problem caused by the increase in the distance between the micro LED display panels 200, the arrangement of the R, G, B micro LEDs 240R, 240B, and 240G of adjacent pixels is different from the arrangement of the R, G, B micro LEDs 240R, 240B, and 240G of other pixels. 40R) to reduce the interval ℓ2. However, in this case, due to a difference in arrangement of the R, G, and B microLEDs 240R, 240B, and 240G from other pixels, the manufacturing process becomes complicated and the yield decreases.

In the present invention, since the distance between adjacent microLED display panels 200 of the tiling microLED display device can be minimized by disposing the link line connecting the microLED 240 on the front side of the microLED display panel 200 and the circuit module (not shown) on the back side of the substrate in a canal-shaped groove formed on the side surface of the substrate, the distance ℓ2 between the closest microLEDs 240G and 240R is the microLED 240G inside the microLED display panel 200. 240R) can be made the same as the interval ℓ1.

Hereinafter, it will be described in more detail that the tiling micro LED display device according to the present invention has a configuration capable of removing dark lines.

8 is a partial cross-sectional view of the outer region of the micro LED display panel 300 in which no canal-shaped groove is formed and link lines are disposed on the side surface of the substrate.

As shown in FIG. 8, in the micro LED display panel 300 of this structure, a first substrate 310a and a second substrate 310b are provided, and thin film transistors, various wires such as gate lines and data lines, pads 352, and link lines 354 are disposed on the upper surface of the first substrate 310a, and a circuit module and a link line 354 connected to the circuit module are disposed on the lower surface of the second substrate 310a. ) is placed.

The micro LED display panel of the present invention is composed of only one substrate, whereas the micro LED display panel 300 of this structure requires two substrates for the following reason.

In general, thin film transistors and various wirings disposed on the upper surface of a substrate are all formed in a photolithography process, and these photolithography processes are performed by placing a substrate on a process table disposed in a vacuum chamber, depositing and etching metals and insulating materials, etc.

Therefore, for example, in order to perform a photolithography process on the upper surface after forming a link line on the surface of the lower surface of a single substrate, the substrate is inverted and the lower surface on which the signal wiring is formed is placed on the process table so as to contact the process table, and the thin film transistor process or the like is performed with the upper surface facing upward. Therefore, the link line 354 formed on the lower surface of the substrate contacts the process table, and the link line 354 is damaged, resulting in a defect.

In addition, during the deposition process of the upper surface, an unwanted metal or insulating layer is deposited on the lower surface of the substrate, resulting in a short circuit of the link line 354, or an etchant etching the link line 354 of the lower surface during the etching process, thereby causing defects such as disconnection of the link line 354.

In addition, even when the link line 354 is formed on the lower surface after forming various elements such as thin film transistors on the upper surface, defects may occur because various elements such as the thin film transistors come into contact with the process table during the formation process of the link line 354. In addition, during a transfer process for transferring the micro LED after the link line 354 is formed, the lower surface on which the link line 354 is formed comes into contact with the process table again, resulting in defects in the link line 354 .

In order to prevent such defects, in the micro LED display device having this structure, elements such as thin film transistors are formed on the front surface of the first substrate 310a in different processes, the micro LED is transferred, and the link line 354 is formed on the rear surface of the second substrate 310b. After forming, the first substrate 310a and the second substrate 310b are bonded together, thereby preventing collision with the process table and defects due to deposition or etching.

Referring back to FIG. 8 , the first substrate 310a and the second substrate 310b are bonded to each other by an adhesive 357 .

The link lines 354 respectively formed on the upper surface of the first substrate 310a and the lower surface of the second substrate 310b are connected by link lines 354 formed on the side surfaces of the first substrate 310a and the second substrate 310b. At this time, the link lines 354 formed on the upper surface of the first substrate 310a and the lower surface of the second substrate 310b, respectively, and the link lines 354 formed on the side surfaces of the first substrate 310a and the second substrate 310b may be formed of different materials and structures, but are preferably integrally formed of the same material.

A buffer layer 318 is formed on the upper surface of the first substrate 310a, the lower surface of the second substrate 310b, and the side surfaces of the first substrate 310a and the second substrate 310b to protect the link line 354 exposed to the outside, thereby preventing the link line 354 from being damaged or corroded.

At this time, in the buffer layer 318, the link line 354 formed on the side surfaces of the first substrate 310a and the second substrate 310b is formed to a thickness of t1, and the buffer layer 318 is formed to a thickness of t2.

9A and 9B are partial cross-sectional views illustrating a structure in which the microLED display panel of the structure shown in FIG. 8 and the microLED display panel according to an exemplary embodiment of the present invention are tiled, respectively.

As shown in FIG. 9A , in the microLED display device having this structure, since link lines 354 and buffer layers 318 are formed on the side surfaces of the first and second substrates 310a and 310b of the microLED display panel 300 that are tiled with each other, two layers of link lines 354 and buffer layers 318 are formed between the microLED display panels 300 that are tiled with each other, so that the microLED display panel 300 ) becomes d2 = 2t1 + 2t2 + β (here, β is the assembly tolerance of the tiling micro LED display).

As shown in FIG. 9B, in the micro LED display device according to the present invention, a plurality of canal-shaped grooves 262 and 264 are formed on the side and bottom surfaces of the substrate 210, respectively, and the link line 254 is formed inside the grooves 262 and 264. In addition, the buffer layer 218 is formed only on the upper surface of the substrate 210 and is not formed on the side surface of the substrate 210 .

Therefore, in the microLED display device according to the present invention, since the link line 254 and the buffer layer 218 are not formed on the side of the microLED display panel 200, there is no layer between adjacent microLED display panels 200. Therefore, the distance d1 between adjacent micro LED display panels 200 is substantially equal to the tiling tolerance β of the tiling micro LED display device (d1 = β).

In other words, the distance d3 between the micro LED display panels 200 of the present invention is smaller than the distance d2 between the micro LED display panels 300 of the structure shown in FIG. 8 (d1 < d2). In this way, the tiling micro LED display device of the present invention can minimize the distance between the micro LED display panels 200, thereby preventing a defect in which the deep area between the micro LED display panels 200 is displayed as a dark line.

As described above, in the tiling micro LED display device according to the present invention, since the setting interval (d) of the micro LED display panels during tiling can be designed to be small enough to be similar to the tiling tolerance, it is possible to prevent dark lines from occurring between the micro LED display panels.

In addition, since the setting interval d can be minimized, the interval ℓ2 between the closest microLEDs 240G and 240R of the two microLED display panels 200 that are adjacently tiled can be set to be similar to the interval ℓ1 between the adjacent microLEDs 240G and 240R of the adjacent pixel area P in one microLED display panel 200, so that the image quality in the area between the microLED display panels can be prevented from deteriorating. .

Hereinafter, a method of manufacturing a tiling micro LED display device according to the present invention will be described.

10 is a diagram illustrating a manufacturing method of a tiling micro LED display device according to the present invention. At this time, the micro LED display device is a display device in which a plurality of display panels having the structure shown in FIGS. 1 and 2 are tiled.

As shown in the figure, first, a transparent substrate 100 such as glass is processed to form a plurality of canal-shaped grooves 162 and 164 on the back and side surfaces of the substrate (S101). At this time, the first groove 162 and the second groove 164 may be connected to each other to form one groove.

The grooves 162 and 164 may be formed by forming a resist pattern on the side surface and rear surface of the substrate 110 to expose some areas, and then etching the exposed areas by applying an etchant to the substrate. In addition, after forming a plurality of holes along the edge region of the substrate 110, the substrate is cut or ground along the center of the hole or along the 1/3 line or 2/3 line to form the groove 164 on the side of the substrate. However, the grooves 162 and 164 are not formed by a specific method, but may be formed by various methods.

Subsequently, after placing the substrate on the process table, a conductive material is applied to the inside of the grooves 162 and 164 to form link lines 154 (S102). In this case, the conductive material may be formed by applying a conductive material such as Ag, Au, or Al having a viscosity, or may be formed by depositing and etching a metal by a deposition process such as sputtering.

After the link line 154 is formed, an insulating material (burial layer) may be filled in the groove to protect the link line 154 from external impact or foreign matter. At this time, as the insulating material, a polymer such as resin, an organic material such as photoacrylic, or an inorganic material such as SiOx or SiNx may be used. The insulating material may be applied only to a portion of the grooves 162 and 164 so as to cover the link line 154, completely fill the inside of the grooves 162 and 164 so that the surface is at the same level as the surface of the side surface and the rear surface of the substrate 110, or more material than the inner area of the grooves 162 and 164 may protrude from the side surface and the rear surface of the substrate 110.

After that, the substrate 110 is inverted so that the upper surface of the substrate 110 faces upward and the rear surface on which the link line 154 is formed is in contact with the process table, and then thin film transistors and various wires such as gate lines and data lines are formed on the upper surface of the substrate 110 by a photolithography process, and then a first insulating layer 114 is formed thereon (S103). In addition, the pad 152 is formed simultaneously with the formation of the gate electrode of the thin film transistor, and the second electrode 109 is formed simultaneously with the formation of the source electrode 105 and the drain electrode 107.

By inverting the substrate 110, the back surface of the substrate 110 comes into contact with the upper surface of the process table. In the present invention, since the link line 154 is formed inside the groove 162 formed on the rear surface of the substrate 110, even when the substrate 110 is inverted and the rear surface contacts the process table, the link line 154 does not come into contact with the process table. Moreover, since a buried layer (or protective film) for protecting the link line 154 is formed inside the groove 162, it is possible to reliably prevent the link line 154 from being damaged by reversal.

In the case of a micro LED display device having a structure in which a groove is not formed on the rear surface of the substrate and link lines are formed on the surface of the rear surface of the substrate, since the rear surface contacts the process table during the TFT process, the link line formed on the rear surface may be damaged. In addition, the link line is etched by an etchant used in the TFT process, resulting in disconnection of the link line. Therefore, in a micro LED display device having this structure, two substrates must be used to form a TFT on the upper surface of one substrate and a link line on the lower surface of the other substrate, and then bond the two substrates together.

However, in the present invention, since the TFT (TFT) and the link line 154 are formed on the upper and lower surfaces of the substrate 110, respectively, it is possible to reduce the manufacturing cost as well as the volume and weight of the display device compared to a structure using two substrates.

Referring back to FIG. 10 , after forming the thin film transistor (TFT) and wiring, the micro LED 140 is transferred to the upper surface of the substrate 110 (S104).

The microLED 140 is transferred by separating the microLED 140 grown on a sapphire or silicon substrate into chip units, and then transferring the separated microLED 140 to the substrate 110. However, the transfer of the micro LED 140 is not limited to this method and may be performed by various methods.

Subsequently, a transparent metal oxide such as ITO, IGZO, or IGO is laminated on the substrate 110 and etched to electrically connect the drain electrode 107 of the thin film transistor (TFT) and the p-type electrode 141 of the micro LED 140 through the first contact hole 114a and the third contact hole 116a, and the second contact hole 114b and the fourth contact hole 116 Through b), the second electrode 109 and the n-type electrode 143 of the micro LED 140 are electrically connected (S105).

Thereafter, an inorganic material or/and an organic material is laminated on the substrate 110 to form a buffer layer 118 to complete the micro LED display panel (106). At this time, the buffer layer 118 is formed only on the upper surface of the substrate 110 and is disposed on the upper surface to cover the pad 152 and the link line 154 exposed to the outside. However, the buffer layer 118 is not formed on the side surface and the rear surface of the substrate 110 .

Subsequently, a micro LED display device is fabricated by tiling the plurality of micro LED display panels completed (S107).

In the above detailed description, although the present invention is specifically described as a specific structure, this is for convenience of description. However, the present invention is not limited to this specific structure. For example, although a microLED having a specific structure is used in the above description, microLEDs having various structures may also be used. Also, in the above description, the microLED is transferred on the first insulating layer, but the transfer location of the microLED is not specific to this location, and may be transferred on various layers. Therefore, the scope of the present invention is not determined by the above detailed description, but should be determined by what is equivalent to the claims and claims.

100: micro LED display device 110: substrate
140: microLED 152: pad
154: link line 162, 164: home
170: circuit module

Claims (9)

a substrate on which thin film transistors and electrodes are disposed;
A plurality of horizontal structure micro LED (Light Emitting Device) provided on the upper surface of the substrate;
a plurality of canal-shaped grooves formed on the side surface and the rear surface of the substrate by removing partial regions of the side surface and the rear surface of the substrate;
Link lines formed inside the grooves on the side and rear surfaces of the substrate and on the upper surface of the substrate;
a buried layer provided inside the grooves on the side and rear surfaces of the substrate to cover the link line;
a pad formed on an upper surface of the substrate and connected to the link line; and
a first insulating layer provided on the thin film transistor and the electrode and having the horizontal structure microLED disposed thereon;
a second insulating layer provided on the first insulating layer on which the horizontal structure microLED is disposed;
A first connection electrode and a second connection electrode formed on an upper surface of the second insulating layer and connecting the horizontal structure microLED to the drain electrode and the electrode of the thin film transistor through through-holes formed in the first insulating layer and the second insulating layer; and
A micro LED display panel comprising a buffer layer formed on an upper surface of the substrate and covering the second insulating layer, the first connection electrode, the second connection electrode, the pad, and the link line. The micro LED display panel of claim 1 , wherein the horizontal structure micro LED has a size of 10 to 100 μm. delete The micro LED display panel of claim 1 , wherein the filling layer is made of at least one of an organic material, an inorganic material, and a polymer. The microLED display panel of claim 1 , wherein the groove formed on the side surface of the substrate extends from an edge adjacent to the upper surface of the substrate to an edge adjacent to the rear surface of the substrate. The micro LED display panel of claim 1 , further comprising a signal module disposed on the rear surface of the substrate and supplying signals to the horizontal structure micro LED on the upper surface of the substrate. 7. The microLED display panel of claim 6, wherein the groove formed on the rear surface of the substrate extends from the signal module to a corner adjacent to the side surface of the substrate. delete A plurality of micro LED display panels having the structure according to any one of claims 1, 2, and 4 to 7 are tiled,
A tiling micro LED display device, characterized in that substrate sides of adjacent micro LED display panels are arranged at intervals of an assembly tolerance.

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