KR102550985B1 - Current control ic of the backlight apparatus for display - Google Patents

Abstract

The present invention discloses a current control integrated circuit of a backlight device for a display, the current control integrated circuit comprising: a buffer for receiving a column signal; A plurality of receiving row signals corresponding to the column signal output from the buffer and a plurality of light emitting blocks of a control unit, and controlling driving currents for light emission of the light emitting blocks in response to the column signal and the row signals. a driving current controller; and a memory unit, and controls the offset voltage of the buffer with offset correction data stored in the memory unit.

Description

Current control integrated circuit of backlight device for display {CURRENT CONTROL IC OF THE BACKLIGHT APPARATUS FOR DISPLAY}

The present invention relates to a current control integrated circuit, and more particularly, to a current control integrated circuit of a backlight device for displaying an image.

Among the display panels, an LCD panel exemplarily requires a backlight device to display an image.

The backlight device provides a backlight for displaying an image on the LCD panel, and the LCD panel may display an image using the backlight by performing an optical shutter operation for each pixel.

The backlight device may include a backlight board, the backlight board having light emitting diode channels using LEDs as a light source, and the light emitting diode channels may emit light to provide a backlight.

The backlight board includes light emitting diode channels to implement a backlight having a resolution different from that of the LCD panel, and light emission of the light emitting diode channels can be controlled by column signals and row signals.

In a conventional backlight device that performs dimming control, it is difficult to maintain light emission of LED channels for one frame. If the light emitting diode channel does not sufficiently maintain light emission during one frame, flicker may occur. Therefore, the backlight device needs to adopt a design for reducing or eliminating flicker.

Also, the backlight device is configured to use a large number of light emitting diode channels. The light emitting diode channels of the backlight device have current deviations for the same column signal.

The current deviation of the light emitting diode channel may be caused by a deviation of an offset voltage acting on a column signal.

In addition, it can be understood that the current deviation of the light emitting diode channel is caused by the deviation of the gain of a dependent current source that drives the driving current of the light emitting diode channel.

The light emitting diode channels may emit light with different luminance even with the same column signal due to the current deviation described above.

The above current deviation may appear large at a low current of 20uA to 200uA controlled for a low voltage input value of 1mV to 100mV.

This is because the deviation of the offset voltage and the deviation of the gain of the dependent current source have a greater effect on the current deviation as the emission driving voltage is lower.

Therefore, the current deviation may be relatively larger in a low current band having a low light emitting driving voltage than in a high current band having a high light emitting driving voltage.

The uniformity of image quality of a backlight device that is sensitive to human vision may be evaluated as gray uniformity and dark uniformity.

Gray uniformity and dark uniformity are evaluated in a low current band. Therefore, the current deviation of the light emitting diode channel due to the deviation of the offset voltage and the deviation of the gain of the dependent current source may act as a cause of deteriorating the gray uniformity and the dark uniformity.

An object of the present invention is to provide a current control integrated circuit of a backlight device for a display in which light emission of each light emitting diode channel for a backlight can be maintained for one frame in order to reduce or eliminate flicker.

Another object of the present invention is to provide a current control integrated circuit of a backlight device for a display capable of dividing light emitting diode channels of a backlight board into a plurality of control units and controlling driving currents of the light emitting diode channels for each control unit. .

Another object of the present invention is to improve the current deviation of the light emitting diode channel, which occurs relatively large in a low current band, and in particular, the current deviation of the backlight device for display with improved current deviation due to the offset voltage deviation for the light emitting diode channel driver. It is to provide a control integrated circuit.

Another object of the present invention is to improve the current deviation of the light emitting diode channel, which acts relatively large in a low current band, and in particular, to solve the current deviation caused by the deviation of the gain of the dependent current source contributing to the driving current of the light emitting diode channel. It is to provide a current control integrated circuit of a backlight device for.

A current control integrated circuit of a backlight device for a display of the present invention includes a buffer receiving a column signal and having an offset controller; a plurality of drive current controllers that receive the column signal output from the buffer and row signals corresponding to the plurality of light emitting blocks of the control unit, and control driving currents for light emission of the light emitting blocks; and a memory unit storing offset correction data for controlling a deviation of the offset voltage of the buffer, wherein each of the driving current controllers generates a sampling voltage obtained by sampling the column signal as the low signal, The driving current of the light emitting block is controlled using a voltage, the offset control unit controls the offset voltage in response to the offset correction data, and the buffer has the offset voltage controlled by the offset control unit. The column signal from which the offset voltage is subtracted may be provided to the plurality of driving current controllers.

In addition, the current control integrated circuit of the backlight device for a display of the present invention includes a buffer for receiving a column signal; A dependent current source for receiving the column signal output from the buffer and row signals corresponding to the plurality of light emitting blocks of the control unit, controlling driving currents for light emission of the light emitting blocks, and controlling the driving current, respectively. a plurality of driving current controllers; and a memory unit configured to store gain correction data for controlling a deviation of the gain of the dependent current source, wherein each of the driving current controllers generates a sampling voltage obtained by sampling the column signal as the low signal, The driving current of the light emitting block is controlled using a voltage, and the dependent current source controls an amount of the driving current in response to a gain.

In addition, the current control integrated circuit of the backlight device for a display of the present invention includes a plurality of buffers that jointly receive column signals and have an offset controller; configured to correspond to the plurality of buffers, receive row signals corresponding to the plurality of light emitting blocks of the control unit and the column signal output from the corresponding buffer, and control driving currents for light emission of the light emitting blocks a plurality of drive current controllers; and a memory unit configured to store offset correction data for controlling deviations of offset voltages of the plurality of buffers, wherein each of the driving current control units generates a sampling voltage obtained by sampling the column signal as the low signal, The driving current of the light emitting block is controlled using the sampling voltage, the offset controller controls the offset voltage in response to the offset correction data, and each buffer controls the offset voltage controlled by the offset controller. and providing the column signal from which the offset voltage is subtracted to the corresponding driving current controller.

According to the present invention, a backlight may be provided to a display panel, and driving currents of LED channels may be controlled to maintain light emission for one frame by a sampling voltage of a column signal. Therefore, the present invention can sufficiently maintain light emission of light emitting diode channels for backlight, thereby reducing or eliminating flicker.

In addition, the present invention divides the light emitting diode channels of the backlight board into a plurality of control units, and includes a current control integrated circuit for each control unit. Therefore, according to the present invention, driving currents for light emission can be controlled for each control unit, and a backlight board for controlling driving currents of light emitting diode channels can be easily designed and manufactured by applying a current control integrated circuit.

In addition, the present invention solves the current deviation of the light emitting diode channel due to the deviation of the offset voltage and the deviation of the gain of the current source contributing to the output current, which can act relatively large in the low current band, thereby evaluating gray uniformity and Dark uniformity can be improved.

In addition, the present invention stores offset correction data and gain correction data in a storage unit and compensates for the driving current of the light emitting diode channels using the offset correction data and the gain correction data, thereby compensating for the current deviation of the light emitting diode channels of the backlight device to emit light. can

1 is a block diagram showing an embodiment of a backlight device for a display of the present invention;
2 is a block diagram illustrating some configurations of a backlight board included in the embodiment of FIG. 1;
3 is a block diagram illustrating the current control integrated circuit of FIG. 1;
4 is a block diagram illustrating an electrical connection relationship between a current control integrated circuit and light emitting diode channels;
Fig. 5 illustrates arrangement of light emitting diode channels and control units;
6 illustrates brightness of a column signal applied to light emitting diode channels;
7 is a waveform diagram for explaining an example of an operation of a current control integrated circuit;
8 is a detailed block diagram illustrating an example of a current control integrated circuit;
9 is a detailed block diagram of a current control integrated circuit;
10 is a detailed circuit diagram illustrating an example of a buffer.
11 is a detailed circuit diagram illustrating an example of a dependent current source.
Fig. 12 is a graph explaining correction of offset voltage by offset correction data;
13 is a graph explaining gain correction by gain correction data;
14 is a graph illustrating an example of improvement in current deviation according to the present invention.
15 is a detailed block diagram illustrating another embodiment of a current control integrated circuit;

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. Terms used in this specification and claims should not be construed as being limited to conventional or dictionary meanings, and should be interpreted as meanings and concepts consistent with the technical details of the present invention.

The embodiments described in this specification and the configurations shown in the drawings are preferred embodiments of the present invention, and do not represent all of the technical spirit of the present invention, so various equivalents and modifications that can replace them at the time of this application are There may be.

A backlight device for a display of the present invention provides a backlight to a display panel for displaying an image, and is implemented to include a backlight board for providing the backlight.

The backlight board of the present invention is implemented to have current control integrated circuits to reduce or eliminate flicker caused by the backlight.

A display device for displaying an image may include a display board 2 , a display panel 4 , a backlight driving board 6 , and a backlight board 40 as shown in FIG. 1 .

The configuration for providing the backlight may be understood as basically including the backlight board 40, and may additionally include at least one of the backlight driving board 6 and the display board 2. .

The display panel 4 may be constructed using an LCD panel.

The display panel 4 interfaces with the display board 2 through a transmission line 3 and receives display data. The display panel 4 includes pixels (not shown) for implementing a predesigned resolution, and each pixel performs an optical shutter operation in response to display data, thereby displaying an image using a backlight.

The display data provided to the display panel 4 includes data for displaying an image in frame units, illustratively, data for displaying the brightness of pixels, a horizontal sync signal for dividing horizontal lines, and vertical data for dividing frames. synchronization signals and the like.

The display board 2 receives display data transmitted from a video source (not shown).

The display board 2 includes parts (not shown) that form display data into packets and provide them to the display panel 4, and can provide display data for displaying an image to the display panel 4. .

Components that configure display data as packets and provide them to the display panel 4 are for realizing the function of a timing controller generally used in display devices, and descriptions thereof are omitted.

Also, the display board 2 may provide luminance data corresponding to the display data to the backlight driving board 6 .

The resolution of the display panel 4 for displaying images and the resolution of the backlight board 40 providing backlight are different. Also, the gray range and gray value for the backlight may be set differently from those for expressing the image. Therefore, the backlight board 40 requires backlight data including a resolution and a gray value for expressing the backlight.

One frame of the backlight of the backlight board 40 includes a plurality of horizontal periods, and each horizontal period means a period in which backlight data is provided to columns of one horizontal line in one frame. The backlight data includes column data corresponding to columns of horizontal periods included in one frame and row data for distinguishing the horizontal periods.

The display board 2 may generate luminance data that satisfies the resolution and gray value of the backlight by using the display data. Illustratively, the display board 2 may provide the display data as luminance data as it is or provide luminance data obtained by converting the display data to have a resolution and a gray value corresponding to the backlight.

The display board 2 is configured to generate luminance data in a format that can be received by the backlight driving board 6 and provide the luminance data to the backlight driving board 6 through a transmission line 5 . The display board 2 may provide the vertical synchronization signal Vsync to the backlight driving board 6 through the transmission line 5a to synchronize the backlight driving board 6 .

The backlight driving board 6 receives the luminance data and the vertical synchronizing signal Vsync from the display board 2, and provides the backlight data to the backlight board 40 through the transmission line 7 having a plurality of transmission channels and provides vertical synchronization. It is configured to provide the signal Vsync to the backlight board 40 via the transmission line 7a.

The backlight board 40 is configured to provide backlight to the display panel 40 by receiving backlight data from the backlight driving board 6 and the vertical synchronization signal Vsync, and emitting light through LED channels corresponding to the backlight data.

The backlight board 40 may be implemented as shown in FIG. 2 to provide a backlight. Referring to FIG. 2 , a backlight board 40 may include a column driver 10 , a row driver 20 , light emitting diode channels, and current control integrated circuits.

Here, the area where the light emitting diode channels and current control integrated circuits are formed may be defined as the backlight area 30, and the column driver 10 and the row driver 20 may be formed outside the backlight area 30. there is.

And, in FIG. 2, the light emitting diode channels are indicated as "CH11 to CH93", and the current control integrated circuits are indicated as "T11, T12, T13, T21, T22, T23, T31, T32, T33".

The backlight board 40 is to provide a backlight for displaying an image to the display panel 4, and the backlight area 30 is understood as an area that provides backlight by light emission of the light emitting diode channels CH11 to CH93. It can be.

With the above configuration, the backlight board 40 is configured to act as a surface light source by a set of light sources.

The backlight board 40 of FIG. 2 includes light emitting diode channels CH11 to CH93 using LEDs as light sources. The light emitting diode channels CH11 to CH93 may be arranged in a matrix structure having columns and rows. It may be understood that each of the light emitting diode channels CH11 to CH93 includes a plurality of LEDs connected in series.

According to an embodiment of the present invention, the light emitting diode channels (CH11 to CH93) are divided into a plurality of control units, and in the embodiment, the control unit is distributed over a predetermined number of light emitting diode channels continuously arranged on the same column or a plurality of columns. and may be defined as including a predetermined number of light emitting diode channels continuously arranged on a column.

For example, all light emitting diode channels (CH11 to CH93) may be divided into units of 4 light emitting diode channels continuously disposed on the same column, and the control unit may be defined as including the 4 separated light emitting diode channels. .

That is, light emitting diode channels CH11, CH21, CH31, CH41, light emitting diode channels CH51, CH61, CH71, CH81, light emitting diode channels CH12, CH22, CH32, CH42, light emitting diode channels CH52 , CH62, CH72, CH82), the light emitting diode channels (CH13, CH23, CH33, CH43) and the light emitting diode channels (CH53, CH63, CH73, CH83) are each divided into one control unit.

In addition, the embodiment of the present invention includes current control integrated circuits T11, T12, T13, T21, T22, T23, T31, T32, and T33 corresponding to each control unit. That is, the backlight board such that the current control integrated circuits T11, T12, T13, T21, T22, T23, T31, T32, and T33 of FIG. 2 correspond to each control unit of all light emitting diode channels CH11 to CH93 one by one. It consists of (40).

More specifically, the current control integrated circuit T11 is configured to control driving currents of the light emitting diode channels CH11, CH21, CH31, and CH41, and the current control integrated circuit T21 controls the light emitting diode channels CH51 and CH61. , CH71 and CH81, and the current control integrated circuit T12 is configured to control the driving currents of the light emitting diode channels CH12, CH22, CH32 and CH42, and the current control integrated circuit T22 ) is configured to control driving currents of the light emitting diode channels CH52, CH62, CH72, and CH82, and the current control integrated circuit T13 controls the driving currents of the light emitting diode channels CH13, CH23, CH33, and CH43. and the current control integrated circuit T23 is configured to control driving currents of the light emitting diode channels CH53, CH63, CH73, and CH83.

The current control integrated circuits T11, T12, T13, T21, T22, T23, T31, T32, and T33 are configured to receive column signals from the column driver 10 and receive low signals from the row driver 20. The column signals are denoted by D1, D2, D3... and the row signals are denoted by G1, G2, G3...

One backlight board 40 provides a backlight having a resolution determined by all light emitting diode channels CH11 to CH93, and is configured such that brightness is controlled by data corresponding to one frame of the backlight. The frame data includes data of a plurality of horizontal periods.

The column driver 10 is configured to provide column signals corresponding to every horizontal cycle of the backlight. Exemplarily, the column driver 10 provides column signals D1, D2, and D3 corresponding to columns of LED channels in units of horizontal cycles. Signal lines to which the column signals D1, D2, and D3 are applied may be referred to as column lines.

The column driver 10 receives column data having a value for expressing brightness, and provides column signals D1, D2, and D3 having voltage levels corresponding to the column data.

The row driver 20 is configured to receive row data and to provide row signals G1, G2, ... G9 corresponding to rows of light emitting diode channels in units of one frame of the backlight in response to the row data. The low signals G1, G2, ... G9 have preset pulse widths and are sequentially provided according to the horizontal period of the backlight. Signal lines to which the low signals G1, G2, ... G9 are applied may be referred to as low lines.

Each of the current control integrated circuits T11, T12, T13, T21, T22, T23, T31, T32, and T33 receives a column signal and a row signal of a corresponding control unit.

To this end, the current control integrated circuits T11, T21 and T31 share one column line to receive the column signal D1, and the current control integrated circuits T12, T22 and T32 to receive the column signal D2. A column line is shared, and one column line is shared so that the current control integrated circuits T31, T23, and T33 receive the column signal D3.

Also, each of the current control integrated circuits T11, T12, T13, T21, T22, T23, T31, T32, and T33 receives the LO signal of the control unit. Current control integrated circuits (T11, T12, T13; T21, T22, T23; T31, T32, T33) in the same row position receive the same row signals and share row lines.

The current control integrated circuits T11, T12, T13, T21, T22, T23, T31, T32, and T33 receive the column signal and the row signal corresponding to the control unit as described above, and drive current of the light emitting diode channels of the control unit By controlling the light emitting diode channels to control the light emission. Exemplarily, the current control integrated circuit T11 receives the column signal D1 and the row signals G1 to G4 as described above, and controls driving currents of the light emitting diode channels CH11, CH21, CH31, and CH41. Light emission of the light emitting diode channels CH11, CH21, CH31, and CH41 is controlled.

Each of the above-described current control integrated circuits T11, T12, T13, T21, T22, T23, T31, T32, and T33 generates sampling voltages obtained by sequentially sampling column signals for each horizontal period as low signals, and generates sampling voltages based on the sampling voltages. Accordingly, it is possible to control light emission and brightness maintenance of light emitting diode channels of the control unit. Exemplarily, the current control integrated circuit T11 generates sampling voltages obtained by sampling the column signal D1 for each horizontal cycle as row signals G1 to G4 for each horizontal cycle, which are sequentially provided, and generates sampling voltages for the same control unit by the sampling voltages. Driving currents for light emission of the belonging LED channels CH11, CH21, CH31, and CH41 are controlled.

Also, each of the current control integrated circuits T11, T12, T13, T21, T22, T23, T31, T32, and T33 may receive the zoom control signal CZ for controlling the driving current. A description of the zoom control signal CZ will be given later.

Each of the current control integrated circuits T11 , T12 , T13 , T21 , T22 , T23 , T31 , T32 , and T33 configured in FIG. 2 may be specifically exemplified as shown in FIG. 3 . 3 illustrates a current control integrated circuit T11.

3, the current control integrated circuit T11 includes a column input terminal TD1, row input terminals TG1 to TG4, a zoom input terminal TCZ, a monitor terminal TMON, a ground terminal TGND, and an operating voltage terminal TVCC ), a feedback stage (TFB), and control stages (T01 to T04). Here, the column input terminal TD1 receives the column signal D1, the row input terminals TG1 to TG4 receive the row signals G1 to G4, the zoom input terminal TCZ receives the zoom control signal CZ, and the monitor Terminal (TMON) outputs the monitor signal MON, the ground terminal (TGND) is connected to the ground (GND), the operating voltage terminal (TVCC) receives the operating voltage (VCC), and the feedback terminal (TFB) is a feedback signal FB is output, and the control terminals TO1 to TO4 receive driving currents O1 to O4 of the light emitting diode channels CH11, CH21, CH31, and CH41.

Electrical connections between the current control integrated circuit T11 of FIG. 3 and the light emitting diode channels CH11, CH21, CH31, and CH41 corresponding to the control unit may be understood with reference to FIG. 4 .

The light emitting voltage VLED is applied to each of the light emitting diode channels CH11, CH21, CH31, and CH41, and includes a plurality of LEDs connected in series. Low-side driving currents O1 to O4 of each of the light emitting diode channels CH11, CH21, CH31, and CH41 are input to the current control integrated circuit T11.

Configurations of the remaining current control integrated circuits T12, T13, T21, T22, T23, T31, T32, and T33 may also be understood with reference to FIGS. 3 and 4.

Meanwhile, FIG. 5 illustrates arrangement of LED channels and division of control units. 5 shows a control unit C11 including light emitting diode channels CH11, CH21, CH31, and CH41, a control unit C12 including light emitting diode channels CH12, CH22, CH32, and CH42, and a light emitting diode channel. A control unit C13 including CH13, CH24, CH34, and CH44 and a control unit C14 including LED channels CH14, CH24, CH34, and CH44 are illustrated.

One column signal and four row signals are input to each control unit. In addition, column signals applied to each light emitting diode channel may be provided to have voltage levels for brightness as shown in FIG. 6 .

More specifically, FIG. 6 shows that the column signals D1, D2, D3, and D4 are provided at levels of “4, 5, 1, 2” in the first horizontal period in which the low signal G1 is provided, and in the second horizontal period in which the low signal G2 is provided. It is exemplified that levels of “3, 1, 5, 5” are provided in the horizontal period. Here, the level value of FIG. 6 may be understood as an exemplary numerical value for expressing an amplitude rather than an actual voltage level. In addition, the value of the column signal is exemplarily expressed between 8 levels divided into a range of 0 and 7. The value of the column signal may be expressed in various levels according to the resolution for expressing brightness, and may be expressed in resolutions such as 16 levels, 32 levels, or 64 levels, for example.

The embodiment of the present invention can be operated by the column signals and row signals provided as shown in FIGS. 5 and 6, and the column signal is sampled by the row signals according to the embodiment of the present invention, referring to FIG. can be understood by reference.

In FIG. 7 , FR1 and FR2 indicate the frame period of the backlight, HL1 to HL4 indicate the horizontal period of the backlight, D1 indicates a column signal, and G1 to G4 indicate a row signal. Also, "4, 3, 1, 5" of the column signal D1 indicates the level, that is, the amplitude, of the column signal shown in FIG. 6 .

In this case, the embodiment of the present invention controls the driving current by the level, that is, the amplitude, of the pulse-in-column signal, which means that the driving current is controlled by Pulse Amplitude Modulation (hereinafter referred to as "PAM"). can be understood

7 is a waveform diagram illustrated to explain the operation of a current control integrated circuit according to PAM.

Referring to FIG. 7, at the horizontal period HL1 of the frame FR1, the column signal D1 is provided to the current control integrated circuit T11 at level “4”, and at the horizontal period HL1, the row signal G1 is a level for sampling (eg “ high"). In this case, the current control integrated circuit T11 generates a sampling voltage obtained by sampling the column signal of level "4" using the low signal G1, and generates a driving current of level "4" corresponding to the level of the sampling voltage for light emission. O1 is controlled to flow through the light emitting diode channel CH11. The sampling voltage of the current control integrated circuit T11 is maintained until the horizontal period HL1 of the next frame FR2. Therefore, the current control integrated circuit T11 maintains the drive current O1 of the light emitting diode channel CH11 of level "4" until the horizontal cycle HL1 of the next frame FR2.

The column signal D1 changes to levels "3", "1", "5" corresponding to horizontal periods HL2, HL3, and HL4 sequentially following the horizontal period HL1. The current control integrated circuit T11 generates a sampling voltage by sampling a column signal using the row signals G2, G3, and G4 sequentially provided for each horizontal period, and generates a driving current O2 corresponding to the level of the sampling voltage for light emission. Control so that O3 and O4 flow.

The sampling voltage generated using the respective low signals G2, G3, and G4 of the current control integrated circuit T11 is maintained until the horizontal cycles HL2, HL3, and HL4 of the next frame FR2. Therefore, the current control integrated circuit T11 maintains the levels of the driving currents O2, O3, and O4 of the light emitting diode channel CH11 to maintain the level of brightness corresponding to the column signal D1 of each horizontal period until the next frame FR3.

In addition, the sampling voltages sampled by each of the low signals G2, G3, and G4 of the current control integrated circuit T11 are maintained for one frame period as described above and reset to have a level corresponding to the current column signal in units of frame periods. can be understood as being

That is, the current control integrated circuit T11 generates sampling voltages for each of the light emitting diode channels CH11, CH21, CH31, and CH41 in response to the column signal D1 and the row signals G1 to G4, and uses the sampling voltages to generate each sampling voltage. The driving current between the control terminals TO1 to TO4 corresponding to the low side of the light emitting diode channels CH11, CH21, CH31, and CH41 and the ground GND is controlled.

For the above-described operation, the current control integrated circuit T11 may be implemented as shown in FIG. 8 .

The current control integrated circuit T11 is configured to include a buffer BF, drive current control units 101 to 104, a feedback signal providing unit 300, a monitor signal providing unit 400, and a temperature detection unit 500.

The buffer BF is configured to receive the column signal D1 through the column input terminal TD1 and commonly provide the received column signal D1 to the driving current controllers 101 to 104 . The buffer BF is illustrated as being commonly configured in the driving current controllers 101 to 104, but may be designed to be mounted inside each of the driving current controllers 101 to 104.

Each of the drive current controllers 101 to 104 generates a sampling voltage VC obtained by sampling the column signal D1 as the row signals G1 to G4 of the corresponding light emitting diode channel, and uses the sampling voltage VC to generate a sampling voltage VC connected to the control terminals TO1 to TO4. It is configured to control driving currents O1 to O4 of the light emitting diode channels CH11, CH21, CH31, and CH41.

By referring to the drive current controller 101 as a representative, the configuration and operation of the drive current controllers 101 to 104 will be described. The configuration of the drive current controllers 102 to 104 may be understood to be the same as that of the drive current controller 101 .

First, the drive current controller 101 is configured to receive the column signal D1, the low signal G1, the temperature detection signal TP, and the zoom control signal CZ and control the drive current O1.

The driving current controller 101 includes an internal circuit 200 and a channel detector 210 .

In the case of FIG. 8 , the internal circuit 200 includes a holding circuit 202 and a channel current controller 204 .

The holding circuit 202 is configured to generate a sampling voltage VC obtained by sampling the column signal D1 with the low signal G1 and hold the sampling voltage VC. To this end, the holding circuit 202 includes a switch (SW) for switching transmission of the column signal D1 by the low signal G1 and a capacitor (C) for generating a sampling voltage VC obtained by sampling the column signal D1 transferred through the switch (SW). ). The capacitor C performs sampling charging the column signal D1 transmitted through the switch SW while the low signal G1 is enabled, and stores and generates a sampling voltage VC corresponding to the sampling result. Also, the capacitor C may provide the sampling voltage VC to the channel current controller 204 while maintaining the sampling voltage VC.

The channel current controller 204 is configured to control the amount of driving current O1 for light emission of the light emitting diode channel CH11 connected to the control terminal TO1 by using the sampling voltage VC of the capacitor C. The channel current controller 204 may be configured to have a dependent current source gm that controls the flow of the drive current O1 to have an amount that controls the level of the sampling voltage VC. The slave current source gm may receive the temperature detection signal TP and the zoom control signal CZ, and the flow of the driving current is blocked by the temperature detection signal TP or the amplified driving current flows according to the level of the zoom control signal CZ. It can be configured as a list.

Meanwhile, the channel detector 210 may be configured to provide a first detection signal CD1 and a second detection signal CD2 by detecting a voltage between the control terminal TO1 and the ground GND.

Here, the first detection signal CD1 determines whether the voltage between the control terminal TO1 and the ground GND is equal to or less than the first level, and the second detection signal CD2 determines the voltage between the control terminal TO1 and the ground GND. It is determined whether it is lower than the second level lower than the first level. The first detection signal CD1 and the second detection signal CD2 may be provided to have a high level when the conditions are met.

The driving current O1 may be reduced when the light emitting voltage VLED applied to the light emitting diode channel CH11 is lower than the minimum light emitting voltage. Therefore, when the light emitting voltage VLED is regulated above the minimum light emitting voltage, the driving current O1 is also regulated, and as a result, the brightness of the light emitting diode channel CH11 can be maintained constant. The detection signal CD1 is for regulation of the driving current O1 described above, and is activated to a high level when the voltage between the control terminal TO1 and the ground GND is lowered to a preset level (eg, 0.5V) or less. can be provided. The first detection signal CD1 may be provided to the feedback signal provider 300 .

The driving current O1 may be blocked or may flow abnormally when an open or short occurs in the light emitting diode channel CH11. In this case, the second detection signal CD2 is activated to a high level and provided when the voltage between the control terminal TO1 and the ground GND is lowered to a preset level lower than the first level (eg, 0.2V). can The second detection signal CD2 may be provided to the monitor signal providing unit 400 .

On the other hand, the feedback signal providing unit 300 controls the feedback signal FB by controlling the current between the feedback terminal TFP and the ground GND in response to each of the first detection signals CD1 of the driving current controllers 101 to 104 is configured to

To this end, the feedback signal providing unit 300 may include an OR gate and a current driving transistor, and the OR gate is driven with current in response to at least one of the first detection signals CD1 of the driving current controllers 101 to 104. It is for controlling the gate of the transistor, and the current driving transistor controls the feedback signal FB to a low level in response to the high level output of the OR gate and controls the feedback signal FB to a high level in response to the low level output of the OR gate. there is.

That is, the feedback signal providing unit 300 may control the feedback signal FB to a low level when the driving current of at least one of the driving current controllers 101 to 104 is lower than a preset level.

And, the temperature detection unit 500 is configured to provide a temperature detection signal TP obtained by sensing the temperature of the current control integrated circuit T11 composed of chips. For example, the temperature detection unit 500 may provide a temperature detection signal TP activated to a high level when the temperature of the current control integrated circuit T11 rises above a preset temperature.

When the temperature detection signal TP is activated by the temperature detection unit 500 detecting a temperature equal to or higher than a preset temperature, the current flow of the slave current source gm is blocked by the activated temperature detection signal TP. Conversely, when the temperature detection signal TP is deactivated because the temperature detection unit 500 detects a temperature lower than a preset temperature, the current flow of the slave current source gm is not affected by the temperature detection signal TP. The temperature detection unit 500 is to protect the integrated circuit and the backlight device from overheating by controlling the driving current flowing in the LED channel to be blocked or released.

Also, the monitor signal providing unit 400 receives the second detection signals CD2 and the low signals G1 to G4 of the driving current controllers 101 to 104, and generates a low signal of at least one driving current controller 104 and When the second detection signal CD2 is activated at a high level, the monitor signal MON is controlled by controlling the current between the monitor terminal TMON and the ground GND.

In addition, the monitor signal providing unit 400 is configured to control the monitor signal MON by controlling the current between the monitor terminal TMON and the ground GND according to the temperature detection signal TP.

To this end, the monitor signal providing unit 400 may include an OR gate circuit and a current driving transistor. Here, the OR gate circuit may be configured to turn on the current driving transistor when the low signal of the at least one driving current controller and the second detection signal CD2 are activated at a high level or the temperature detection signal TP is activated at a high level. there is. To this end, the OR gate circuit includes first NAND gates that compare the LO signal of each of the driving current controllers 101 to 104 with the second detection signal CD2, second NAND gates that compare outputs of the first NAND gates, and second NAND gates that compare outputs of the first NAND gates. An OR gate for combining the output of the NAND gate and the temperature detection signal TP may be provided. Since the above-described OR gate circuit can be variously implemented by a manufacturer, a detailed configuration description and operation of the drawings will be omitted. Also, the current driving transistor may be configured using an NMOS transistor.

According to the configuration described above, the monitor signal providing unit 400 controls the drive current controllers 101 to 104 when at least one low signal G1 to G4 of the drive current controllers 101 to 104 is enabled at a high level. When the second detection signal CD2 of ) is activated to a high level, the monitor signal MON can be controlled to a low level by turning on the current driving transistor. Also, the monitor signal provider 400 may control the monitor signal MON to a low level by turning on the current driving transistor when the temperature detection signal TP is activated to a high level.

The above-described monitor signal MON is provided to a timing controller (not shown) or a separate application, so that it can be used to control the abnormal operation of the backlight device.

Meanwhile, the zoom control signal CZ is for controlling the resolution of a low driving current region of a light emitting diode channel controlled by the sampling voltage VC. It can be understood that when the resolution of the driving current is increased by the zoom control signal CZ, the resolution of brightness that can be expressed by the driving current is increased.

The zoom control signal CZ may be provided outside of the current control integrated circuit T11.

The zoom control signal CZ may be provided with the same value for all LED channels of the backlight board 40 or LED channels of a control unit.

In addition, the zoom control signal CZ may be provided for each light emitting diode channel to have a value corresponding to data for light emission, ie, a column signal, for each light emitting diode channel.

In addition, the brightness range represented by the column signal may be divided into a high current area brighter than a predetermined reference brightness and a current area lower than the reference brightness, and the zoom control signal CZ is different for the high current area and the low current area. Values can be provided.

That is, the zoom control signal CZ may be provided to have a value for controlling the driving current so that the low current range has a higher resolution than the high current range.

For example, the zoom control signal CZ may be provided with 0V for a driving current of 10mA or more with a high brightness level, and the zoom control signal CZ with 5V for a driving current with a low brightness level of less than 10mA. When the zoom control signal CZ is provided as 0V, the driving current may be controlled in the basic current range corresponding to the basic voltage range of the column signal D. In addition, when the zoom control signal CZ is provided at 5V, the driving current may be finely controlled to a driving current in the range of 0 mA to 10 mA in a voltage range wider than the basic voltage range of the column signal D. That is, when the zoom control signal CZ is provided at 5V, the amount of driving current at low brightness can be more finely controlled to have high resolution.

As described above, the zoom control signal CZ has a control value to have a first resolution for a driving current corresponding to a current range equal to or greater than a predetermined reference level, and has a value higher than the first resolution for a driving current corresponding to a current range less than the reference value. It may be provided to have a value controlling to have the second resolution.

That is, the resolution of the expression range of the brightness of a specific driving current may be increased by the zoom control information CZ.

In the embodiments illustrated in FIGS. 1 to 8 described above, the brightness level of the light emitting diode channel can control the driving current of the light emitting diode channel by the level, that is, the amplitude of the column signal.

The operation of the backlight board 40 of the present invention can be understood by the above description of FIGS. 1 to 8 .

The backlight device of the present invention may include a plurality of backlight boards 40 for providing a backlight, and each backlight board 40 includes a plurality of current control integrated circuits and a plurality of light emitting diode channels.

In the backlight board 40, a column signal is input to the current control integrated circuit, and the light emitting diode channel emits light to have brightness according to current control of the current control integrated circuit corresponding to the column signal.

All LED channels should emit light with the same brightness for the same column data. However, the brightness of the LED channels may vary for the same column data due to a current deviation caused by a current control integrated circuit.

It can be understood that the current deviation is caused by an offset voltage of the buffer BF inside the current control integrated circuit T11.

In addition, it can be understood that the current deviation is caused by the deviation of the gain of the dependent current source gm that contributes to the driving current of the light emitting diode channel.

The above-described deviation of the gain of the dependent current source gm may be formed differently for each light emitting diode channel, and acts as a cause of causing a current deviation with respect to a driving current for light emission of the light emitting diode channels of the backlight board 40 .

As a result, the LED channels may emit light with different brightnesses corresponding to the same column data.

The current deviation generated for the above reason may have a greater effect on the uniformity of brightness of the LED channel for the current in the low current band than the current in the high current band.

The present invention discloses an embodiment for compensating for the current deviation described above.

A light emitting block may be defined for description of the present invention. The light emitting block is a basic unit for controlling dimming, and may be understood to include at least one light emitting diode channel included in a preset zone on the backlight board 40 . For convenience of description, an embodiment of the present invention is illustrated as one light emitting diode channel forming one light emitting block. With the above example, the light emitting diode channel will be described as a light emitting block. And, it can be understood that the light emitting blocks have the above current deviation.

In an embodiment of the present invention, offset correction data corresponding to the offset voltage deviation of the buffer BF and gain correction data corresponding to the gain deviation of the dependent current source gm are provided for each light emitting block in order to solve the current deviation. can be created The offset voltage of the buffer BF is controlled as the offset correction data and the gain of the dependent current source gm is controlled as the gain correction data, and as a result, the current deviation can be eliminated.

Current control integrated circuits are fabricated using wafers. The wafer goes through a plurality of semiconductor processes so that current control integrated circuits can be implemented for each cell area, and when current control integrated circuits are formed for each cell area on the wafer, the current control integrated circuits can be tested at the wafer level.

A wafer level test for a plurality of current control integrated circuits is performed by a test facility. The test equipment obtains the current deviation due to the offset voltage deviation of the current control integrated circuit and the gain deviation of the dependent current source, respectively, stores the obtained value in its memory, and after the test is completed, the memory provided in each current control integrated circuit. Units can be updated.

As described above, after offset correction data and gain correction data are updated in the memory of the memory unit of each current control integrated circuit, each current control integrated circuit can be individually mass-produced through wafer sawing and chip packaging.

An embodiment for solving the current deviation as described above can be described with reference to FIG. 9 .

9 illustrates one current control integrated circuit T11.

The current control integrated circuit T11 of FIG. 9 may include a buffer BF, a plurality of driving current controllers 101 to 104, and a memory unit 900.

Here, the buffer BF may be understood to have the same configuration and function as that of FIG. 8 . However, unlike FIG. 8 , the buffer BF of FIG. 9 may receive offset correction data D_OS and have an offset voltage controlled according to a value of offset control data D_OS. The buffer BF of FIG. 9 may include an offset controller V1 as shown in FIG. 10 to control the offset voltage. The offset control unit V1 may control the offset voltage of the buffer BF in response to the offset correction data D_OS. The configuration and operation of the buffer BF of FIG. 10 will be described later.

The plurality of driving current controllers 101 to 104 receive the column signal D1 output from the buffer BF and the row signals G1 to G4 corresponding to the plurality of light emitting blocks of the control unit, and drive the light emitting blocks to emit light. It is configured to control currents O1 to O4. It can be understood that the plurality of driving current controllers 101 to 104 have the same configuration and function as those of FIG. 8 . However, in the driving current controllers 101 to 104 of FIG. 9 , the dependent current sources gm may be configured to further receive gain correction data GA1 to GA4 unlike FIG. 8 . The dependent current source gm of FIG. 9 described above may include a gain control unit VR as shown in FIG. 11 to control a gain for driving the driving current. The configuration and operation of the dependent current source gm of FIG. 11 will be described later.

The memory unit 900 provides offset correction data D_OS for controlling the offset voltage deviation of the buffer BF and gain for controlling the gain deviation of the dependent current sources gm of the plurality of driving current controllers 101 to 104. Stores correction data GA1 to GA4.

The memory unit 900 may store a value corresponding to a difference between a voltage level of a column signal reaching a preset target value of driving current and a reference voltage level corresponding to the target value as offset correction data D_OS for each of a plurality of light emitting blocks. there is.

For example, the target value of the driving current may be set to 200uA, and the reference voltage level corresponding to the target value may be defined as 100mV. To obtain the offset correction data D_OS, the drive current rises from the lowest level to the target value of 200uA, and the difference between the voltage of the column signal corresponding to the drive current reaching the target value of 200uA and the reference voltage level of 100mV is obtained, and this difference is It can be set as offset correction data D_OS.

In addition, the memory unit 900 obtains a slope value expressing a proportional relationship between a change in the driving current and a voltage change of the column signal within a preset range for each of a plurality of light emitting blocks, and obtains a slope value between the obtained slope value and a preset reference slope value. The difference in may be stored as gain correction data GA1 to GA4 of the dependent current sources gm of the plurality of driving current controllers 101 to 104 .

Exemplarily, a slope value representing a proportional relationship between a change in driving current and a change in voltage of a column signal within a range of 100uA to 500uA is obtained. If the preset reference slope value is illustratively “1”, the difference between the obtained slope value and the reference slope value set to “1” may be set as gain correction data of the dependent current sources gm of the corresponding drive current controller.

The above memory unit is configured to include a memory LUT_M and registers REG_OS and REG_GA.

The memory LUT_M may include a serial interface unit S-IF that receives updated data, a memory core that stores data, and a memory controller that controls output of data. The memory LUT_M may be configured using a non-volatile memory, stores offset correction data D_OS and gain correction data GA1 to GA4 in the form of a lookup table, and responds to requests of the registers REG_OS and REG_GA. It can be configured to provide data.

The register REG_OS reads and stores offset correction data in the memory LUT_M and provides offset correction data D_OS stored in the offset controller V1 of the buffer BF.

Also, the register REG_GA reads and stores the gain correction data of the memory LUT_M, and provides the gain correction data GA1 to GA4 to the dependent current sources gm of the respective driving current controllers 101 to 104.

The registers REG_OS and REG_GA may receive a power-on reset signal POR, and may be configured to read and provide data from the memory LUT_M at the time of power-on by the power-on reset signal POR.

Also, the memory LUTM may receive offset correction data D_OS and gain correction data GA1 to GA4 from the outside at the time of power-on, and update the received data to a lookup table.

Meanwhile, the buffer BF receiving the offset correction data D_OS from the register REG_OS may be configured as shown in FIG. 10 .

Referring to FIG. 10, the buffer BF is configured to include an amplifier CB and an offset controller V1.

More specifically, the amplifier CB has a first input terminal (positive input terminal, +) receiving the column signal D1, a second input terminal (negative input terminal, -) to which an offset voltage is applied, and a column signal from which the offset voltage is subtracted. An output stage may be provided.

A resistor R2 for feedback of the outputted column signal is formed between the output terminal and the second input terminal of the amplifier CB.

Also, a resistor R1 forming an offset voltage may be configured at the second input terminal of the amplifier CB, and it may be understood that the resistor R1 is equivalently configured.

And, the offset controller V1 is connected to the resistor R1. The offset controller V1 may receive the offset correction data D_OS and control the offset voltage of the second input terminal in response to the offset correction data D_OS.

To this end, the offset control unit V1 may be configured to have a changed resistance value corresponding to the offset correction data D_OS, and may control the offset voltage by the resistance value. The offset control unit V1 whose resistance value is changed in response to the offset correction data D_OS may be illustratively configured using a resistance string composed of individually selectable resistors, and the resistance acting as a resistance according to the offset correction data D_OS is It can be configured to control the offset voltage by being selected.

Meanwhile, the dependent current source gm receiving the gain correction data GA1 to GA4 from the register REG_GA may be configured as shown in FIG. 11 .

Referring to FIG. 11, the dependent current source gm includes an amplification circuit and a transistor Q1, the amplification circuit is configured to amplify and output the sampling voltage VC according to a gain, and the transistor Q1 is connected to the output of the amplification circuit. It is configured to control the amount of drive current O1 correspondingly.

The amplifier circuit is configured to include a gain control unit VR and an amplifier GB. The gain controller VR is configured to control the gain of the amplifier GB by having a changed resistance value corresponding to the gain correction data GA1. Further, the amplifier GB has a first input terminal (positive input terminal, +) receiving the sampling voltage VC, a second input terminal (negative input terminal, -) commonly connected to the gain control unit VR and the source of the transistor Q1, and It is configured to have an output end providing an output corresponding to a voltage difference between the first input end and the second input end.

A resistor R3 for feedback of the source of the transistor Q1 is formed between the output terminal and the second input terminal of the amplifier CB.

As a result, the amplifier CB has a gain corresponding to the change in the resistance value of the gain control unit VR, and can control the amount of the driving current O1 by the gain changed by the gain correction data GA1.

In an embodiment of the present invention, when the offset voltage of the buffer BF is changed without changing the gain of the dependent current source gm, as shown in FIG. 12, only the level of the offset voltage is changed, and the change ratio between the column signal and the driving current, that is, the gain It is fixed.

In an embodiment of the present invention, when the gain of the dependent current source gm is changed without changing the offset voltage of the buffer BF, as shown in FIG. 13, the change ratio between the column signal and the driving current, that is, the gain, is changed, and the level of the offset voltage is changed. is fixed.

Meanwhile, FIG. 14 is a graph illustrating an example of improving the current deviation according to the present invention.

According to the embodiment of FIG. 9, the present invention can change the offset voltage of the buffer BF and the gain of the dependent current source gm using the offset correction data D_OS and the gain correction data GA1 to GA4, and as a result, the driving current Current deviation can be improved as shown in FIG. 14 .

Therefore, all light-emitting blocks can emit light with the same brightness for the same color data.

Meanwhile, the present invention may be modified to include a plurality of buffers BF in one current control integrated circuit T11. An embodiment of this can be understood with reference to FIG. 15 . In FIG. 15, the same parts as those in FIG. 9 are denoted by the same reference numerals, and redundant descriptions are omitted.

In Fig. 15, a plurality of buffers BF are configured to jointly receive the column signal D1. Also, the plurality of driving current controllers 101 to 104 are configured to correspond to the plurality of buffers BF. That is, each driving current controller 101 to 104 is configured to receive a column signal output from a corresponding buffer BF.

Since the plurality of buffers BF may have the same configuration as the buffer BF described with reference to FIGS. 9 and 10 , redundant description thereof will be omitted.

Each of the buffers BF described above has an offset voltage controlled by the offset controller V1, and may provide a column signal from which the offset voltage is subtracted to the corresponding drive current controllers 101 to 104.

The memory unit 900 stores offset correction data for controlling offset voltage deviations of a plurality of buffers. The offset correction data of the memory unit 900 is the difference between the voltage level of the column signal D1 reaching the preset target value of the driving current and the reference voltage level corresponding to the target value for each buffer BF and each plurality of light emitting blocks. Values corresponding to can be stored as offset correction data D_OS1 to D_OS4.

Also, the memory unit 900 may store gain correction data GA1 to GA4 for controlling gain deviations of the dependent current sources gm of the plurality of driving current controllers 101 to 104 .

The memory (LUT_M) of the memory unit 900 stores offset correction data D_OS1 to D_OS4 and gain correction data GA1 to GA4 in the form of a lookup table, and is configured to provide corresponding data in response to requests from registers (REG_OS, REG_GA) It can be.

The register REG_OS is for reading and storing offset correction data D_OS1 to D_OS4 of the memory LUT_M and providing the offset correction data D_OS1 to D_OS4 stored in the offset controller V1 of the plurality of buffers BF.

Also, the register REG_GA reads and stores the gain correction data of the memory LUT_M, and provides the gain correction data GA1 to GA4 to the dependent current sources gm of the respective driving current controllers 101 to 104.

In the embodiment of FIG. 15 , the offset voltage of the buffer BF and the gain of the dependent current source gm can be changed using the offset correction data D_OS1 to D_OS4 and the gain correction data GA1 to GA4, and as a result, the current deviation of the driving current It can be improved as shown in FIG. 14.

As described above, according to the present invention, the sampling voltage of the capacitor that samples the column signal is maintained during the frame period, and the drive current of the LED channel can be controlled so that light emission is maintained in frame units by the sampling voltage maintained during the frame period. As a result, flicker caused by the backlight device of the display can be reduced or eliminated.

In addition, in the present invention, since a current control integrated circuit is configured for each control unit including a plurality of light emitting diode channels, it is possible to ensure convenience in design and manufacture for controlling driving currents of light emitting diode channels on a backlight board.

In addition, the present invention can improve the gray uniformity and the dark uniformity evaluated in the low current band by eliminating the current deviation of the light emitting diode channel due to the offset voltage that can act relatively large in the low current band.

In addition, the present invention can improve light emission uniformity by compensating for current deviation caused by an offset voltage in light emitting diode channels of a backlight device by storing current deviation compensation data in a storage unit and compensating column data with the current deviation compensation data.

Claims (27)

a buffer receiving a column signal and having an offset controller;
a plurality of drive current controllers that receive the column signal output from the buffer and row signals corresponding to the plurality of light emitting blocks of the control unit, and control driving currents for light emission of the light emitting blocks; and
A memory unit for storing offset correction data for controlling a deviation of the offset voltage of the buffer;
Each of the driving current control units generates a sampling voltage obtained by sampling the column signal as the low signal, and controls the driving current of the light emitting block using the sampling voltage;
The offset controller controls the offset voltage in response to the offset correction data,
The buffer has the offset voltage controlled by the offset controller, and provides the column signal from which the offset voltage is subtracted to the plurality of driving current controllers. The method of claim 1, wherein the buffer,
an amplifier having a first input terminal receiving the column signal, a second input terminal receiving the offset voltage, and an output terminal outputting the column signal from which the offset voltage is subtracted; and
A current control integrated circuit of a backlight device for a display comprising: the offset control unit controlling the offset voltage of the second input terminal in response to the offset correction data. According to claim 2,
The offset controller has a resistance value changed in response to the offset correction data, and controls the offset voltage by the resistance value. According to claim 1,
The memory unit, for each of the plurality of light emitting blocks, uses a value corresponding to a difference between a voltage level of the column signal reaching a predetermined target value of the driving current and a reference voltage level corresponding to the target value as the offset correction data. Current control integrated circuit of backlight device for display to store. The method of claim 1, wherein the memory unit,
a memory for storing the offset correction data; and
A current control integrated circuit of a backlight device for a display comprising: a register for reading and storing the offset correction data in the memory and providing the offset correction data to the offset controller of the buffer. According to claim 5,
The register is a current control integrated circuit of a backlight device for a display that executes reading and providing data of the memory at the time of power-on. According to claim 5,
The memory is a current control integrated circuit of a backlight device for a display that receives and updates the offset correction data from the outside at the time of power-on. According to claim 1,
The drive current controller,
a holding circuit that generates the sampling voltage by sampling the column signal as the low signal and maintains the sampling voltage; and
A current control integrated circuit of a backlight device for a display comprising: a channel current controller for controlling the driving current of the light emitting block by using the sampling voltage. According to claim 8,
The channel current controller includes a dependent current source that controls the driving current;
The memory unit further stores gain correction data for controlling a gain deviation of the dependent current source;
wherein the dependent current source has a gain controlled to correspond to the gain correction data, and controls an amount of the driving current in response to the gain. According to claim 9,
The memory unit obtains a slope value representing a proportional relationship between a change in the driving current and a voltage change of the column signal within a preset range for each of the plurality of light emitting blocks, and the difference between the obtained slope value and the preset reference slope value is determined as A current control integrated circuit of a backlight device for a display to store as gain correction data. 11. The method of claim 10, wherein the memory unit,
a memory for storing the offset correction data and the gain correction data;
a first register for reading and storing the offset correction data in the memory and providing the offset correction data to the offset controller of the buffer; and
A current control integrated circuit of a backlight device for a display comprising: a second register for reading and storing the gain correction data in the memory and providing the gain correction data to the subordinate current source of each driving current controller. According to claim 11,
Wherein the first register and the second register read and provide data from the memory at the time of power-on. According to claim 11,
The memory is a current control integrated circuit of a backlight device for a display that receives and updates the offset correction data and the gain correction data from the outside at the time of power-on. 10. The method of claim 9, wherein the dependent current source,
an amplifier circuit that amplifies and outputs the sampling voltage according to the gain; and
A transistor controlling the amount of the driving current in response to the output of the amplifier circuit;
The amplification circuit,
a gain controller having a resistance value changed in response to the gain correction data; and
An amplifier having a first input terminal receiving the sampling voltage, a second input terminal connected in common with the gain control unit and the source of the transistor, and an output terminal providing an output corresponding to a voltage difference between the first input terminal and the second input terminal. including;
The amplifier is a current control integrated circuit of a backlight device for a display having the gain corresponding to the change in the resistance value of the gain controller. According to claim 1,
The plurality of driving current controllers control the driving currents of the low side of the plurality of light emitting blocks. a buffer receiving a column signal;
A dependent current source for receiving the column signal output from the buffer and row signals corresponding to the plurality of light emitting blocks of the control unit, controlling driving currents for light emission of the light emitting blocks, and controlling the driving current, respectively. a plurality of drive current controllers; and
A memory unit for storing gain correction data for controlling a gain deviation of the dependent current source;
Each of the driving current control units generates a sampling voltage obtained by sampling the column signal as the low signal, and controls the driving current of the light emitting block using the sampling voltage;
The current control integrated circuit of the backlight device for a display, characterized in that the dependent current source controls the amount of the drive current in response to the gain. According to claim 16,
The drive current controller,
a holding circuit that generates the sampling voltage by sampling the column signal as the low signal and maintains the sampling voltage; and
a channel current controller including the slave current source and controlling the driving current of the light emitting block using the sampling voltage;
wherein the dependent current source has a gain controlled to correspond to the gain correction data, and controls an amount of the driving current in response to the gain. According to claim 16,
The memory unit obtains a slope value representing a proportional relationship between a change in the driving current and a voltage change of the column signal within a preset range for each of the plurality of light emitting blocks, and the difference between the obtained slope value and the preset reference slope value is determined as A current control integrated circuit of a backlight device for a display to store as gain correction data. 17. The method of claim 16, wherein the memory unit,
a memory for storing the gain correction data; and
A current control integrated circuit of a backlight device for a display comprising: a register for reading and storing the gain correction data in the memory and providing the gain correction data to the dependent current source of each driving current controller. According to claim 19,
The register is a current control integrated circuit of a backlight device for a display that executes reading and providing data of the memory at the time of power-on. According to claim 19,
The memory is a current control integrated circuit of a backlight device for a display that receives and updates the gain correction data from the outside at the time of power-on. 18. The method of claim 17, wherein the dependent current source,
an amplifier circuit that amplifies and outputs the sampling voltage according to the gain; and
A transistor controlling the amount of the driving current in response to the output of the amplifier circuit;
The amplification circuit,
a gain controller having a resistance value changed in response to the gain correction data; and
An amplifier having a first input terminal receiving the sampling voltage, a second input terminal connected in common with the gain control unit and the source of the transistor, and an output terminal providing an output corresponding to a voltage difference between the first input terminal and the second input terminal. including;
The amplifier is a current control integrated circuit of a backlight device for a display having the gain corresponding to the change in the resistance value of the gain controller. a plurality of buffers that jointly receive column signals and have an offset controller;
configured to correspond to the plurality of buffers, receive row signals corresponding to the plurality of light emitting blocks of the control unit and the column signal output from the corresponding buffer, and control driving currents for light emission of the light emitting blocks a plurality of drive current controllers; and
A memory unit for storing offset correction data for controlling offset voltage deviations of the plurality of buffers;
Each of the driving current control units generates a sampling voltage obtained by sampling the column signal as the low signal, and controls the driving current of the light emitting block using the sampling voltage;
The offset controller controls the offset voltage in response to the offset correction data,
Each of the buffers has the offset voltage controlled by the offset controller, and provides the column signal from which the offset voltage is subtracted to the corresponding driving current controller. . The method of claim 23, wherein the buffer,
an amplifier having a first input terminal receiving the column signal, a second input terminal receiving the offset voltage, and an output terminal outputting the column signal from which the offset voltage is subtracted; and
A current control integrated circuit of a backlight device for a display comprising: the offset control unit controlling the offset voltage of the second input terminal in response to the offset correction data. According to claim 24,
The offset controller has a resistance value changed in response to the offset correction data, and controls the offset voltage by the resistance value. According to claim 23,
The memory unit stores a value corresponding to a difference between a voltage level of the column signal reaching a predetermined target value of the driving current and a reference voltage level corresponding to the target value for each buffer and each of the plurality of light emitting blocks. A current control integrated circuit of a backlight device for a display to store as offset correction data. 24. The method of claim 23, wherein the memory unit,
a memory for storing the offset correction data; and
A current control integrated circuit of a backlight device for a display comprising: a register for reading and storing the offset correction data in the memory and providing the offset correction data to the offset controller of the buffer.

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