KR102507174B1 - A control apparatus and method of a monitor for reducing the power consumption of a monitor - Google Patents

Abstract

The present invention provides a monitor control device and method for reducing power consumption through pixel data modulation for saving monitor power by blanking some pixel data to reduce the total amount of pixel data to be processed and saving power while suppressing flicker without lowering overall resolution by differently modulating the positions of blanking pixels for each frame. An MCU (31,) which performs the overall control operation of a monitor control unit and performs pixel data modulation, analyzes pixel data input from a video processor (32), outputs the pixel data modulated to blank some pixels to a timing controller (33), and outputs the pixel data modulated through the timing controller (33) to a source driver circuit (83) of an LCD panel (80) to control the pixel data so that some pixels are blanked, but the blanking positions of adjacent frames do not overlap each other.

Description

A control apparatus and method for reducing power consumption through pixel data modulation

The present invention relates to a monitor control apparatus and method for reducing power consumption through pixel data modulation. In particular, by blanking some pixel data to reduce the amount of pixel data to be processed, the monitor saves power, but pixels blanked for each frame. It relates to a monitor control apparatus and method for reducing power consumption through pixel data modulation, which modulates the position of .

In general, a computer reduces power consumption by turning off the screen in a standby mode (power saving mode) or a monitor power off mode during use. At this time, the monitor screen is turned off, but power is continuously supplied to the monitor to consume power. That is, even when the screen is turned off, standby power is continuously supplied to the control board of the monitor, resulting in unnecessary standby power consumption.

Therefore, various studies have been conducted to prevent power waste by cutting off the supply power without removing the plug for supplying commercial power to the monitor. As an example, Korean Patent Publication No. 2013-0109060 (Computer and computer peripherals) The prior art disclosed in the standby power blocking device) includes a power switching unit at the front end of the power supply to the computer, and cuts off the power of the computer as well as peripheral devices (monitors) when the computer is turned off to cut off standby power.

That is, as shown in FIG. 1, the first prior art, as shown in FIG. 1, includes a power switching unit 20 that receives external commercial power and provides operating power for each component inside the computer, and cuts off / shuts off power to peripheral devices. It is provided with an outlet power switching unit 19 and a peripheral device outlet 18 for supplying power, and when the computer is in standby mode (power saving mode), it controls the outlet power switching unit 19 using memory power to supply power to computer peripheral devices. Turn off the power (AC power). Through this process, standby power is blocked to prevent waste of power saving.

However, the first prior art has the advantage of preventing power waste of peripheral devices when the computer is turned off or in power saving mode, but the computer has a power switching unit 20, an outlet power switching unit 19, and a peripheral device outlet ( 18), the configuration of the computer becomes complicated, and the implementation cost of the device for power saving is high, so it is difficult to easily apply it to the actual computer and peripheral devices.

As a second prior art to solve this problem, Korean Patent Publication No. 2015-0123435 (a device for cutting off standby power of a monitor through computer linkage) is disclosed. Provides a monitor standby power blocking device through computer linkage that automatically cuts off standby power of the monitor using a VGA signal and automatically supplies power to the monitor when the computer is running to minimize user operation and improve convenience. will be.

That is, the second prior art, without adding a separate configuration for blocking the standby power of the monitor in the computer, by using only the VGA signal transmitted from the existing computer to the monitor to block the standby power of the monitor, It is to provide a monitor power blocking device through a computer linkage that simplifies the configuration for blocking standby power and minimizes device implementation costs.

Referring to this in detail with reference to FIGS. 2 and 3, as shown in FIG. 2, the monitor standby power blocking device through computer interworking according to the second prior art, the input device 10, the computer body 100 and the monitor Includes (200). The computer body 100 generates a digital interface signal (DVI signal) for controlling standby power of the monitor 200 and transfers it to the monitor 200 . The computer body 100 includes an input/output board 110 that interfaces the input signal of the input device 10, a power supply unit 140 that supplies driving power to the computer body 100, and output from the input/output board 110. A central processing unit (CPU) 120 that determines whether the computer is in use or not in use based on an input signal or a signal according to switch operation and controls the output of a digital interface signal according to the determined computer state, A VGA board 150 generating digital interface signals to the monitor 200 under the control of the CPU 120 and a memory 130 connected to the CPU 120 are included.

Preferably, the computer body 100 differentially generates the digital interface signal according to a power-on state, a power-off state, and a power-save state.

In addition, the digital interface signal uses a VGA signal transmitted from the computer body 100 to the monitor 200, and in the power-on state, the VGA signal is generated as a high signal (5V), and in the power-off state Alternatively, in a power saving state, the VGA signal is generated as a low signal (0V).

The monitor 200 serves to cut off or supply power by using a digital interface signal generated from the computer body 100 as a power control signal.

The monitor 200 has a video connector 220 for interfacing a digital interface signal (DVI; Digital Visual Interface) output from the computer body 100, and switching according to the digital interface signal received from the video connector 220. A DC voltage cutoff unit 230 that controls power by blocking or supplying the monitor operating power supply (DC12V) output from the mode power supply (SMPS) 210, and the monitor operating power supplied by the DC voltage cutoff unit 230 and a monitor control board 240 that controls the entire operation of the monitor by driving the monitor. Here, when the computer body 100 and the video connector 220 are connected in a High-Definition Multimedia Interface (HDMI) method, the digital interface signal is replaced with an HDMI signal.

As shown in FIG. 2, the DC voltage blocking unit 230 includes a switching element Q1 that performs a switching operation according to a digital interface signal (DVI signal) output from the video connector 220; A MOSFET 231 is interlocked with the switching element Q1 to cut off or supply power to the monitor.

The switching element Q1 uses a field effect transistor (FET), the digital interface signal is connected to the base of the field effect transistor (Q1), and the gate of the MOSFET 231 is connected to the collector of the field effect transistor. The monitor operating power is connected to the source of the MOSFET 231, and the output terminal of the monitor operating power is connected to the drain of the MOSFET 231.

Thus, if power is normally supplied to the computer body 100 and the result of checking the input signal of the input device 10 is in the use mode rather than the power saving mode, the central processing unit 120 controls the VGA board 150 to The digital interface signal (DVI5V) is generated normally (high signal). Here, the VGA board 150 transfers the digital interface signal to the monitor 200 using the 9th pin. The digital interface signal generated in this way is transmitted to the monitor 200 and transferred to the DC voltage cutoff unit 230 through the video connector 220 of the monitor 200 . Here, the video connector 220 transfers the input digital interface signal to the DC voltage cutoff unit 230 using the 14th pin.

As shown in FIG. 3 , in the DC voltage blocking unit 230 , the base of the switching element Q1 becomes a high potential by the high-level digital interface signal, and the switch element Q1 is turned on. When the switching element Q1 is turned on, the potential of the gate of the P-type MOSFET 231 connected to the collector is lowered and the MOSFET 231 is turned on. When the MOSFET 231 is turned on, the monitor operating power (DC12V) output from the switching mode power supply 210 connected to the source of the MOSFET 231 flows to the drain to supply the monitor operating power to the monitor control board 24. do. As a result, the monitor 200 normally operates and displays the corresponding data on the screen.

That is, when the computer body 100 is normally operating, a VGA signal is normally generated and transmitted to the monitor 200, and the monitor 200 uses the normal VGA signal to operate the monitor generated by the switching mode power supply. Power is normally supplied to the monitor control board so that the monitor operates normally.

Unlike this, if the computer body 100 is turned off or the input device 10 is not in use because it is in power saving mode as a result of examining the input signal, the CPU 120 cannot normally control the VGA board 150. , the VGA board 150 cannot generate the digital interface signal (DVI5V) normally (high signal). That is, a low signal (0V) is electrically generated. Here, the VGA board 150 transfers the digital interface signal to the monitor 200 using the 9th pin. The generated low-level digital interface signal is transmitted to the monitor 200 and transferred to the DC voltage cut-off unit 230 through the video connector 220 of the monitor 200 . Here, the video connector 220 transfers the input low-level digital interface signal to the DC voltage blocker 230 using the 14th pin. When the digital interface method is the HDMI interface method, the video connector 220 outputs a digital interface signal using pin 18.

As shown in FIG. 2 , in the DC voltage blocking unit 230 , the base of the switching element Q1 is brought to a low potential state by the low level digital interface signal, and the switch element Q1 is turned off. When the switching element Q1 is turned off, the potential of the gate of the P-type MOSFET 231 connected to the collector rises to turn the MOSFET 231 off. When the MOSFET 231 is turned off, the monitor operating power (DC12V) output from the switching mode power supply 210 connected to the source of the MOSFET 231 does not flow to the drain, so the monitor operating power is supplied to the monitor control board 24. cut off supply As a result, the monitor 200 is turned off.

In this case, conventionally, only the monitor screen has been turned off, but the second prior art fundamentally cuts off power supplied to the monitor control board (monitor operating power supply), thereby preventing power waste.

That is, when the computer body 100 is not in use, the VGA signal is not generated and the low-level digital interface signal is transmitted to the monitor 200, and the monitor 200 uses the transmitted low-level VGA signal to enter the switching mode. Cut off the monitor operating power generated by the power supply from being supplied to the monitor control board.

On the other hand, when the computer body 100 returns to the normal state again in the state in which the monitor driving power source is cut off on its own as described above, the VGA board 150 is controlled by the control of the central processing unit 120 A high level digital interface signal is generated and transmitted to the monitor 200 . Then, the monitor 200 supplies the monitor driving power (DC12V) generated by the switching mode power supply 210 to the monitor control board 240 again using the transmitted high-level digital interface signal, so that the monitor 200 will return to normal operation.

As described above, the second prior art uses the VGA signal (digital interface signal) generated from the computer body 100 to the monitor 200 as it is without user manipulation, and automatically supplies power to the monitor (monitor operating power). Or by blocking, it provides very convenience to the user. In particular, it is possible to control the standby power of the monitor using only the VGA signal between the existing computer body and the monitor without configuring a separate control device for power control of the monitor, thereby minimizing the cost of implementing a device for power cutoff. will be able to

However, the second prior art also requires power consumption for the sensing operation of the monitor to check the power state of the PC, and specifically, the power modes are largely 'power ON mode', 'power saving mode (DPMS)', ' There is a 'power off mode', and in the power saving mode, about 1.4W is consumed for the operation of the DC voltage blocker 230 to detect and check it.

Although the screen is off, only the inverter power is turned off for a state where it can be immediately turned on, and power is supplied to the operating circuit such as the DC voltage cutoff unit 230.

Conventional monitors such as CRTs require this technology because the screen takes a long time to display, but recent monitors activate the monitor immediately when the power is turned on, so a power saving mode is rarely needed, but there is still a factor that wastes more energy than before. It is becoming.

Moreover, in the case of the prior art, existing monitors support power supply, voltage drop or power saving functions by various controllers and control elements, such as dimming control and power control, for energy saving. Since it checks various signals rather than a single signal to determine the state of the power supply, the circuit is complicated and the implementation cost is high. In addition, since most of the technologies passively change the signal received from the PC, there is a limit to energy saving efficiency.

On the other hand, in general, a liquid crystal display (LCD) is a liquid crystal panel that converts various electrical information generated from various devices into image information using a change in transmittance of liquid crystal according to an applied voltage, and the liquid crystal panel It consists of a backlight unit that supplies light to the

4A is a cross-sectional view showing an example of a conventional direct-type liquid crystal display device. Referring to the drawings, a conventional LCD (Liquid Crystal Display) includes a liquid crystal panel 20 containing liquid crystal pixels 23 that act as light valves by adjusting the transmittance of light, and supplying light to the liquid crystal panel 20. A backlight unit 10 is provided.

The backlight unit 10 includes a Cold Cathode Fluorescence Lamp (CCFL) 11a, an External Electrode Fluorescence Lamp (EEFL), a White Light Emitting Diode (LED), or an LED emitting three colors of R, G, and B. It is composed of a light source assembly 11 and light sheets that reflect the light emitted from the light source at the reflector 11b located under the light source or evenly mix and scatter the light to the plurality of liquid crystal pixels 23 . Here, R, G, and B are the abbreviations of Red, Green, and Blue, respectively, and R, G, and B mean red, green, and blue colors without separate indication thereafter.

The light sheet is basically composed of a diffusion plate 12, a diffusion sheet 13, a light collecting sheet 14, a reflective polarizing sheet 15, and a protective film 16 to appropriately adjust the viewing angle and luminance. do.

On the other hand, Figure 4b shows a liquid crystal display device employing a conventional general side-type backlight unit. In the case of a side type backlight unit, an optical waveguide 17 and a light source of a CCFL or LED 11-1 disposed on a side surface of the optical waveguide 17 are included. Similar to the direct type, a diffusion sheet 13, a light collecting sheet 14, a reflective polarizing sheet 15, and a protective film 16 are disposed between the optical waveguide 17 and the liquid crystal panel 20, and the light A scattering pattern 18 and a reflective film 19 are provided on the lower surface of the waveguide 17 to improve light uniformity and luminance.

4 and 5, the liquid crystal panel 20 is installed between the rear glass substrate 22, the front glass substrate 25, and the rear glass substrate 22 and the front glass substrate 25. A plurality of liquid crystal pixels 23, an R, G, B color filter 24 installed inside the front glass substrate 25, a polarizing sheet A 21 attached to the rear glass substrate 22, a front glass substrate ( The polarizing sheet B 26 attached to 25) plays a major optical role. Each liquid crystal pixel 23 is composed of R, G, and B liquid crystal sub-pixels that implement R, G, and B three-color images, and each R, G, B liquid crystal sub-pixel has R, G, R, G, and B color filters 24 (24a, 24b, 24c) that transmit B light are provided.

In addition, a black matrix 24d is installed on the boundary between the color filters 24 adjacent to each other, and serves to eliminate color crosstalk between adjacent sub-pixels.

The method of realizing a color image in a conventional LCD as described above is to install R, G, and B liquid crystal sub-pixels that implement R, G, and B three-color images in one liquid crystal pixel, which is the minimum unit of pixels, respectively. R, G, and B color filters are installed on the front part of the liquid crystal sub-pixels, and the backlight unit scatters uniform white light over the entire liquid crystal panel. A color image is made.

In a conventional LCD, the power of white light emitted from the backlight unit 10 depends on the aperture ratio of the polarizing sheets 21 and 26, the color filters 24, and the liquid crystal pixels 23 installed in front and behind the liquid crystal pixels 23. Since most of the light is lost by the LCD and only about 5% to 10% of the light escapes out of the LCD, the light energy efficiency of the LCD has a very low problem. Therefore, improving the light energy efficiency of LCDs is an important task to strengthen the competitiveness of LCDs and save energy. The light energy loss of the LCD reaches about 50% in the polarizing sheets 21 and 26, about 30% to 50% in the aperture ratio of the liquid crystal pixel 23, and about 70% in the color filter 24, so that the total light is about 90% or more. A loss occurs, causing high power consumption of the LCD. In particular, the color filter 24 is a key element for realizing a color image, but as white light passes through the color filter 24, about 30% is transmitted and about 70% is absorbed and lost, resulting in a lot of light loss due to absorption. There was a problem that caused it.

On the other hand, FIG. 6 is a diagram for explaining a conventional general display scan method, where one frame is started by a start pulse of a vertical synchronization signal (VSYNC signal) and one line is formed by a horizontal synchronization signal (HSYNC signal). As this is scanned, for example, in the case of a display screen having 1096*1096 pixel data, 1096 lines are scanned by 1096 horizontal synchronization signals (HSYNC signals), and then the end pulse of the vertical synchronization signals (VSYNC signals) One frame is ended by

However, with the development of monitor technology, the pixel resolution is increasing and the frame rate is also increasing at the same time. However, unlike in the case of video or games, in the case of simple document work or e-books, it does not matter even if the frame rate is relatively low.

And with this in mind, as a third prior art for power saving while adjusting the luminance by varying the frequency according to the running app to make the duty ratio the same, Republic of Korea Patent Publication No. 10-2020-0144827 (Frequency A display driving method and apparatus based on differently set frequency operation cycles) has been proposed.

Hereinafter, a display driving method according to the third prior art will be described with reference to FIG. 7 of the accompanying drawings.

In the third method for changing the frequency of an electronic device according to the prior art, in operation 601, the processor of the electronic device according to various embodiments may drive a display at a first frequency (60 Hz).

In operation 603, the processor may detect a user touch input at at least one point of the display device 160 through the touch circuit. The user input is when the user contacts a point on the display device with a touch input means (eg, the user's body (eg, a finger) or a stylus pen), or when a pen (eg, a stylus pen) mounted on the electronic device is detached, or , a voice command, a physical button input, or an input through a sensor.

In operation 605, the processor may stepwise change the first frequency (60 Hz) to the second frequency (120 Hz). The gradual frequency change may mean changing from the first frequency (60 Hz) to the second frequency (120 Hz) without immediately passing through another frequency (90 Hz) to the second frequency.

That is, the processor may first change the frequency to 90 Hz, drive the display device with a frequency operation cycle corresponding to the 90 Hz frequency, and then change the frequency to 120 Hz.

At operation 607, the processor may drive the display at the second frequency. The processor may drive the display device at a frequency of 120 Hz.

At operation 609, the processor may determine whether a touch drag is detected. The touch drag may include at least one of multi-touch, drag, or drag and drop among the user inputs. The processor may perform operation 607 when the touch drag is detected and perform operation 611 when the touch drag is not detected. When the touch drag is detected, the processor may return to operation 607 to drive the display device at the second frequency.

If the touch drag is not detected, in operation 611, the processor may determine whether a still image is displayed. The still image is an image that does not express motion or does not have a time element, and may be, for example, a document, a picture, a photograph, a web page, or a webtoon. The processor may determine whether data (or information or screen) displayed on the display device corresponds to a still image. The processor may perform operation 613 when the still image is not displayed, and perform operation 615 when the still image is displayed.

When the still image is not displayed, in operation 613, the processor may step-by-step change from the second frequency (120 Hz) to the first frequency (60 Hz) via an intermediate frequency (90 Hz). Operation 613 is to change the frequency step by step from high frequency to low frequency, and operation 605 is to change the frequency step by step from low frequency to high frequency. .

When a still image is displayed, in operation 615, the processor may stepwise change from the second frequency (120 Hz) to the third frequency (1 Hz) via the intermediate frequency (30 Hz and/or 24 Hz).

Thus, according to the third prior art, in the case of a still image, it is possible to achieve power saving by changing the frequency.

However, in the case of the third prior art, the frequency is changed by user input or touch drag, which is too simple and thus may generate an error-prone frequency change, resulting in unnecessary frequency change, and sometimes too low frequency It is a power saving method of incomplete frequency change that can generate a flicker shape by changing to .

Korean Patent Publication No. 2013-0109060 (Standby power blocking device for computers and computer peripherals) Republic of Korea Patent Publication No. 2015-0123435 (monitor standby power blocking device through computer linkage) Korean Patent Publication No. 10-2020-0144827 (Display driving method and device based on frequency operation cycles set differently for each frequency)

The present invention, while taking a monitor power saving measure as a countermeasure against the problems of the first to third prior art, changes the luminance of the backlight during use to save power, but turns on/off the PWM signal that controls the power of the LED lamp for the backlight. Efficient power saving can be performed in a simple manner by performing off. In particular, monitor power saving is performed by reducing the amount of pixel data to be processed by blanking some pixel data, but the position of the blanked pixels is differently modulated for each frame to achieve full resolution. An object of the present invention is to provide a monitor control apparatus and method for reducing power consumption through pixel data modulation, which enables power saving while suppressing flicker without dropping the monitor.

In addition, in order to perform power saving of the monitor in a simple and quick manner, it is desirable to predetermine a criterion (for example, unused state information) for which power saving operation should be performed. In the present invention, this criterion is optimized by learning actual user patterns Therefore, the actual user does not feel uncomfortable and performs a practical power-saving operation of the display.

An apparatus for controlling a monitor for reducing power consumption through modulation of pixel data according to an aspect of the present invention for achieving the above object includes an MCU 31 performing overall control operations of a monitor control unit and modulating pixel data; a video processor 32 that transmits a monitor signal including pixel data to the MCU 31; a dual interface engine 34 for receiving and transmitting a monitor signal to the video processor 32 while interfacing with various connectors 40 connected to the computer body; A timing controller 33 that controls various drivers of the LCD panel 80 while interfacing with various drivers 82 and 83 of the LCD panel 80 by receiving the modulated pixel data from the MCU 31 ; and a PWM controller 60 for inverting an operating voltage from a power supply means for supplying power to the monitor and supplying power to the backlight 81 according to the control operation of the MCU 31 . wherein the MCU 31 analyzes the pixel data input from the video processor 32 and outputs modulated pixel data such that some pixels are blanked to the timing controller 33, and the timing controller The pixel data modulated through (33) is output to the source driver circuit 83 of the LCD panel 80 so that some pixels are blanked, but the pixel data is controlled so that the blanking positions of adjacent frames do not overlap each other. to be characterized

Preferably, the pixel data modulation comprises: i) modulating pixel data such that odd-numbered frames blank even-numbered pixels and even-numbered frames blank odd-numbered pixels; or ii) odd-numbered frames blank odd-numbered pixels. and, in the even-numbered frames, pixel data is modulated to blank the even-numbered pixels.

Also preferably, the MCU 31 analyzes the frame rate of the video signal in the frame rate analyzer 31a so that the screen change rate per second is less than a predetermined value, and the gray/white level rate analyzer 31b converts the gray level The gray level rate or the white level rate is analyzed, and if the gray level rate or the white level rate exceeds a certain value, the PWM dimming control unit 31c controls the PWM controller 60 to convert the LCD panel backlight lamp ( 81) is characterized in that backlight dimming is performed by issuing a PWM dimming control signal for controlling the brightness level.

More preferably, the MCU 31 performs modulation for blanking some pixels while synchronizing with the timer 36 in the pixel blanking timing generator 31e, and the pixel timing controller 31d blanks some pixels of the pixel data. By transmitting the modulated pixel data to the timing controller 33, power saving operation is performed, and the unused state analysis unit 31f of the MCU 31 refers to the unused state information storage unit 39, It checks whether the current monitor state is in an unused state, and if it is determined that it is in an unused state, the sleep control unit 31g notifies the sleep controller 31g whether or not 5VCC is input from the PC through the connector 40 and wakeup. It is characterized in that the transition to the sleep mode is determined while checking whether an event has occurred, and when the transition to the sleep mode is performed, the first switch (SW1) 51 is turned off so that the operating power from the DC-DC converter 21 is cut off. to be

In addition, a monitor control method for reducing power consumption through pixel data modulation according to another aspect of the present invention for achieving the above object is (a) when the monitor power is 'on' (S1), the MCU (31) , analyzing the frame rate of the video signal to check the screen change rate per second (S2); (b) As a result of checking in step (a), is the screen change rate per second less than a certain value? Step (S3) to check whether or not; As a result of the determination in step (b), if the screen change rate per second is less than a predetermined value, the pixel data input from the video processor 32 is analyzed and the pixel data modulated so that some pixels are blanked is transmitted to the timing controller 33. , and the pixel data modulated through the timing controller 33 is output to the source driver circuit 83 of the LCD panel 80 so that some pixels are blanked, but the blanking positions of adjacent frames do not overlap each other. It is characterized by executing a 'monitor power saving process' that controls pixel data so as not to

Preferably, (t) as a result of the determination in step (b), if the screen change rate per second is equal to or greater than a predetermined value, information on the computer unused state is called (S4), and is the computer unused state? Step (S5) to check whether or not; (u) as a result of the determination in step (t), if it is determined that it is not in an unused state, returning to the first time (to S2), and if it is determined that it is in an unused state, proceeding to a sleep mode and turning off the operating power of the monitor (S6); (w) In step (u), is 5VCC from the PC 'H' to detect the PC power state? Step (S7) to check whether or not; (x) if 5VCC is not 'H' as a result of the determination in step (w), checking whether a wake-up occurs within a certain time (To) (S8); (y) as a result of the determination in step (x), if wake-up does not occur within a predetermined time (To), turning off the power of the monitor to end the monitor control process (S9); and (z) if 5VCC is 'H' as a result of the determination in step (w) or if wakeup occurs within a certain time period (To) as a result of determination in step (x), it returns to the beginning and continues. steps to be performed; It is characterized in that it further comprises.

Also preferably, the 'monitor power saving process' includes: (c) receiving and analyzing video data (S11); (k) Is the currently scanned frame an odd-numbered frame? Checking whether or not (S18); (n) As a result of the determination in step (k), if the currently scanned frame is an odd-numbered frame, passing the odd-numbered pixel data and blanking the even-numbered pixel data to scan the screen with the modulated pixel data (S20) ); (q) If the currently scanned frame is an even-numbered frame as a result of the determination in step (k), blanking the odd-numbered pixels and passing the even-numbered pixel data to scan the screen with the modulated pixel data (S30) ; (r) Is the frame ending after steps (n) and (q)? Checking whether or not (S40); and (s) returning to the step immediately following step (c) if the frame is not ended as a result of the determination in step (r). It is characterized in that it includes.

Also preferably, the 'monitor power saving process' includes: (c) receiving and analyzing video data (S11'); (k) Is the currently scanned frame an odd-numbered frame? Checking whether or not (S18); (m) As a result of the determination in step (k), if the currently scanned frame is an odd-numbered frame, is the currently scanned line an odd-numbered line? Determining whether or not (S19); (p) As a result of the determination in step (k), if the currently scanned frame is an even-numbered frame, is the currently scanned line an odd-numbered line? Determining whether or not (S19'); (n) As a result of the determination in the step (m), when the currently scanned frame is an odd-numbered frame and an odd-numbered line, and as a result of the determination in the step (p), the currently scanned frame is an even-numbered frame and an even-numbered frame. In the case of a line, passing the odd-numbered pixel data and blanking the even-numbered pixel data to scan the screen with the modulated pixel data (S20); (q) As a result of the determination in the step (m), when the currently scanned frame is an odd-numbered frame and an even-numbered line, and as a result of the determination in the step (p), the currently scanned frame is an even-numbered frame and an odd-numbered line. In the case of a line, scanning the screen with modulated pixel data by blanking odd-numbered pixels and passing even-numbered pixel data (S30); (r) Is the frame ending after steps (n) and (q)? Checking whether or not (S40); and (s) as a result of the determination in step (r), if the frame is not end, after incrementing (i = i + 1) the 'index representing the line' (i value) (S41), the returning to the step immediately following step (c); In the above step (c), the 'index indicating the line' currently being scanned is initialized (i=1).

Most preferably, the 'monitor power saving process', before the step (k),

(d) analyzing gray/white levels of the input video data after step (c) (S12); (e) As a result of the analysis in step (d), is the gray level rate greater than or equal to the first reference value? Determining whether or not (S13); (f) As a result of the determination in step (e), when the gray level rate is greater than or equal to the first reference value, the PWM dimming control unit 31c controls the brightness of the LCD panel backlight lamp 81 with the PWM controller 60 performing a first backlight dimming by issuing a PWM dimming control signal to do (S14); (g) As a result of the analysis in step (d), is the white level rate greater than or equal to the second reference value? determining whether or not; and (h) as a result of the determination in step (e), when the white level rate is greater than or equal to the second reference value, the PWM dimming control unit 31c controls the brightness of the LCD panel backlight lamp 81 with the PWM controller 60. Step S16 of performing second backlight dimming by issuing a PWM dimming control signal to control; It is characterized in that it further comprises.

According to the monitor control apparatus and method for reducing power consumption through pixel data modulation according to the present invention, the entire amount of pixel data to be processed is reduced by blanking some pixel data, but the positions of the blanked pixels are differently modulated for each frame. As a result, there is an advantage in that it is possible to save power of the monitor by reducing power consumption through pixel data modulation while suppressing the flicker phenomenon without reducing the overall resolution.

Moreover, there is an advantage in that additional power saving is possible by reducing the luminance of the backlight in a PWM method under certain conditions or enabling sleep control in a simple method.

In particular, it optimizes the criteria for power saving operation under certain conditions by learning and optimizing the user's pattern by pre-stored and utilized unused state information or by lowering the backlight brightness under a specific gray/white level. An actual user does not feel uncomfortable and performs a power-saving operation of the display having practicality.

In addition to the above objects and effects, other objects and advantages of the present invention will become apparent through detailed description of the embodiments with reference to the accompanying drawings.

1 is a block diagram of a device for blocking standby power of a computer and peripheral devices according to a first prior art.
2 is a block diagram of a monitor standby power blocking device through computer interworking according to a second prior art;
3 is a circuit diagram of an embodiment of a video connector and a DC voltage blocking unit of FIG. 2;
4A is a structural diagram showing an example of a conventional direct type liquid crystal display device;
Figure 4b is a structural diagram showing an example of a liquid crystal display device employing a conventional side-type backlight unit.
5 is a plan view showing the structure of a conventional general color filter.
6 is a view for explaining a conventional general display scan method;
7 is a structural diagram showing a liquid crystal display device to which another backlight unit according to a third prior art is applied;
8 is a block diagram of a monitor control device that reduces power consumption through pixel data modulation according to an embodiment of the present invention.
9 is a view illustrating a monitor control concept for reducing power consumption through pixel data modulation according to an embodiment of the present invention;
10 is a main flowchart illustrating a monitor control method for reducing power consumption through pixel data modulation according to an embodiment of the present invention.
11 is a detailed flowchart illustrating a 'monitor power saving process' of a monitor control method for reducing power consumption through pixel data modulation according to an embodiment of the present invention;
12 is a detailed flowchart illustrating a 'monitor power saving process' according to another embodiment of the present invention corresponding to FIG. 11;

Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings.

8 is a block diagram of a monitor control device that reduces power consumption through pixel data modulation according to an embodiment of the present invention, and FIG. 9 is a block diagram of a monitor control device that reduces power consumption through pixel data modulation according to an embodiment of the present invention. 10 is a main flow chart showing a monitor control method for reducing power consumption through pixel data modulation according to an embodiment of the present invention, and FIG. 11 is a diagram illustrating a monitor control concept. A detailed flowchart illustrating a 'monitor power saving process' among monitor control methods for reducing power consumption through pixel data modulation, and FIG. 12 is a detailed flowchart illustrating a 'monitor power saving process' according to another embodiment of the present invention corresponding to FIG. 11 It is a flow chart.

(Embodiment of power-saving monitor control device)

First, a monitor control device for reducing power consumption through pixel data modulation according to an optimal embodiment of the present invention will be described with reference to FIGS. 8 and 9 .

As shown in FIG. 8, a monitor control device for reducing power consumption through pixel data modulation according to an optimal embodiment of the present invention includes an SMPS (not shown) and a DC-DC converter 21 for supplying power to the monitor. Power supply means such as, LCD panel 80 operating as a monitor screen, LED backlight and panel control units 81, 82, 83, PWM controller for inverting the operating voltage from the power supply means and supplying it as a backlight power supply ( 60), the monitor control unit 30 that controls the entire operation of the monitor, the connector 40 that provides the monitor signal from the main board to the monitor control unit, and buttons and various switching units 51 for setting the operation of the monitor. include

The monitor control unit 30 includes an MCU 31 that performs the operation of the entire control unit, and the MCU 31 is a main body that performs the operation of the entire control unit, and the firmware 38 and the flash memory 39 and Power saving including PWM dimming control while analyzing the frame rate and adjusting the level while controlling the entire operation of the monitor control device that reduces power consumption through pixel data modulation in the present invention while interfacing with the key control unit, etc. will perform the action.

The monitor controller 30 includes, in addition to the MCU 31, a dual interface engine 34, a video processor 32, a timing controller 33, a timer 36, etc. For reference, the dual interface engine 34 interfaces with connectors 40, such as an RGB connector as an analog RGB connector, a DVI connector, and an HDMI connector, and the timing controller 33 interfaces with the driver of the LCD panel 80, will take control.

That is, when the dual interface engine 34 receives a monitor signal while interfacing with various connectors 40 from the main board and transmits it to the video processor 32, the video processor 32 monitors the monitor including pixel data. The signal is transmitted to the MCU 31, and the MCU 31 analyzes the pixel data and, on the one hand, synchronizes with the timer 36 to blank some pixel data through the gate driver circuit through the timing controller 33. 82 and the source driver circuit 83, eventually the modulated pixel data is transmitted to the gate driver circuit 82 and the source driver circuit 83 of the LCD panel 80 at set timings as an on/off signal. Meanwhile, the MCU 31 controls the dimming of the backlight 81 of the LCD panel 80 through the PWM controller 60 and the backlight circuit 81'. In addition, while the video processor 32 processes the monitor signal from the dual interfacing engine 34, the first switch SW1 between the DC-DC converter 21 as a power supply and the monitor control unit 30 ( 51) actually serves to turn off the monitor by being turned on/off in response to the sleep event signal of the sleep control unit 31g. In particular, in the present invention, the DDC signal from the MCU 31 to the main board If the SCL and SDA signals are blocked, the entire PC can be turned off from the monitor. For reference, the monitor device in the present invention can be activated while supplying minimum standby power to the MCU 31 by 5VCC through the connector 40 from the PC.

Meanwhile, the MCU 31 issues a PWM dimming control signal for controlling the brightness of the LCD panel backlight lamp 81 to the PWM controller 60, and in response, the PWM controller 60 via the backlight circuit 81'. The overall brightness of the LED backlight 81 is controlled. According to the energy saving monitor device of the present invention, the frame rate of the video signal is analyzed by the frame rate analyzer 31a of the MCU 31 to determine the screen change rate per second. While it is less than a certain value (for example, the screen change rate per second is less than 10 frames), the gray / white level rate analyzer 31b analyzes the gray level rate and / or white level rate , if it is more than a certain value (for example, 90%, preferably 95%), the PWM dimming control unit 31c generates a PWM dimming control signal for controlling the brightness of the LCD panel backlight lamp 81 to the PWM controller 60. By doing so, backlight dimming is performed.

In addition, if the frame rate of the video signal is analyzed by the frame rate analyzer 31a of the MCU 31 and the screen change rate per second is less than a certain value (for example, if the screen change rate per second is less than 10 frames), document work or e- Regarding a task such as book or Internet surfing, the pixel timing controller 31d of the present invention performs a power saving operation by blanking some pixels of the pixel data to reduce the pixel data to be processed. To this end, pixel blanking The timing generator 31e blanks some pixels while synchronizing with the timer 36, such as a clock generator, but modulates so that blanking positions of adjacent frames do not overlap (for example, odd-numbered frames blank even-numbered pixels, and even-numbered pixels are blanked). The second frame generates timing data (modulated by blanking odd-numbered pixels) and transmits 'modulated TCON data' to the timing controller 33 through the pixel timing controller 31d.

In response to this, the timing controller 33 controls the gate driver circuit 82 and the source driver circuit 83 to blank some pixels so that blanking positions of adjacent frames do not overlap (for example, odd-numbered frames Even-numbered pixels are blanked, and even-numbered frames blank odd-numbered pixels) to control pixel data.

On the other hand, the unused state analysis unit 31f of the MCU 31 refers to the 'unused state information storage unit 30 configured in the flash memory or firmware 38, for example, to determine whether the current monitor status is an unused state. When it is determined that it is in an unused state, the sleep control unit 31g is notified, and the sleep control unit 31g checks whether 5VCC is input from the PC through the connector 40 and whether a wakeup event has occurred. When transitioning to the sleep mode, the first switch (SW1) 51 is turned off so that the operating power from the DC-DC converter 21 is cut off.

In FIG. 9, for example, in an output mode of 60Hz (outputting 60 frames per second), odd-numbered frames including the first frame normally output odd-numbered pixels and blank even-numbered pixels, and conversely, even-numbered frames including the second frame The frame exemplifies the case of blanking the odd-numbered pixels and outputting the even-numbered pixels normally. As a result, the output mode is 30Hz (outputting 30 frames per second), but since the blanking position changes for each frame, the original Compared to the output mode of 30Hz (outputting 30 frames per second), the flicker phenomenon can be further prevented.

According to the monitor control device that reduces power consumption through pixel data modulation of the ball invention, for example, in the case of document work that changes less than 10 frames per second, by reducing the amount of pixel data to be processed by half, a normal monitor Even during operation, power saving is possible without flicker, and moreover, when the gray level is over a certain value (90%) or when the white level is over a certain value (90%), dimming of a specific block Including, by performing dimming through PWM control, additional power saving is also possible, and by switching off the DDC switch (SW1) in an unused state, both the monitor and the computer are put into sleep mode, resulting in a higher level of power saving. It becomes possible.

(First Embodiment of Power Saving Monitor Control Method)

Now, with reference mainly to FIGS. 10 and 11 and supplementary reference to FIG. 8, a first embodiment of a monitor control method for reducing power consumption through pixel data modulation according to the present invention will be described.

First, referring to FIG. 10, the main flow of the monitor control method of the present invention will be described. When the monitor power is 'on' (S1), the MCU 31 of the monitor control unit 30, the frame rate analyzer 31a ) to analyze the frame rate of the video signal and check the screen change rate per second (S2), whether the screen change rate per second is less than a certain value? (For example, whether the screen change rate per second is less than 10 frames?) is checked (S3).

Therefore, if the screen change rate per second is less than a certain value (for example, if the screen change rate per second is less than 10 frames), it is regarded as a task that does not require high-frequency scanning, such as document work, e-book, or Internet surfing, and performs the power-saving operation described later. Otherwise, by calling the computer unused state information (S4), is it an unused state? Whether or not is checked (S5), and as a result of the determination in step S5, if it is determined that it is not in an unused state, it returns to the first time (to S2). For reference, the latest information such as standby time is updated and stored in the "unused state information storage unit" 39, and based on this, in the step S5, whether or not the monitor is in a sleep mode is determined under conditions adapted to the user. do.

On the other hand, as a result of the determination in step S5, if it is determined that the state is not in use, the sleep mode is entered. Turn off the first switch (SW1) for sleep control (51 in FIG. 8) to turn off the monitor operating power (S6) , Is 5VCC from PC 'H' to detect PC power status? Whether or not is checked (S7).

Therefore, as a result of the determination in step S7, if 5VCC is not 'H', since there is no video signal input from the PC, power off, but before that, check whether wakeup occurs within a certain period of time (To) ( S8), when wakeup does not occur within a certain period of time (To), the power of the monitor is turned off (S9), and all monitor control processes are terminated.

On the other hand, if 5VCC is 'H' as a result of the determination in step S7 or if wakeup occurs within a certain time (To) as a result of determination in step S8, it returns to the first step (to step S2) and continues. will do

On the other hand, as a result of the determination in step S3, if the screen change rate per second is less than a certain value (for example, if the screen change rate per second is less than 10 frames), it is regarded as a task that does not require high-frequency scanning, such as document work, e-books, or Internet surfing. Thus, the full-scale monitor power saving process in FIG. 11 begins. First, video data is received (S11), and gray/white levels of the input video data are analyzed (S12).

As a result of the analysis, is the gray level rate in the gray/white level rate analyzer 31b greater than or equal to the first reference value (for example, 95%)? It is determined whether or not (S13), and in such a case, since the screen is in a very dark state, there is no problem even if the backlight itself is dimmed and controlled to be dark. ), the backlight is dimmed by issuing a PWM dimming control signal that controls the brightness level (S14). For example, if the gradation is 256 levels and the darkness level is 95%, or 243 levels, there is no big difference even if the backlight itself is turned off, so power saving can be done by turning off the backlight of the corresponding block.

In addition, conversely, is the white level rate greater than or equal to the second reference value (for example, 90%)? In this case, the screen is too bright, so the PWM dimming controller 31c controls the brightness of the LCD panel backlight lamp 81 with the PWM controller 60. By issuing a signal, some backlight dimming is performed (S16). For example, if the white level is 256 steps and the brightness is 90% (230 steps), even if the backlight is dimmed a little, the user does not feel a big difference. be able to do

In general, in the dimming (PWM dimming control-1) of step S14, there is no problem even if the dimming level is slightly increased (even if it is dark), but in the dimming (PWM dimming control-2) of step S16, only slightly dimming is required ( The luminance should be slightly lowered), and dimming control may be performed based on the gray / white level of the entire screen, but the dimming in steps S13 to S14 (PWM dimming control-1) and the dimming in steps S15 to S16 ( PWM dimming control-2) It is preferable to divide dimming control by block.

Now, a power saving operation through pixel data modulation, which is the most important aspect of the present invention, is performed. First, in the present invention, 'low timing data' passes without being modulated (S17).

Afterwards, is the currently scanned frame an odd-numbered frame? (S18), in the case of odd-numbered frames, odd-numbered pixel data (for example, in the case of a 1096*1096 pixel screen, 1, 3, ... 1095th pixel data) are passed and even-numbered pixel data ( For example, in the case of a 1096*1096 pixel screen, the 2nd, 4th, ... 1096th pixel data) is blanked and the screen is scanned with the modulated pixel data (S20), and in the case of an even numbered frame, odd-numbered pixels are blanked And the even-numbered pixel data is passed and the screen is scanned with the modulated pixel data (S30). In this way, all lines (for example, lines 1 to 1096 in the case of a 1096*1096 pixel screen) are scanned for one frame.

This is done by checking the VSYNC clock in step S40. As shown in FIG. 6, since the VSYNC clock generally pulses once at the start and end of the frame, 'frame end' can be confirmed using this. .

Then, as a result of the determination in the step S40, if the VSYNC clock has not occurred, since the frame has not yet ended, the process proceeds to the step S12 and continues to the next line. On the other hand, if the VSYNC clock is generated, the corresponding Since the frame has ended, the process proceeds to step S4 of FIG. 10, checks steps S4 and S5, and returns to the first step (step S2) to continue.

For reference, the dimming according to the gray level in steps S13 to S14 (PWM dimming control-1) and the dimming according to the white level in steps S15 to S16 (PWM dimming control-2) are irrelevant even if the order is changed, and each dimming The first reference value and the second reference value in the step are also not absolute, and can be changed as much as possible (however, it is preferable to set at about 90 to 95%).

Also, in the scan of each line, even-numbered pixels do not necessarily have to be blanked in odd-numbered frames, conversely, odd-numbered pixels can be blanked in odd-numbered frames, but in the latter case, in even-numbered frames Even-numbered pixels should be blanked.

(Second Embodiment of Power Saving Monitor Control Method)

Now, with reference mainly to FIGS. 10 and 12 and supplementary reference to FIG. 8, a second embodiment of a monitor control method for reducing power consumption through pixel data modulation according to the present invention will be described.

As shown in FIG. 12, in the case of blanking a specific pixel in the same frame, the second embodiment modulates pixel data so that positions of blanked pixels are shifted from each other even in the case of adjacent lines, thereby increasing the amount of pixel data to be processed. A second embodiment is proposed in which the flicker phenomenon is further suppressed by preventing blanking of pixels adjacent to each other even in the vertical direction while reducing this by half.

That is, as shown in FIG. 12, prior to step S12 (for example, in step S11'), an index representing a line is initialized (i=1), and a pixel blanked according to a frame and the 'index representing a line' By alternately changing the position of , even-numbered pixels are blanked in odd-numbered lines of odd-numbered frames, and even in odd-numbered frames, odd-numbered pixels are blanked in even-numbered lines, and conversely, in odd-numbered lines in even frames It is also possible to cause odd-numbered pixels to be blanked, and even-numbered pixels to be blanked in even-numbered lines of even-numbered frames, so that the blanking positions are shifted according to lines even within the same frame.

Therefore, in this case, instead of determining the blanking position based only on odd/even frames in step S18, as shown in FIG. 12, is the currently scanned frame an odd-numbered frame? By checking whether or not (S18), even if it is an odd-numbered frame, is the currently scanned line again an odd-numbered line? (S19), if the currently scanned line is an odd-numbered line, the odd-numbered pixel data (for example, in the case of a 1096*1096 pixel screen, 1st, 3rd, ... 1095th pixel data) is passed Even-numbered pixel data (for example, in the case of a 1096*1096 pixel screen, 2nd, 4th, ... 1096th pixel data) is blanked and the screen is scanned with modulated pixel data (S20), and conversely, the currently scanned line is even-numbered In the case of a line, odd-numbered pixels are blanked and even-numbered pixel data is passed to scan the screen with modulated pixel data (S30). In this way, all lines (for example, lines 1 to 1096 in the case of a 1096*1096 pixel screen) are scanned for one frame.

On the other hand, as a result of the determination in the step S18, even in the case of an even numbered frame, is the currently scanned line an odd numbered line? (S19'), if the currently scanned line is an even-numbered line, the odd-numbered pixel data (for example, in the case of a 1096*1096 pixel screen, the 1st, 3rd, ... 1095th pixel data) passes and blanks the even-numbered pixel data (for example, 2nd, 4th, ... 1096th pixel data in the case of a 1096*1096 pixel screen) and scans the screen with the modulated pixel data (S20), conversely, the currently scanned line is an odd number In the case of the th line, odd-numbered pixels are blanked and even-numbered pixel data is passed to scan the screen with modulated pixel data (S30).

In this way, all lines (for example, lines 1 to 1096 in the case of a 1096*1096 pixel screen) are scanned for one frame.

This is done by checking the VSYNC clock in step S40. In general, since the VSYNC clock pulses once at the start and end of the frame, 'frame end' can be confirmed using this. Of course, in some cases, using the 'index representing the line' (i value), for example, 'i=1096 ?' It can also be judged whether or not.

Then, as a result of the determination in step S40, if the VSYNC clock has not occurred, since the frame has not yet ended, proceed to step S12, but first increment the 'index representing the line' (i value) After (i = i + 1) (S41), it proceeds to step S12 and continues to the next line. On the other hand, when the VSYNC clock is generated, since the corresponding frame has ended, it proceeds to step S4 of FIG. 10 , After checking steps S4 and S5, it returns to the first step (to step S2) and continues.

In the above, the present invention has been described according to preferred embodiments of the present invention, but changes and modifications made by those skilled in the art within the scope of the technical spirit of the present invention also belong to the present invention. Of course.

21: DC-DC converter
30: monitor control unit
31: MCU 31a: frame rate analysis unit
31b: gray/white level rate analysis unit 31c: PWM dimming control unit
31d: Pixel Timing Control
31e: Pixel blanking timing generator 31f: Unused state analysis unit
31g: sleep control unit 32: video processor
33: timing controller 34: dual interface engine
36: timer 38: firmware
39: unused state information storage unit
40: connector
51: first switch (SW1)
60: PWM controller
80: LCD panel
81: backlight lamp 81': backlight circuit
82 gate driver circuit 83 source driver circuit

Claims (9)

A monitor control device that reduces power consumption through pixel data modulation, comprising: an MCU (31) performing overall control operations of a monitor control unit and performing pixel data modulation; a video processor 32 that transmits a monitor signal including pixel data to the MCU 31; a dual interface engine 34 for receiving and transmitting a monitor signal to the video processor 32 while interfacing with various connectors 40 connected to the computer body; A timing controller 33 that controls various drivers of the LCD panel 80 while interfacing with various drivers 82 and 83 of the LCD panel 80 by receiving the modulated pixel data from the MCU 31 ; and a PWM controller 60 for inverting an operating voltage from a power supply means for supplying power to the monitor and supplying power to the backlight 81 according to the control operation of the MCU 31 . wherein the MCU 31 analyzes the pixel data input from the video processor 32 and outputs modulated pixel data such that some pixels are blanked to the timing controller 33, and the timing controller The pixel data modulated through (33) is output to the source driver circuit 83 of the LCD panel 80 so that some pixels are blanked, but the pixel data is controlled so that the blanking positions of adjacent frames do not overlap each other. As a monitor control method of a monitor control device that reduces power consumption through pixel data modulation,
(a) When the power of the monitor is 'on' (S1), the MCU 31 analyzes the frame rate of the video signal and checks the screen change rate per second (S2);
(b) As a result of checking in step (a), is the screen change rate per second less than a certain value? Step (S3) to check whether or not;
As a result of the determination in step (b), if the screen change rate per second is less than a predetermined value, the pixel data input from the video processor 32 is analyzed and the pixel data modulated so that some pixels are blanked is transmitted to the timing controller 33. , and the pixel data modulated through the timing controller 33 is output to the source driver circuit 83 of the LCD panel 80 so that some pixels are blanked, but the blanking positions of adjacent frames do not overlap each other. Execute the 'monitor power saving process' that controls the pixel data so that
The 'monitor power saving process',
(c) receiving and analyzing video data (S11);
(k) Is the currently scanned frame an odd-numbered frame? Checking whether or not (S18);
(n) As a result of the determination in step (k), if the currently scanned frame is an odd-numbered frame, passing the odd-numbered pixel data and blanking the even-numbered pixel data to scan the screen with the modulated pixel data (S20) );
(q) If the currently scanned frame is an even-numbered frame as a result of the determination in step (k), blanking the odd-numbered pixels and passing the even-numbered pixel data to scan the screen with the modulated pixel data (S30) ;
(r) Is the frame ending after steps (n) and (q)? Checking whether or not (S40); and
(s) returning to the step immediately following step (c) if the frame is not ended as a result of the determination in step (r);
A monitor control method for reducing power consumption through pixel data modulation, comprising: A monitor control device that reduces power consumption through pixel data modulation, comprising: an MCU (31) performing overall control operations of a monitor control unit and performing pixel data modulation; a video processor 32 that transmits a monitor signal including pixel data to the MCU 31; a dual interface engine 34 for receiving and transmitting a monitor signal to the video processor 32 while interfacing with various connectors 40 connected to the computer body; A timing controller 33 that controls various drivers of the LCD panel 80 while interfacing with various drivers 82 and 83 of the LCD panel 80 by receiving the modulated pixel data from the MCU 31 ; and a PWM controller 60 for inverting an operating voltage from a power supply means for supplying power to the monitor and supplying power to the backlight 81 according to the control operation of the MCU 31 . wherein the MCU 31 analyzes the pixel data input from the video processor 32 and outputs modulated pixel data such that some pixels are blanked to the timing controller 33, and the timing controller The pixel data modulated through (33) is output to the source driver circuit 83 of the LCD panel 80 so that some pixels are blanked, but the pixel data is controlled so that the blanking positions of adjacent frames do not overlap each other. As a monitor control method of a monitor control device that reduces power consumption through pixel data modulation,
(a) When the power of the monitor is 'on' (S1), the MCU 31 analyzes the frame rate of the video signal and checks the screen change rate per second (S2);
(b) As a result of checking in step (a), is the screen change rate per second less than a certain value? Step (S3) to check whether or not;
As a result of the determination in step (b), if the screen change rate per second is less than a predetermined value, the pixel data input from the video processor 32 is analyzed and the pixel data modulated so that some pixels are blanked is transmitted to the timing controller 33. , and the pixel data modulated through the timing controller 33 is output to the source driver circuit 83 of the LCD panel 80 so that some pixels are blanked, but the blanking positions of adjacent frames do not overlap each other. Execute the 'monitor power saving process' that controls the pixel data so that
The 'monitor power saving process',
(c) receiving and analyzing video data (S11');
(k) Is the currently scanned frame an odd-numbered frame? Checking whether or not (S18);
(m) As a result of the determination in step (k), if the currently scanned frame is an odd-numbered frame, is the currently scanned line an odd-numbered line? Determining whether or not (S19);
(p) As a result of the determination in step (k), if the currently scanned frame is an even-numbered frame, is the currently scanned line an odd-numbered line? Determining whether or not (S19');
(n) As a result of the determination in the step (m), when the currently scanned frame is an odd-numbered frame and an odd-numbered line, and as a result of the determination in the step (p), the currently scanned frame is an even-numbered frame and an even-numbered frame. In the case of a line, passing the odd-numbered pixel data and blanking the even-numbered pixel data to scan the screen with the modulated pixel data (S20);
(q) As a result of the determination in the step (m), when the currently scanned frame is an odd-numbered frame and an even-numbered line, and as a result of the determination in the step (p), the currently scanned frame is an even-numbered frame and an odd-numbered line. In the case of a line, scanning the screen with modulated pixel data by blanking odd-numbered pixels and passing even-numbered pixel data (S30);
(r) Is the frame ending after steps (n) and (q)? Checking whether or not (S40); and
(s) As a result of the determination in step (r), if the frame is not end, after incrementing (i = i + 1) the 'index representing the line' (i value) (S41), the above (c ) returning to the step immediately following the step;
Including,
In the step (c), the currently scanned 'index representing the line' is initialized (i = 1). According to claim 1 or 2,
The MCU 31,
The frame rate analyzer 31a analyzes the frame rate of the video signal so that the screen change rate per second is less than a certain value, and the gray/white level rate analyzer 31b determines the gray level rate or white level rate Level rate), and if the gray level rate or white level rate exceeds a certain value, the PWM dimming control unit 31c to the PWM controller 60 controls the brightness of the LCD panel backlight lamp 81 PWM dimming control signal A monitor control method for reducing power consumption through pixel data modulation, characterized in that by emitting a backlight dimming. According to claim 3,
The MCU 31,
The pixel blanking timing generator 31e performs modulation to blank some pixels while synchronizing with the timer 36, and the pixel timing controller 31d transfers the modulated pixel data to blank some pixels of the pixel data to the timing controller 33. By transmitting to, power saving operation is performed,
The unused state analysis unit 31f of the MCU 31 refers to the unused state information storage unit 39 to check whether the current monitor state is an unused state, and if it is determined that the current monitor state is an unused state, the sleep control unit ( By notifying 31g), the sleep control unit 31g determines the transition to the sleep mode while checking whether 5VCC is input from the PC through the connector 40 and whether a wake-up event has occurred, and upon transition to the sleep mode, the first switch A monitor control method for reducing power consumption through pixel data modulation, characterized in that by turning off (SW1) (51) to cut off the operating power from the DC-DC converter (21). delete According to claim 1 or 2,
(t) As a result of the determination in the step (b), if the screen change rate per second is equal to or greater than a certain value, information on the computer unused state is called (S4), and is the computer unused state? Step (S5) to check whether or not;
(u) as a result of the determination in step (t), if it is determined that it is not in an unused state, returning to the first time (to S2), and if it is determined that it is in an unused state, proceeding to a sleep mode and turning off the operating power of the monitor (S6);
(w) In step (u), is 5VCC from the PC 'H' to detect the PC power state? Step (S7) to check whether or not;
(x) if 5VCC is not 'H' as a result of the determination in step (w), checking whether a wake-up occurs within a certain time (To) (S8);
(y) as a result of the determination in step (x), if wake-up does not occur within a predetermined time (To), turning off the power of the monitor to end the monitor control process (S9); and
(z) If 5VCC is 'H' as a result of the determination in step (w) or if wakeup occurs within a certain time (To) as a result of determination in step (x), it returns to the beginning and continues step to do;
A monitor control method for reducing power consumption through pixel data modulation, characterized in that it further comprises. delete delete According to claim 1 or 2,
The 'monitor power saving process', before the step (k),
(d) analyzing gray/white levels of the input video data after step (c) (S12);
(e) As a result of the analysis in step (d), is the gray level rate greater than or equal to the first reference value? Determining whether or not (S13);
(f) As a result of the determination in step (e), when the gray level rate is greater than or equal to the first reference value, the PWM dimming control unit 31c controls the brightness of the LCD panel backlight lamp 81 with the PWM controller 60 performing a first backlight dimming by issuing a PWM dimming control signal to do (S14);
(g) As a result of the analysis in step (d), is the white level rate greater than or equal to the second reference value? determining whether or not; and
(h) As a result of the determination in step (e), when the white level rate is greater than or equal to the second reference value, the PWM dimming control unit 31c controls the brightness of the LCD panel backlight lamp 81 with the PWM controller 60 (S16) performing second backlight dimming by issuing a PWM dimming control signal that
A monitor control method for reducing power consumption through pixel data modulation, characterized in that it further comprises.

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