KR102489338B1 - Analog digital converter - Google Patents

Abstract

The analog-to-digital converter of the present invention includes a conversion unit for converting an analog signal into a digital signal; Receiving an external sampling command, generating a command sampling period corresponding to the external sampling command, generating a command sampling time repeated as much as the command sampling period, and generating a plurality of high-speed sampling times for each command sampling time; , a high-speed sampling generation unit for issuing a high-speed sampling command to the conversion unit for each of the high-speed sampling times; can include

Description

Analog digital converter {Analog digital converter}

The present invention relates to an analog-to-digital converter that converts an analog signal into a digital signal.

Signals used by humans for communication and physical quantities such as voltage levels and currents are analog values, whereas digital circuits included in electronic devices are operated using digital values. Therefore, an analog digital converter (ADC) is a circuit that converts an analog input signal into a digital output signal, and is an essential circuit for communication between humans and electronic devices or communication between different electronic devices.

Therefore, a product with a controller that controls external peripherals can have an ADC built-in.

In the process of converting analog signals into digital signals, the present invention reduces conversion errors when external noise or noise due to the characteristics of the A/D converter itself occurs, and provides high-precision information when analog signals are repeatedly acquired. It is possible to provide an analog-to-digital converter that can be acquired.

The analog-to-digital converter of the present invention includes a conversion unit for converting an analog signal into a digital signal; Receiving an external sampling command, generating a command sampling period corresponding to the external sampling command, generating a command sampling time repeated as much as the command sampling period, and generating a plurality of high-speed sampling times for each command sampling time; , a high-speed sampling generation unit for issuing a high-speed sampling command to the conversion unit for each of the high-speed sampling times; can include

The high-speed sampling generation unit may intercept the external sampling command to be input to the conversion unit, convert the external sampling command into the high-speed sampling command, and transmit the high-speed sampling command to the conversion unit.

In the case of converting an external analog signal into a digital signal, it is necessary to provide K command sampling times with a predetermined command sampling period, and to prevent erroneous information from being output due to noise interference during the conversion.

In order to solve the above problem, a value acquired by providing a subdivided high-speed sampling time around each sampling time divided by a predetermined period may be utilized.

The analog-to-digital converter may further include a high-speed sampling unit and a processing unit.

The high-speed sampling generation unit may instruct the conversion unit to take a plurality of analog values in the vicinity of each command sampling time. The period at this time can be defined as a high-speed sampling period, and each acquisition time can be defined as a high-speed sampling time.

The conversion unit can convert N high-speed sampling values from analog signals to digital signals for each K command sampling time, and can send these signals to the processing unit.

When the processing unit completes a predetermined operation, it may send the calculated digital signal to the output unit.

The processing unit may include a summing unit for adding each high-speed sampled value and an average value generating unit for averaging the summed values.

The signal sampled at N high-speed sampling times is converted into a digital signal by the conversion unit to generate N high-speed acquisition values, and the processing unit outputs K outputs summing all the N high-speed acquisition values acquired at each K command sampling time. Acquisition values are generated, and the summing unit may perform M summation operations to generate K output acquisition values.

The signal sampled at N high-speed sampling times is converted into a digital signal by the conversion unit to generate N high-speed acquisition values, and the processing unit averages the N high-speed acquisition values acquired at each K command sampling time; The average value generating unit generates K output acquisition values obtained by summing all the N high-speed acquisition values acquired at each K command sampling time during average operation and dividing by N, and performing M summing operation and M times to generate K output acquisition values. *N number of division operations can be performed.

1 is a conceptual diagram of an analog-to-digital converter as an embodiment of the present invention.
2 is a conceptual diagram illustrating digital sampling as an embodiment of the present invention.
3 is a conceptual diagram of an analog-to-digital converter as an embodiment of the present invention.
4 is an explanatory diagram illustrating digital sampling as an embodiment of the present invention.
5 is a conceptual diagram illustrating an operation from a processing unit to an output unit according to the present invention.

The analog-to-digital converter 1 is a device that converts a continuous real analog real signal into a discontinuous digital signal sampled at a predetermined period of time.

The analog-to-digital converter 1 may include a receiver 100 for receiving an analog signal, an output unit 200 for outputting a digital signal, and a converter 300 for converting an analog signal into a digital signal.

The general conversion unit 300 may be interfered with by noise from the outside during conversion, or may be interfered with by error or noise from the conversion unit 300 itself.

In any of the above cases, the conversion unit 300 may output an incorrect value due to noise. In this case, since it is impossible to distinguish between an incorrect value due to noise and an actual correct value, a serious error may occur in a process that requires precise control.

2 illustrates that an analog-to-digital converter acquires an analog value corresponding to a command sampling time having a predetermined command sampling period according to an external sampling command. These first through M-order acquisition values may include noise, and when the noise is sampled, a large error may appear from the actual analog value.

Therefore, it is necessary to prevent incorrect information from being output due to noise interference at the sampled time. In order to solve this problem, a value obtained by providing a subdivided high-speed sampling time around each sampling time divided by a predetermined period may be utilized.

Referring to FIGS. 3 to 5 , according to an external sampling command G, the conversion unit 300 may designate a period and time to convert an analog signal into a digital signal. The period at this time can be defined as the command sampling period (T), and each acquisition time can be defined as the command sampling time.

If there are K command sampling times, the first command sampling time T1 , the second command sampling time T2 to the M th command sampling time TM may be included.

The analog-to-digital converter may further include a high-speed sampling generator 320 and a processing unit 340 .

The high-speed sampling generation unit 320 may command the conversion unit 300 to take a plurality of analog values in the vicinity of each command sampling time. The period at this time can be defined as a high-speed sampling period (S), and each acquisition time can be defined as a high-speed sampling time.

If there are N high-speed sampling times, it may include a first high-speed sampling period S1, a second high-speed sampling period S2 to an N-th high-speed sampling period SN.

The conversion unit can convert N high-speed sampling values from analog signals to digital signals for each K command sampling time, and can send these signals to the processing unit.

The processing unit 340 may send the calculated digital signal to the output unit when a predetermined operation is completed.

The processing unit 340 may include a summing unit 344 that adds each high-speed sampled value and an average value generator 342 that averages the summed values.

The conversion of values corresponding to N high-speed sampling times into digital signals by the conversion unit 300 may be defined as a high-speed acquisition value (D). The high-speed acquisition value D may include a first high-speed acquisition value D1 , a second high-speed acquisition value D2 , to an N-th high-speed acquisition value DN corresponding to each of the N high-speed sampling times.

The N high-speed acquisition values obtained by the conversion unit 300 are sent to the processing unit 340, and the values calculated by the processing unit 340 may be output as K digital signals. K digital signals at this time can be defined as an output acquisition value (C). The number of output acquisition values C may be the same as the command sampling time value commanded from the outside. The output acquisition value (C) may include a first output acquisition value (C1), a second output acquisition value (C2) to an Nth output acquisition value (CN) corresponding to the command sampling time.

When the processing unit 340 is the average value generating unit 342, the value obtained by adding all the N high-speed acquisition values D corresponding to the N high-speed sampling times around the first command sampling time T1 and dividing by N is the second value. 1 can be the output acquisition value (C1).

A value obtained by adding all N high-speed acquisition values D corresponding to the N high-speed sampling times around the second command sampling time T2 and dividing by N may be the second output acquisition value C2.

A value obtained by adding all the N high-speed acquisition values D corresponding to the N high-speed sampling times around the Mth command sampling time TM and dividing by N may be the Mth output acquisition value CM.

Since all of the N high-speed acquisition values D are added and divided by N for each K command sampling time, M addition operations and M division operations can be performed in the average value generator 342 as a whole.

When the processing unit 300 is the summing unit 344, when all N high-speed acquisition values D corresponding to the N high-speed sampling times around the first command sampling time T1 are added, the first output acquisition value ( C1) can be

If all the N high-speed acquisition values D corresponding to the N high-speed sampling times around the second command sampling time T2 are added, the second output acquisition value C2 can be obtained.

If all the N high-speed acquisition values D corresponding to the N high-speed sampling times around the Mth command sampling time TM are added together, the Mth output acquisition value CM can be obtained.

If the high-speed sampling generating unit 320 and the processing unit 340 are not provided, since K command sampling is performed for each K command sampling time, a total of K values can be acquired.

When the high-speed sampling generation unit 320 and the processing unit 340 are provided, since N high-speed sampling is performed for every K command sampling times, the number of acquired values obtained by multiplying the total K by N can be obtained. Accordingly, the conversion unit 300 can obtain a bit increase effect by the high-speed sampling generation unit 320 and the processing unit 340, thereby reducing costs.

The high-speed sampling generation unit 320 and the processing unit 340 may be composed of a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC). Therefore, even when the high-speed sampling generation unit 320 and the processing unit 340 are added to the conversion unit 300, processing can be performed quickly.

The high-speed sampling period (S) and the number of high-speed sampling times (N) of the high-speed sampling generation unit 320 may be adjusted according to user conditions.

The user may perform a test while adjusting N to reduce cost, and find N at which noise interference is less than or equal to a predetermined criterion.

Therefore, although noise interference may exist in each high-speed acquisition value D, most of them may correspond to actual analog values. When the same value is obtained several times from most of the high-speed acquisition values D, the number of effective bits, which are bits that do not change, can increase, so that a high-quality digital signal with the effect of noise reduced as much as possible can be output.

The high-speed sampling generation unit receives an external sampling command, generates a command sampling period corresponding to the external sampling command, generates a command sampling time repeated as much as the command sampling period, and sets a plurality of high-speed sampling times for each command sampling time. and a high-speed sampling command may be issued to the conversion unit at each high-speed sampling time.

The high-speed sampling generation unit may intercept an external sampling command to be input to the conversion unit and convert the external sampling command into a high-speed sampling command.

The high-speed sampling generation unit may generate K command sampling times having command sampling cycles upon receipt of an external sampling command. For each command sampling time, N high-speed sampling times each having a high-speed sampling period can be generated.

The conversion unit may obtain a high-speed sampling command. When receiving a high-speed sampling command, the conversion unit may convert an analog signal into a digital signal at every high-speed sampling time. The conversion unit may convert an analog signal into a digital signal at each high-speed sampling time.

A signal sampled at every N high-speed sampling times may be converted into a digital signal by a conversion unit. N high-speed acquisition values can be generated for every K command sampling times.

The output unit may receive a digital signal as a high-speed output value at each high-speed sampling time.

A first command sampling time and a second command sampling time having a command sampling period may be generated according to an external sampling command. N first high-speed sampling times having first high-speed sampling periods may be generated corresponding to the first command sampling time. L second high-speed sampling times having second high-speed sampling periods corresponding to the second command sampling times may be generated. In this case, it is preferable that the first high-speed sampling period and the second high-speed sampling period are the same, and N and L are the same natural number.

A plurality of command sampling times having command sampling cycles may be generated according to an external sampling command. For each command sampling time, a first high-speed sampling time that precedes by a preceding time difference and a last high-speed sampling time that lags behind by a following time may be generated. The preceding time difference and the following time difference may have the same value.

It is preferable that the preceding time difference or the following time difference be less than 1/2 of the command sampling period. This is to prevent overlapping of signals and to prevent overlapping of high-speed sampling times calculated in plurality for each command sampling time.

The processing unit may recognize, as a representative digital signal, a sum value obtained by summing high-speed acquisition values corresponding to several high-speed sampling times in order to remove noise of the high-speed acquisition value.

That is, K command sampling times having command sampling cycles may be generated by an external sampling command. For each command sampling time, N high-speed sampling times having a high-speed sampling period may be generated. Signals sampled at N high-speed sampling times are converted into digital signals by the conversion unit to generate N high-speed acquisition values.

The processing unit may sum up all N high-speed acquisition values acquired at every K command sampling time. The summed value output from the processing unit may be recognized as a representative digital signal of each command sampling time. Therefore, noise included in each high-speed acquisition value can be mitigated.

On the other hand, the processing unit may obtain an average of N high-speed acquisition values obtained for each K command sampling time. The average value output from the processing unit may be recognized as a representative digital signal of each command sampling time. The peak value or noise component of each high-speed acquisition value can be reduced by averaging.

The processing unit may recognize a value obtained by adding all of the N high-speed acquisition values and then dividing them by N as an average value of the N high-speed acquisition values. K average values of high-speed acquisition values can be calculated.

1... analog to digital converter
100 ... receiving part 200 ... output part
300 ... conversion unit 320 ... high-speed sampling generation unit
340 ... Processing unit 342 ... Average value generating unit
344... summation part G... external sampling command
T... reference sampling period
T1... First command sampling time TM... Mth command sampling time
C... output acquisition value
C1... First output acquisition value CM... Third M output acquisition value
S... high-speed sampling rate
S1 ... first high-speed sampling time SN ... Nth high-speed sampling time
D... high-speed acquisition
D1... 1st high-speed acquisition value DN... Nth high-speed acquisition value

Claims (11)

A conversion unit for converting an analog signal into a digital signal;
Receiving an external sampling command, generating a command sampling period corresponding to the external sampling command, generating command sampling times repeated as much as the command sampling period, and generating a plurality of high-speed sampling times for each command sampling time; a high-speed sampling generation unit for issuing a high-speed sampling command to the conversion unit for each of the high-speed sampling times; including,
The high-speed sampling generation unit intercepts the external sampling command to be input to the conversion unit, converts the external sampling command into the high-speed sampling command, and transmits the high-speed sampling command to the conversion unit;
The high-speed sampling unit,
When the external sampling command is received, K command sampling times having the command sampling period are generated;
generating N high-speed sampling times each having a high-speed sampling period for each of the command sampling times;
wherein K and N are natural numbers.
According to claim 1,
The high-speed sampling generation unit generates the high-speed sampling command for each of the high-speed sampling times;
The analog-to-digital converter converts the analog signal into the digital signal at each high-speed sampling time when the conversion unit obtains the high-speed sampling command.
According to claim 1,
The conversion unit converts the analog signal into the digital signal for each of the high-speed sampling times;
An analog-to-digital converter having an output unit receiving the digital signal as a high-speed output value at each high-speed sampling time.
delete According to claim 1,
An analog-to-digital converter in which signals sampled every N high-speed sampling times are converted into digital signals by the conversion unit, and N high-speed acquisition values are generated every K command sampling times.
According to claim 1,
A first command sampling time and a second command sampling time having a command sampling period are generated according to the external sampling command;
N1 first high-speed sampling times having a first high-speed sampling period are generated corresponding to the first command sampling time;
Corresponding to the second command sampling time, N2 second high-speed sampling times each having a second high-speed sampling period are generated;
The first high-speed sampling period and the second high-speed sampling period are the same,
The analog-to-digital converter wherein N1 and N2 are the same natural number.
According to claim 1,
Some of the plurality of high-speed sampling times precede the corresponding command sampling times by a maximum preceding time,
The remainder of the plurality of high-speed sampling times lags behind the corresponding command sampling time by at most the trailing time,
With respect to the corresponding command sampling time, the first high-speed sampling time among the plurality of high-speed sampling times is ahead by the preceding time, and the last high-speed sampling time is behind by the following time;
The preceding time and the following time are the same value as the analog-to-digital converter.
According to claim 1,
Some of the plurality of high-speed sampling times precede the corresponding command sampling times by a maximum preceding time,
The remainder of the plurality of high-speed sampling times lags behind the corresponding command sampling time by at most the trailing time,
With respect to the corresponding command sampling time, the first high-speed sampling time among the plurality of high-speed sampling times is ahead by the preceding time, and the last high-speed sampling time is behind by the following time;
The preceding time or the following time is less than 1/2 of the command sampling period.
According to claim 1,
The signal sampled at the N high-speed sampling times is converted into a digital signal by the conversion unit to generate N high-speed acquisition values;
A processing unit for summing up all N high-speed acquisition values obtained for each of the K command sampling times,
An analog-to-digital converter in which sum values output from the processing unit are recognized as representative digital signals of each command sampling time.
According to claim 1,
The signal sampled at the N high-speed sampling times is converted into a digital signal by the conversion unit to generate N high-speed acquisition values;
a processing unit for obtaining an average of the N high-speed acquisition values obtained for each of the K command sampling times;
An analog-to-digital converter in which the average value output from the processing unit is recognized as a representative digital signal of each command sampling time.
According to claim 1,
The signal sampled at the N high-speed sampling times is converted into a digital signal by the conversion unit to generate N high-speed acquisition values;
a processing unit for calculating an average value of the N high-speed acquisition values obtained for each of the K command sampling times;
The processing unit recognizes a value obtained by adding all of the N high-speed acquisition values and dividing them by N as an average value of the N high-speed acquisition values, and the average value of the N high-speed acquisition values is calculated.

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