KR102470891B1 - Array substrate and display device having the same - Google Patents

Abstract

The display device according to the present invention includes a plurality of first connection wires disposed under a seal pattern in a non-display area, providing a clock signal to a gate driving circuit, and a plurality of second connection wires intersecting the plurality of first connection wires. It includes a signal input unit including a. Each of the plurality of first connection wires includes a first portion in which one or more main connection wires are disposed, and a second portion in which the second connection wires cross and a plurality of sub connection wires are branched from the main connection wires. Therefore, in the present invention, since the second connection wire crosses in the first portion where the main connection wire, which is smaller than the number of the plurality of sub connection wires of the first connection wire, is disposed, the thickness of the wire is reduced due to the overlap between the wires. frequency decreases.

Description

Array substrate and display device including the same {ARRAY SUBSTRATE AND DISPLAY DEVICE HAVING THE SAME}

The present invention relates to a connection wiring structure of a signal input unit provided on an array substrate of a gate-in-panel type display device.

As various portable devices such as mobile phones, laptops, and computers and information electronic devices that implement high-resolution and high-quality images such as HDTVs develop, flat panel display devices applied thereto (Flat Panel Display Device) ) is gradually increasing. As such flat panel display devices, LCD (Liquid Crystal Display), PDP (Plasma Display Panel), FED (Field Emission Display) and OLED (Organic Light Emitting Diodes) have been actively researched, but mass production technology, ease of driving means, and high-definition Due to the realization of a large-area screen, a liquid crystal display (LCD) is currently in the limelight.

A liquid crystal display device includes a liquid crystal display panel, a data driving circuit for supplying data to a data line of the liquid crystal display panel, a gate driving circuit for supplying gate pulses to a gate line of the liquid crystal display panel, a data driving circuit, and a gate driving circuit. and a timing controller for controlling the furnace. Such a liquid crystal display device is generally used by forming a gate and data driving circuit in the form of an integrated circuit and attaching it to the liquid crystal display panel like a TCP or COF tape. As a result, the number of components increases, and the process cost increases due to the increase in the number of components, which is a problem in lightening and miniaturizing the liquid crystal display device. -IC in panel) type liquid crystal display was proposed.

In a liquid crystal display device having a built-in circuit, the data driving circuit is formed in the form of a chip and attached to the liquid crystal display panel like a TCP or COF tape, and a plurality of gates and data defining liquid crystal cells are formed in the display area of the liquid crystal display panel. It is formed by intersecting lines, and a GIP type gate driving circuit composed of a plurality of thin film transistors is provided on the periphery of the display area.

A seal pattern for sealing a liquid crystal layer disposed between two substrates of the liquid crystal panel is provided in the non-display area of the liquid crystal panel, and the seal pattern is a clock for driving a gate driving circuit (GIP) in the non-display area. It is arranged to overlap with the signal input unit.

Meanwhile, in the clock signal input unit, a connection wire is disposed crossing the signal wires to transmit a clock signal from the signal wires to the gate driving circuit unit GIP. Due to the nature of the overlapping structure, the thickness of the overlapping portion of the connection wire at the portion where it intersects with the signal wire becomes thin. The resistance of the connection wiring crossing the signal wiring increases at the overlapping portion. The connection wiring crossing the signal wiring may be melted or disconnected due to increased heat due to an increase in current due to an increase in resistance. Therefore, the display panel has a problem in that screen defects occur due to connection wires intersecting with signal wires. In particular, this problem occurs frequently because the more the portion where the connection wire crosses and overlaps with the signal lines, the more the portion where the thickness of the connection wire becomes thinner.

An object of the present invention is to provide a display device in which the thickness of a connection wire is prevented from being thinned by reducing overlapping portions of connection wires and signal wires.

As a means for solving the above problem, a plurality of pixels are arranged in a display area defined by the intersection of gate lines and data lines, and a plurality of scan signals are sequentially provided to the gate lines of the display area arranged in a non-display area. Provides a clock signal to a gate driving circuit unit including circuit blocks and a plurality of circuit blocks, and a signal including a plurality of first connection wires and a plurality of second connection wires intersecting the plurality of first connection wires. It includes an input unit, and each of the plurality of first connection wires includes a first portion in which one or more main connection wires are disposed and a second portion in which a plurality of sub connection wires are branched from the main connection wire and disposed, At least one of the second connection wires may intersect with a plurality of first connection wires in the first portion to provide an array substrate. Therefore, in the present invention, since the second connection wire crosses in the first portion where the main connection wire, which is smaller than the number of the plurality of sub connection wires of the first connection wire, is disposed, the thickness of the wire is reduced due to the overlap between the wires. frequency decreases.

According to the present invention, the embodiment can prevent a phenomenon in which the thickness of the connection wire is reduced by reducing the overlapping portion of the connection wire and the signal wire.

In addition, according to the present invention, UV curing may be performed by evenly irradiating ultraviolet rays to the seal pattern through the opening regions spaced apart at equal intervals.

1 is a plan view of an array substrate of a display device according to the present invention.
2 is a cross-sectional view of an array substrate of a display device according to an embodiment of the present invention.
3 is a plan view illustrating first and second connection wires according to an embodiment of the present invention.
4 is a cross-sectional view showing first and second connection wires according to an embodiment of the present invention.
5 is a plan view illustrating first and second connection wires according to another embodiment of the present invention.
6 is a cross-sectional view showing first and second connection wires according to another embodiment of the present invention.
7 is a plan view illustrating first and second connection wires according to another embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The embodiments introduced below are provided as examples to sufficiently convey the spirit of the present invention to those skilled in the art. Accordingly, the present invention may be embodied in other forms without being limited to the embodiments described below. Like reference numbers indicate like elements throughout the specification.

Advantages and features of the present invention, and methods for achieving them, will become clear with reference to the embodiments described below in detail in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various different forms, and only these embodiments make the disclosure of the present invention complete, and the common knowledge in the art to which the present invention belongs It is provided to fully inform the holder of the scope of the invention, and the present invention is only defined by the scope of the claims. Like reference numbers designate like elements throughout the specification. The sizes and relative sizes of layers and regions in the drawings may be exaggerated for clarity of explanation.

When an element or layer is referred to as “on” or “on” another element or layer, it includes both cases where another element or layer is intervening as well as directly on another element or layer. do. On the other hand, when an element is referred to as “directly on” or “directly on”, it indicates that no other element or layer is intervening.

The spatially relative terms "below, beneath", "lower", "above", "upper", etc., refer to one element or component as shown in the drawing. It can be used to easily describe the correlation between and other elements or components. Spatially relative terms should be understood as terms that include different orientations of elements in use or operation in addition to the directions shown in the figures. For example, when flipping elements shown in the figures, elements described as “below” or “beneath” other elements may be placed “above” the other elements. Thus, the exemplary term “below” may include directions both below and above.

Terms used in this specification are for describing embodiments, and therefore are not intended to limit the present invention. In this specification, singular forms also include plural forms unless specifically stated otherwise in a phrase. As used herein, "comprise" and/or "comprising" means that a stated component, step, operation, and/or element is the presence of one or more other components, steps, operations, and/or elements. or do not rule out additions.

1 is a plan view of an array substrate of a display device according to the present invention, and FIG. 2 is a cross-sectional view of the array substrate of a display device according to an embodiment of the present invention.

Referring to FIGS. 1 and 2 , the array substrate 100 may include a display area AA and a non-display area NA. In the display area AA, gate lines 11 and data lines 12 crossing each other to define the pixels P, and thin film transistors (TFTs) that are switching elements connected to these two wires 11 and 12, respectively. ) and a pixel electrode 13 connected to the thin film transistor (TFT).

The pad part PA located on the upper side of the display area AA is connected to the data lines 12 disposed in the display area AA, and includes a data pad DP and a signal input part CLK for connecting to an external data driving circuit. , 110), a gate pad GP is formed at an end of the plurality of first connection wires 14.

The non-display area NA may include a gate driving circuit part GIP 120 , a signal input part CLK 110 , and a ground part GND 130 .

A plurality of circuit blocks 15 composed of combinations of a plurality of switching elements and capacitors are disposed in the gate driving circuit unit 120, and one circuit block 15 among them is a gate line ( 11) and the second connection wire 16 disposed in the signal input unit 110.

The signal input unit 110 provides a clock signal to the plurality of circuit blocks. In the signal input part CLK, a plurality of first connection wires 14 extending to the pad part PA are disposed crossing each other through the first connection wires 14 and the gate insulating film GI, and the gate driving A plurality of second connection wires 16 connected to each circuit block 15 in the circuit unit 110 are disposed.

Referring to FIG. 2 , a display device according to an exemplary embodiment includes an array substrate 100, a counter substrate 200 disposed on the array substrate 100, and a non-display area NA of the array substrate 100. ) and the counter substrate 200 may include a seal pattern 300 disposed therebetween.

The array substrate 100 may be made of a transparent material. The array substrate 100 may be made of a rigid or flexible material. The array substrate 100 may be transparent glass. The array substrate 100 may have a rectangular plate shape. The shape of the array substrate 100 is not limited thereto and may be a circular shape depending on the display state of the screen. The array substrate 100 may be a thin film transistor (TFT) substrate.

The counter substrate 200 may be a transparent glass or plastic material. The counter substrate 200 may be a rigid or flexible substrate. The counter substrate 200 may be an upper substrate disposed above the array substrate 100 or a lower substrate disposed below the array substrate 100, so it is not limited to the embodiment of FIG. 2. . A black matrix 210 and an overcoat layer 220 may be disposed in the non-display area of the counter substrate 200, and a black matrix 210 and a color matrix 210 may be disposed in the display area of the counter substrate 200. A filter (not shown) and an overcoat layer 220 may be sequentially disposed. The color filter (not shown) and the black matrix 210 may be disposed on the array substrate 100 and are not limited to FIG. 2 of the present invention. For example, when the color filter (not shown) is disposed on the array substrate 100, it may be disposed on the thin film transistor (TFT). A common electrode (not shown) may be disposed over the entire area of the counter substrate 200 .

A seal pattern 300 may be disposed between the array substrate 100 and the counter substrate 200 . The seal pattern 300 may be disposed between the non-display area NA of the array substrate 100 and the counter substrate 200 . More specifically, the seal pattern 300 may be disposed to overlap the signal input unit 110 . Also, the seal pattern 300 may be disposed to overlap the ground unit 130 and the signal input unit 110 . The seal pattern 300 may be disposed on the PAS layer of the array substrate 100 . In addition, the seal pattern 300 may include a sealant.

3 is a plan view illustrating first and second connection wires according to an embodiment of the present invention, and FIG. 4 is a cross-sectional view showing first and second connection wires according to an embodiment of the present invention.

FIG. 3 is an enlarged view of a portion A where a plurality of first connection wires 14 and one second connection wire 16 intersect in FIG. 2 for more detailed explanation.

Each of the plurality of first connection wires 14 includes a first portion 141 in which a main connection wire having a first width W1 is disposed, and a second portion 141 from which a plurality of sub connection wires diverge from the main connection wire. portion 142. Each of the plurality of sub connection lines branching off from the main connection line has a second width W2 and is spaced apart from each other. In addition, each of the plurality of first connection wires 14 is formed by alternating a plurality of first parts 141 and a plurality of second parts 142 with each other. That is, in each of the plurality of first connection wires 14, a plurality of sub connection wires due to a plurality of holes are disposed in the second part 142, and the plurality of sub connection wires extend from the first part 141. and combined, the main connection wiring may be disposed. Accordingly, UV curing of the seal pattern may be performed by irradiating the seal pattern with ultraviolet rays through the opening area formed by separating the plurality of sub connection wires of the second part 142 .

In addition, since the second connection wires 16 intersect in the first part 141 where the number of main connection wires smaller than the number of the plurality of sub connection wires is disposed, the thickness of the wires becomes thinner due to the overlap between the wires. frequency is reduced In addition, since the distance between the main connection wires in the first part 141 of the adjacent first connection wires 14 is greater than the distance between the sub connection wires in the second part 142, the distance between points where the wires intersect becomes longer. A phenomenon in which the thickness of the wiring becomes thin due to overlapping of the wiring is reduced.

Further, in the second portion 142, each of the plurality of sub connection wires may have the same width W2, and the plurality of sub connection wires may be spaced apart from each other at the same interval W3. In addition, each of the plurality of first connection wires 14 is formed by alternating a plurality of first parts 141 and a plurality of second parts 142 with each other. Therefore, UV curing progresses on the seal pattern on the signal input unit 110 by applying ultraviolet rays to the seal pattern through the opening area formed by spacing each of the plurality of sub connection wires at the same interval (W3) in the plurality of second parts 142. can be evenly investigated. In addition, since each of the plurality of sub-connection wires has the same width W2 in the plurality of second parts 142, the resistance is the same, so that the current flowing through each wire may be the same. Due to this, there is no problem with the overall current flow of the first connection wire 14 and no disconnection problem due to a partial increase in resistance.

Also, the first part 141 may be disposed between the plurality of second parts 142 . The width W1 of the main connection wire of the first part 141 may be equal to or smaller than the sum of the widths W2 of each of the plurality of sub connection wires. That is, in the main connection wire, a plurality of sub connection wires are extended and combined, and the main connection wire is separated to form a plurality of sub connection wires. Accordingly, the width W1 of the main connection wire may be equal to the sum of the widths W2 of each of the plurality of sub connection wires. For example, if the number of sub connection wires is three and the number of main connection wires is one and the width W2 of the sub connection wire is 10 μm, the width W1 of the main connection wire may be 30 μm. Therefore, since the resistance of the first connection wire 14 in the first part 141 becomes the same as the resistance in the second part 142, the first connection wire 14 has no problem with the signal flow as a whole and the resistance increases. No heat is generated due to Also, the width W1 of the main connection wire may be smaller than the sum of the widths W2 of each of the plurality of sub connection wires. For example, if there are three sub connection wires and one main connection wire and the width W2 of the sub connection wire is 10 μm, the width W1 of the main connection wire may be greater than 20 μm or less than 30 μm. The reason why the width (W1) of the main connection wire is smaller than the sum of the widths (W2) of the sub connection wire is that UV rays are evenly irradiated to the seal pattern through the open portion of the first connection wire (14) during UV curing of the seal pattern. This is to ensure a constant aperture ratio. Due to this, it is possible to secure a sufficient distance between the adjacent main connection wires so as not to reduce the thickness of the wires. In addition, the width W1 of the main connection wire should be set larger than the width W2 of the sub connection wire so that there is no problem with signal flow and no heat generation due to an increase in resistance.

In addition, each of the plurality of first connection wires 14 may include a reinforcing wire 143 connecting a plurality of sub connection wires to each other. The reinforcing wire 143 can reduce the resistance of the first connection wire 14 to facilitate signal flow. The reinforcing wire 143 may be disposed in a structure that connects all or only a portion of the plurality of sub connection wires of the second part 142 . The reinforcing wire 143 may have a thickness that satisfies a certain aperture ratio for UV curing of the seal pattern.

4 is a cross-sectional view of part II′ of FIG. 3 .

Referring to FIG. 4 , in the present invention, a gate insulating film GI is disposed on the first connection wire 14 and a second connection wire 16 is disposed crossing the first connection wire 14 on the gate insulating film GI. do. In the present invention, since the number of crossing points of the first connection wire 14 and the second connection wire 16 is small and they are arranged at wide intersecting intervals, the second connection wire 16 is bent at the portion (B) where the second connection wire 16 is bent. It can be seen that the thickness of (16) has hardly decreased. Therefore, according to the present invention, it is possible to secure a sufficient aperture ratio for UV curing of the seal pattern and improve the defect rate by preventing disconnection defects at the intersection of the first connection wire 14 and the second connection wire 16. have.

5 is a plan view showing first and second connection wires according to another embodiment of the present invention, and FIG. 6 is a cross-sectional view showing first and second connection wires according to another embodiment of the present invention.

In another embodiment of the present invention, the configuration except for the first connection wire 24 is the same as that of the display device according to the embodiment. That is, in another embodiment of the present invention, unlike one embodiment, each of the first connection wires 24 does not include a main connection wire, but only includes a plurality of sub connection wires. In one embodiment, since the second connection wire 26 crosses all of the plurality of sub connection wires of the first connection wire 24, overlapping portions between wires may increase.

6 is a cross-sectional view of part II-II' of FIG. 5 .

Referring to FIG. 5 , in another embodiment, a gate insulating film GI is disposed on the first connection wire 24 and crosses the first connection wire 24 on the gate insulating film GI so that the second connection wire 26 is formed. are placed Compared to one embodiment, in the other embodiment, a portion (C) in which the second connection wire 26 is bent with a step due to the first connection wire 24 occurs, and the first connection wire 24 and the second connection It can be seen that the thickness of the second connection wire 26 is reduced in the bent portion (C) due to the frequent intersections of the wires 26 and the narrow intersection. Due to this, in the other embodiment, unlike the one embodiment, the resistance of the second connection wire 26 increases to generate heat, and the second connection wire 26 may be disconnected due to the heat.

7 is a plan view illustrating first and second connection wires according to another embodiment of the present invention.

Referring to FIG. 7 , in another embodiment, components except for the first connection wire 34 are the same as those of the display device according to the embodiment.

Each of the plurality of first connection wires 34 includes a first portion 144 in which two main connection wires having different widths (W4, W4') are spaced apart and disposed, and a wider width of the two main connection wires ( A second portion 145 from which a plurality of sub connection wires are branched from the main connection wire having W4). Among the two main connection wires, the main connection wire having the narrower width W4' extends to the second part 145 with the same width W5 without branching. Each of the sub connection wires of the first part 144 and the extended main connection wires are spaced apart from each other. In addition, each of the plurality of first connection wires 34 is formed by alternating a plurality of first parts 144 and a plurality of second parts 145 with each other. That is, in each of the plurality of first connection wires 24, a plurality of sub connection wires due to a plurality of holes are disposed in the second part 142, and only some of the plurality of sub connection wires in the first part 141. A plurality of main connection wires may be disposed by being extended and combined. Some holes of the first connection wire 24 may be integrally disposed over the first and second portions 144 and 145 . Accordingly, UV curing of the seal pattern may be performed by irradiating the seal pattern with ultraviolet rays through the opening area formed through the partial hole of the second part 145 and the integral hole of the first and second parts 144 and 145 . That is, the third embodiment of the present invention can irradiate the seal pattern with more ultraviolet rays more evenly than the first embodiment of the present invention. In addition, since the second connection wires 16 intersect in the first part 144 where a plurality of main connection wires smaller than the number of the plurality of sub connection wires are disposed, the thickness of the wires due to overlap between wires is reduced. The frequency of the phenomenon is reduced. In addition, since the distance between the main connection wires in the first part 144 of the adjacent first connection wires 34 is greater than the distance between the sub connection wires in the second part 145, the distance between points where the wires intersect is increased. A phenomenon in which the thickness of the wiring becomes thin due to overlapping of the wiring is reduced. In addition, since the main connection wiring only needs to be extended and combined with some of the plurality of sub connection wirings, it is not limited to the embodiment of the present invention.

Also, in the second portion 145, each of the plurality of sub connection wires may have the same width W5, and the plurality of sub connection wires may be spaced apart from each other at the same interval W6. In addition, the widths W4 and W4' of each of the plurality of main connection wires in the first portion 144 may not be the same.

In addition, each of the plurality of first connection wires 34 is formed by alternating a plurality of first parts 144 and a plurality of second parts 145 with each other. Therefore, UV curing progresses on the seal pattern on the signal input unit 110, since the aperture ratio is large and the open portions are evenly distributed in the first and second portions 144 and 145, the seal pattern can be evenly irradiated with ultraviolet rays. In addition, since each of the plurality of sub-connection wires has the same width W5 in the plurality of second parts 145 , current flowing through each of the wires having the same resistance may be the same. Due to this, there is no problem with the overall current flow of the first connection wire 34 and no disconnection problem due to a partial resistance increase.

Also, the first part 144 may be disposed between the plurality of second parts 145 . A width W4 of some of the plurality of main connection wires of the first part 144 may be equal to or smaller than a sum of widths W5 of some of the plurality of sub connection wires. That is, some of the plurality of main connection wires may be combined by extending some of the plurality of sub connection wires. Accordingly, the width W4 of some of the plurality of main connection wires may be equal to the sum of the respective widths W5 of some of the plurality of sub connection wires. For example, if the number of sub connection wires is three and the number of main connection wires is two and the width W5 of the sub connection wires is 10 μm, the width W54 of the combined sub connection wires among the plurality of main connection wires is 20 μm. can Among the plurality of main connection wires, the width (W4') of the wiring to which the sub connection wires are extended may be 10 μm. Therefore, since the resistance of the first connection wire 34 in the first portion 144 is the same as the resistance in the second portion 145, the first connection wire 34 has no problem with the signal flow as a whole and the resistance increases. No heat is generated due to Also, among the plurality of main connection wires, a width W4 of some wires in which the sub connection wires are combined may be smaller than the sum of widths W5 of some wires among the plurality of sub connection wires. For example, if the number of sub connection wires is three and the number of main connection wires is two and the width W5 of the sub connection wire is 10 μm, the width W4 of the main connection wire may be larger than 10 μm and smaller than 20 μm. Among the plurality of main connection wires, the width (W4') of the wiring to which the sub connection wires are extended may be 10 μm. The reason why the main connection wire having a wide width (W4) is smaller than the sum of the widths (W5) of the extended sub connection wires is that when UV curing is performed on the seal pattern, the seal pattern This is to secure a constant aperture ratio so that ultraviolet rays can be evenly irradiated. Due to this, it is possible to secure a sufficient distance between the adjacent main connection wires so as not to reduce the thickness of the wires. In addition, the main connection wire having the wide width W4 should be set larger than the width W4 of the sub connection wire so that there is no problem with signal flow and no heat generation due to increased resistance.

In addition, each of the plurality of first connection wires 34 may include a reinforcing wire 146 connecting a plurality of sub connection wires to each other. The reinforcing wire 146 can reduce the resistance of the first connection wire 34 to facilitate signal flow. The reinforcing wire 146 may be disposed in a structure that connects all or only a portion of the plurality of sub connection wires of the second part 145 . The reinforcing wire 146 may have a thickness that satisfies a certain aperture ratio for UV curing of the seal pattern.

Therefore, according to the present invention, it is possible to prevent a phenomenon in which the thickness of the connection wire is reduced by reducing the overlapping portion of the connection wire and the signal wire.

In addition, according to the present invention, UV curing may be performed by evenly irradiating ultraviolet rays to the seal pattern through the opening regions spaced apart at equal intervals. In the detailed description of the present invention described above, it has been described with reference to preferred embodiments of the present invention, but those skilled in the art or those having ordinary knowledge in the art will find the scope of the present invention described in the claims to be described later. It will be understood that various modifications and changes can be made to the present invention without departing from the spirit and technical scope. Therefore, the technical scope of the present invention is not limited to the contents described in the detailed description of the specification, but should be defined by the claims.

14 1st connection wiring
15 multiple circuit blocks
16 2nd connection wiring
100 array board
110 signal input
120 gate driving circuit part
130 ground
200 upper board
300 seal pattern

Claims (10)

a display area in which pixels are disposed in an area defined by intersections of gate lines and data lines;
a gate driving circuit unit including a plurality of circuit blocks disposed in the non-display area and sequentially providing scan signals to gate lines of the display area; and
A signal input unit providing a clock signal to the plurality of circuit blocks and including a plurality of first connection wires and a plurality of second connection wires intersecting the plurality of first connection wires,
Each of the plurality of first connection wires includes a first portion in which one or more main connection wires are disposed, and a second portion in which a plurality of sub connection wires are branched from the main connection wires and disposed,
At least one of the plurality of second connection wires intersects the plurality of first connection wires in the first portion. According to claim 1,
The plurality of sub connection wires have the same distance apart from each other and have the same width as each other. According to claim 1,
The main connection wiring is one,
The plurality of sub connection wires are all branched from the main connection wire. According to claim 3,
The array substrate of claim 1 , wherein a width of the main wiring is equal to or smaller than a sum of widths of each of the plurality of sub connection wirings. According to claim 1,
In each of the plurality of first connection wires, a plurality of first portions and a plurality of second portions are alternately disposed. It includes a display area in which pixels are arranged in an area defined by the intersection of gate lines and data lines, and a plurality of circuit blocks arranged in a non-display area and sequentially providing scan signals to the gate lines of the display area. an array comprising a gate driving circuit unit and a signal input unit providing a clock signal to the plurality of circuit blocks and including a plurality of first connection wires and a plurality of second connection wires intersecting the plurality of first connection wires; Board;
a counter substrate disposed on the array substrate and including a plurality of color filters disposed corresponding to the pixels; and
A seal pattern disposed between the signal input unit of the array substrate and the opposite substrate;
Each of the plurality of first connection wires includes a first portion in which one or more main connection wires are disposed, and a second portion in which a plurality of sub connection wires are branched from the main connection wires and disposed,
At least one of the plurality of second connection wires intersects the plurality of first connection wires in the first portion. According to claim 6,
The plurality of sub connection wires have the same distance apart from each other and have the same width as each other. According to claim 6,
The main connection wiring is one,
The plurality of sub connection wires are all branched from the main connection wire. According to claim 8,
The display device of claim 1 , wherein a width of the main wire is equal to or smaller than a sum of widths of each of the plurality of sub connection wires. According to claim 6,
In each of the plurality of first connection wires, a plurality of first parts and a plurality of second parts are alternately disposed.

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