KR102465542B1 - Apparatus for scheduling process - Google Patents

Abstract

A process scheduling device for scheduling processing processes of a semiconductor facility is provided. The process scheduling apparatus may include: a processor; a storage including a plurality of instructions and a scheduling application that performs scheduling using the plurality of instructions; a memory for temporarily storing information stored in the storage; a network interface communicating with each semiconductor processing facility; input means for inputting a command to each semiconductor processing facility; an output means for displaying an operating state of the process scheduling device; and a system bus, which is a data transmission/reception path between processor, storage, memory, network interface, input means and output means, and the scheduling application is loaded into the memory and operates, and equipment common information commonly applied to a plurality of semiconductor process equipment. and Scheduling is performed based on facility-specific information that is specialized and applied to a semiconductor process facility selected from among a plurality of semiconductor process facilities.

Description

Process scheduling device {Apparatus for scheduling process}

The present invention relates to a process scheduling device for scheduling processing processes of semiconductor equipment.

When manufacturing a semiconductor device or a display device, various processes such as photography, etching, ashing, ion implantation, thin film deposition, and cleaning are performed. Here, the photo process includes coating, exposure, and developing processes. A photoresist is applied on a substrate (ie, application process), a circuit pattern is exposed on the substrate on which the photoresist film is formed (ie, exposure process), and the exposed area of the substrate is selectively developed (ie, development process).

Each process may be performed in a unique facility, and each facility may have a variety of equipment for handling the process. A unique process can be performed through mutual interlocking of a plurality of equipment.

A technical problem to be solved by the present invention is to provide a process scheduling device that schedules a processing process of a semiconductor facility.

The technical problems of the present invention are not limited to the above-mentioned problems, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

One aspect (aspect) of the process scheduling apparatus of the present invention for achieving the above technical problem, in the process scheduling apparatus for scheduling for each semiconductor process equipment, a processor; a storage including a plurality of instructions and a scheduling application that performs the scheduling using the plurality of instructions; a memory for temporarily storing the information stored in the storage; a network interface communicating with each semiconductor processing facility; input means for inputting a command to each semiconductor processing facility; an output means for displaying an operating state of the process scheduling device; and a system bus, which is a data transmission/reception path between the processor, the storage, the memory, the network interface, the input unit, and the output unit, wherein the scheduling application is loaded into the memory and operated, and operates in a plurality of semiconductor processing equipment. The scheduling is performed based on equipment common information commonly applied to the semiconductor process equipment and equipment specific information specially applied to the selected semiconductor process equipment among the plurality of semiconductor process equipment.

The storage includes facility common information, and the facility common information includes information on a fixed unit performing a semiconductor process-related task at a fixed location and information on a mobile unit performing a semiconductor process-related task while moving. information may be included.

The storage includes the facility-specific information, and the facility-specific information includes: first information including information of each unit included in a cleaning facility among semiconductor processing facilities; Second information including information of each unit included in a photo facility among semiconductor processing facilities; Third information including information on each unit included in a deposition facility among semiconductor processing facilities; and fourth information including information of each unit included in an etching facility among semiconductor processing facilities, or fifth information including movement paths of units included in a semiconductor processing facility. and sixth information including moving speeds of units included in the semiconductor processing equipment.

The storage includes scheduler algorithms prioritized for each condition to create a scheduler, and the condition may include at least one of quality, yield, and multiple tasks.

Any one of the plurality of instructions may generate a scheduler for the scheduling.

Any one of the above instructions may include the moving speed of a mobile unit that performs work related to the semiconductor process while moving, the working time of the fixed unit that performs work related to the semiconductor process at a fixed location, and the number of the fixed units that are simultaneously inputted. The scheduler may be created by adjusting at least one of the above.

Any one of the above instructions may extract information related to a condition to which priorities are assigned from the equipment common information, and generate the scheduler based on the extracted information.

Any one of the above instructions may generate the scheduler by applying the facility-specific information to the facility-common information.

The one instruction includes information on each unit included in a cleaning facility among semiconductor processing facilities when the facility common information includes information on a fixed unit performing a semiconductor process-related operation at a fixed location. 1 information, 2nd information including information on each unit included in photo equipment among semiconductor process equipment, 3rd information including information on each unit included in deposition equipment among semiconductor process equipment, and etching equipment among semiconductor process equipment At least one of the fourth information including information of each unit included in may be applied as the facility-specific information.

Fifth information including a moving path of a unit included in a semiconductor processing facility when the facility common information includes information about a moving unit that performs work related to the semiconductor process while moving; and At least one of the sixth pieces of information including a movement speed of a unit included in a semiconductor processing facility may be applied as the facility-specific information.

The plurality of instructions may include a scheduler generation instruction for generating a scheduler based on the equipment common information and the equipment specific information; a unit determination instruction for determining a unit to perform an operation among a plurality of units included in the selected semiconductor processing equipment; and a work instruction instruction instructing the determined unit to work.

Details of other embodiments are included in the detailed description and drawings.

1 is a diagram showing a process scheduling system according to an embodiment of the present invention.
FIG. 2 is a block diagram of the process scheduling device shown in FIG. 1 .
FIG. 3 is a diagram for explaining the detailed configuration of the scheduler algorithm shown in FIG. 2 .
FIG. 4 is a diagram for explaining a detailed configuration of facility-specific information shown in FIG. 2 .
FIG. 5 is a diagram for explaining a method of generating the scheduler shown in FIG. 2 .

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. Advantages and features of the present invention, and methods for achieving them, will become clear with reference to the embodiments described below in detail in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and may be implemented in various different forms, only the present embodiments make the disclosure of the present invention complete, and the common knowledge in the art to which the present invention belongs It is provided to fully inform the holder of the scope of the invention, and the present invention is only defined by the scope of the claims. Like reference numbers designate like elements throughout the specification.

Although first, second, etc. are used to describe various elements, components and/or sections, it is needless to say that these elements, components and/or sections are not limited by these terms. These terms are only used to distinguish one element, component or section from another element, component or section. Accordingly, it goes without saying that the first element, first element, or first section referred to below may also be a second element, second element, or second section within the spirit of the present invention.

Terminology used herein is for describing the embodiments and is not intended to limit the present invention. In this specification, singular forms also include plural forms unless specifically stated otherwise in a phrase. As used herein, "comprises" and/or "comprising" means that a stated component, step, operation, and/or element is present in the presence of one or more other components, steps, operations, and/or elements. or do not rule out additions.

Unless otherwise defined, all terms (including technical and scientific terms) used in this specification may be used in a meaning commonly understood by those of ordinary skill in the art to which the present invention belongs. In addition, terms defined in commonly used dictionaries are not interpreted ideally or excessively unless explicitly specifically defined.

In this specification, "configured to (or configured to)" means "suitable for," "having the ability to," "changed to" depending on the situation, for example, hardware or software ," can be used interchangeably with "made to," "capable of," or "designed to." In some contexts, the expression "device configured to" can mean that the device is "capable of" in conjunction with other devices or components. For example, the phrase "a processor configured (or configured) to perform A, B, and C" may include a dedicated processor (eg, an embedded processor) to perform the operation, or by executing one or more software programs stored in a memory device. , may mean a general-purpose processor (eg, CPU or application processor) capable of performing corresponding operations.

1 is a diagram showing a process scheduling system according to an embodiment of the present invention.

Referring to FIG. 1 , a process scheduling system 10 includes a semiconductor process facility 100 and a process scheduling device 200 .

The semiconductor processing facility 100 may perform processes on semiconductor components or display components. For example, the semiconductor processing facility 100 may perform processes such as photography, etching, ashing, ion implantation, thin film deposition, or cleaning.

Each semiconductor processing facility 100 may perform a unique process by having a plurality of units performing operations. A plurality of units may be properly arranged and perform work for a unique process of the corresponding semiconductor process equipment 100 .

The process scheduling device 200 may perform scheduling of operations of the semiconductor process equipment 100 . In the semiconductor process equipment 100, the work order is determined by the scheduling of the process scheduling device 200, and the work can be performed.

The process scheduling device 200 may perform scheduling for each semiconductor process facility 100 . Each semiconductor process facility 100 may perform work according to scheduling generated by the process scheduling device 200 . Alternatively, according to some embodiments of the present invention, the process scheduling device 200 may perform scheduling for at least some semiconductor process equipment 100 . The plurality of semiconductor process facilities 100 may work in conjunction with each other according to scheduling of the process scheduling device 200 .

1 shows that one process scheduling device 200 performs scheduling for a plurality of semiconductor process facilities 100, but this is exemplary and the plurality of process scheduling devices 200 perform scheduling for a plurality of semiconductor process facilities ( 100) may be scheduled. For example, the process scheduling device 200 may be provided for each semiconductor process facility 100 . Hereinafter, it will be mainly described that one process scheduling device 200 performs scheduling for a plurality of semiconductor process facilities 100 .

2 is a block diagram of the process scheduling device shown in FIG. 1, FIG. 3 is a diagram for explaining the detailed configuration of the scheduler algorithm shown in FIG. 2, and FIG. 4 is a detailed configuration of facility-specific information shown in FIG. , and FIG. 5 is a diagram for explaining the method of generating the scheduler shown in FIG. 2 .

Referring to FIG. 2 , the process scheduling device 200 includes a system bus 210, a processor 220, a memory 230, a storage 240, a network interface 250, an input unit 260, and an output unit 270. ) is composed of.

The system bus 210 may serve as a data transmission/reception path between the processor 220, the memory 230, the storage 240, the network interface 250, the input unit 260, and the output unit 270.

The memory 230 may be, for example, a volatile data storage device such as Random Access Memory (RAM). The storage 240 may be a non-volatile data storage device such as a flash memory or a hard disk.

In the present invention, an instruction represents a series of instructions grouped on the basis of function and executed by the processor 220 .

The storage 240 may store the scheduling information 310 , the scheduler algorithm 320 , facility-specific information 330 , and execution codes of the scheduling application 340 .

Scheduling information 310 may include basic information necessary for generating a scheduler. For example, the scheduling information 310 may include unit information, job information, wafer information, and recipe information.

In the present invention, the scheduling information 310 may include facility common information commonly applicable to a plurality of different semiconductor process facilities (hereinafter referred to as facilities) 100 . For example, among equipment common information included in the scheduling information 310, unit information may include information on a fixed unit and information on a mobile unit. Here, the fixed unit represents a unit that performs work at a fixed location among units included in the semiconductor process facility 100, and the mobile unit refers to a unit that performs work while moving among the units included in the semiconductor process facility 100. indicate For example, a robot carrying a wafer may be included in a moving unit, and a process chamber performing processing on a wafer may be included in a fixed unit.

Unit information may not include detailed operations specifically performed by the corresponding unit. That is, the unit information may include only whether the corresponding unit is a fixed unit or a mobile unit. Similarly, job information included in the scheduling information 310 may include information such as movement, door opening, door closing, job start or job stop, and wafer information and recipe information include only basic wafer and recipe information. can do.

The scheduler algorithm 320 may include algorithms necessary to create a scheduler. In the present invention, the scheduler algorithm 320 may include a plurality of algorithms prioritized for specific conditions. Referring to FIG. 3 , the scheduler algorithm 320 may include a quality priority algorithm 321, a yield priority algorithm 322, a multi-task priority algorithm 323, and the like.

The quality priority algorithm 321 represents a scheduling algorithm in which priority is given to quality, the yield priority algorithm 322 represents a scheduling algorithm in which priority is given to yield, and the multi-task priority algorithm 323 prioritizes multiple tasks. Indicates a ranked scheduling algorithm.

Specifically, the quality priority algorithm 321 represents an algorithm for improving the quality of a produced part by reducing the moving speed of the mobile unit or extending the working time of the fixed unit. The yield priority algorithm 322 represents an algorithm that increases the yield of production parts by increasing the moving speed of the mobile unit or reducing the working time of the stationary unit. The multi-task priority algorithm 323 represents an algorithm that allows tasks performed by as many fixed units as possible simultaneously.

Meanwhile, the quality priority algorithm 321, the yield priority algorithm 322, and the multi-task priority algorithm 323 are examples, and the scheduler algorithm 320 may include more various algorithms.

Referring back to FIG. 2 , the facility-specific information 330 includes information on each of the plurality of semiconductor processing facilities 100 . In particular, in the present invention, the facility-specific information 330 may include facility-specific information specific to each of the plurality of semiconductor processing facilities 100 . Referring to FIG. 4 , facility-specific information 330 may include cleaning facility information 331 , photo facility information 332 , deposition facility information 333 , and etching facility information 334 .

The cleaning facility information 331 may include detailed information of each unit included in the cleaning facility, the photo facility information 332 may include detailed information of each unit included in the photo facility, and the deposition facility information 333 may include detailed information of each unit included in the deposition facility, and the etching facility information 334 may include detailed information of each unit included in the etching facility. In other words, the facility-specific information 330 may be understood as including facility-specific information for each of a plurality of facilities.

Referring back to FIG. 2 , the scheduling application 340 may include at least one execution code to perform scheduling of the semiconductor process equipment 100 . Execution codes may be provided in the form of instructions, and the scheduling application 340 may include a plurality of instructions to schedule processes of the semiconductor process equipment 100 .

The memory 230 may temporarily store at least some of the information stored in the storage 240 . For example, scheduling information 310 , scheduler algorithm 320 , equipment specific information 330 , and scheduling application 340 may be loaded into memory 230 . The scheduling application 340 may be loaded into the memory 230 and operated, and at this time, the scheduling information 310, the scheduler algorithm 320, and facility-specific information 330 loaded into the memory 230 may be used.

The scheduling application 340 may include a create scheduler instruction 410 , a unit determination instruction 420 and a work order instruction 430 .

Create scheduler instruction 410 may create a scheduler. The scheduler creation instruction 410 may generate a scheduler by using equipment common information commonly applied to a plurality of different semiconductor processing facilities 100 . Facility common information may be extracted from the scheduling information 310 loaded into the memory 230 . The create scheduler instruction 410 can create a scheduler for a particular semiconductor processing facility 100 . That is, the scheduler generation instruction 410 may generate a scheduler by extracting information applicable to the selected semiconductor process facility 100 from the scheduling information 310 .

Also, the scheduler generation instruction 410 may create a scheduler by using a scheduling algorithm to which a priority is given to a specific condition among a plurality of scheduling algorithms. As described above, the scheduler algorithm 320 may include a quality priority algorithm 321, a yield priority algorithm 322, a multi-task priority algorithm 323, and the like. The scheduler may schedule operations of units of the semiconductor process facility 100 so that priority is given to specific conditions.

The scheduler generation instruction 410 may extract information corresponding to the above-described specific priority condition from equipment common information included in the scheduling information 310 and create a scheduler by referring to the extracted information. For example, if priority is given to production volume, the process can be performed without considering wafers. In this case, the scheduler generation instruction 410 generates a scheduler by extracting unit information, job information, and recipe information from equipment common information included in the scheduling information 310, but wafer information may not be extracted and may not be referred to.

The create scheduler instruction 410 may create a scheduler using the facility-specific information 330 . The scheduler generation instruction 410 may generate a scheduler by applying facility-specific information 330 to facility common information. For example, the scheduler generation instruction 410 may apply facility-specific information 330 including a moving path and a moving speed of the mobile robot to the mobile unit included in facility common information. Alternatively, the scheduler generation instruction 410 may apply detailed information on an etching process chamber to the fixed unit included in the equipment common information.

Referring to FIG. 5 , the scheduler 600 may be created using equipment common information 311 , equipment specific information 330 and scheduler algorithm 320 .

The priority condition 500 input through the input means 260 is referred to, equipment common information 311 is extracted from the scheduling information 310, and one of the scheduler algorithms 320 can be selected. The facility-specific information 330 is applied to the facility-specific information 311, and the scheduler 600 may be generated by the facility-specific information 311 to which the facility-specific information 330 is applied and the scheduler algorithm 320.

As the equipment-specific information 330 is applied to the standard equipment-common information 311, a simple scheduler 600 can be created.

Referring back to FIG. 2 , the unit determination instruction 420 determines a unit to perform a task among a plurality of units included in the selected semiconductor processing facility 100 among a plurality of semiconductor processing facilities 100, and provides a work instruction instruction ( 430) may instruct the determined unit to work. The unit determine instruction 420 and the work order instruction 430 may perform operations based on the scheduler 600 generated by the create scheduler instruction 410 .

The network interface 250 may communicate with the semiconductor processing equipment 100 . The network interface 250 may transmit a control command to the semiconductor processing facility 100 and receive monitoring information from the semiconductor processing facility 100 . Here, the control command may include a work instruction by the work instruction instruction 430 , and the monitoring information may include information about work performed in the semiconductor process facility 100 .

The input unit 260 may input a user command. For example, a user may input a selection command for a specific semiconductor process facility 100 among a plurality of semiconductor process facilities 100 through the input means 260 . The scheduler generation instruction 410 generates the scheduler 600 for the semiconductor process facility 100 input through the input means 260 .

The output means 270 may display the operating state of the process scheduling device 200 . For example, the output means 270 may display the operating state of the process scheduling device 200 in a visual or auditory manner. To this end, the output unit 270 may include a display device (not shown) and a speaker device (not shown).

Through the information displayed on the output means 270, the user can check the generation status of the scheduler 600, the unit determination status, and the work instruction status.

Although the embodiments of the present invention have been described with reference to the above and accompanying drawings, those skilled in the art to which the present invention pertains can implement the present invention in other specific forms without changing the technical spirit or essential features. You will understand that there is Therefore, the embodiments described above should be understood as illustrative in all respects and not limiting.

10: process scheduling system 100: semiconductor process equipment
200: process scheduling device 210: system bus
220: processor 230: memory
240: storage 250: network interface
260: input means 270: output means

Claims (11)

In the process scheduling device for scheduling for each semiconductor process facility,
processor;
a storage including a plurality of instructions and a scheduling application that performs the scheduling using the plurality of instructions;
a memory for temporarily storing the information stored in the storage;
a network interface communicating with each semiconductor processing facility;
input means for inputting a command to each semiconductor processing facility;
an output means for displaying an operating state of the process scheduling device; and
A system bus that is a data transmission/reception path between the processor, the storage, the memory, the network interface, the input unit, and the output unit,
The scheduling application is loaded into the memory and operates, based on equipment common information commonly applied to a plurality of different semiconductor process equipment and equipment specific information individually specialized and applied to each of the plurality of semiconductor process equipment. A process scheduling device that performs the scheduling and performs the scheduling by applying the equipment-specific information to the equipment-common information. According to claim 1,
The storage includes the equipment common information,
The facility common information includes information on a fixed unit performing a semiconductor process-related task at a fixed location and information on a mobile unit performing a semiconductor process-related task while moving. According to claim 1,
The storage includes the facility-specific information,
The facility-specific information,
First information including information of each unit included in a cleaning facility among semiconductor processing facilities;
Second information including information of each unit included in a photo facility among semiconductor processing facilities;
Third information including information on each unit included in a deposition facility among semiconductor processing facilities; and
Fourth information including information of each unit included in an etching facility among semiconductor processing facilities, or
Fifth information including a movement path of a unit included in a semiconductor processing facility; and
A process scheduling device comprising sixth information including moving speeds of units included in semiconductor processing equipment. According to claim 1,
The storage includes scheduler algorithms prioritized according to conditions for creating a scheduler,
The condition is a process scheduling device including at least one of quality, yield, and multiple jobs. According to claim 1,
Any one of the plurality of instructions creates a scheduler for the scheduling process scheduling device. According to claim 5,
Any one of the above instructions may include the moving speed of a mobile unit that performs work related to the semiconductor process while moving, the working time of the fixed unit that performs work related to the semiconductor process at a fixed location, and the number of the fixed units that are simultaneously inputted. A process scheduling device for generating the scheduler by adjusting at least one of According to claim 5,
The process scheduling apparatus of claim 1 , wherein the one of the instructions extracts information related to a condition to which priorities are assigned from the equipment common information, and generates the scheduler based on the extracted information. delete According to claim 5,
The one instruction includes information on each unit included in a cleaning facility among semiconductor processing facilities when the facility common information includes information on a fixed unit performing a semiconductor process-related operation at a fixed location. 1 information, 2nd information including information on each unit included in photo equipment among semiconductor process equipment, 3rd information including information on each unit included in deposition equipment among semiconductor process equipment, and etching equipment among semiconductor process equipment A process scheduling device for applying at least one piece of information among fourth information including information of each unit included in the equipment-specific information. According to claim 5,
Fifth information including a moving path of a unit included in a semiconductor processing facility when the facility common information includes information about a moving unit that performs work related to the semiconductor process while moving; and A process scheduling device for applying at least one of the sixth information including a movement speed of a unit included in a semiconductor processing facility as the facility-specific information. According to claim 1,
The plurality of instructions,
a scheduler generation instruction for generating a scheduler based on the equipment common information and the equipment specific information;
a unit determination instruction for determining a unit to perform an operation among a plurality of units included in the selected semiconductor processing equipment; and
Process scheduling apparatus comprising a work instruction instruction for instructing work to the determined unit.

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