KR102401592B1 - 중복제거 디램 캐시 - Google Patents

중복제거 디램 캐시 Download PDF

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KR102401592B1
KR102401592B1 KR1020180116617A KR20180116617A KR102401592B1 KR 102401592 B1 KR102401592 B1 KR 102401592B1 KR 1020180116617 A KR1020180116617 A KR 1020180116617A KR 20180116617 A KR20180116617 A KR 20180116617A KR 102401592 B1 KR102401592 B1 KR 102401592B1
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cache
deduplication
data
read
write
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KR20190088864A (ko
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무 티엔 창
앤드류 창
동옌 지앙
홍종 정
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삼성전자주식회사
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893—Caches characterised by their organisation or structure
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0891—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using clearing, invalidating or resetting means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893—Caches characterised by their organisation or structure
    • G06F12/0895—Caches characterised by their organisation or structure of parts of caches, e.g. directory or tag array
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G06F3/0611—Improving I/O performance in relation to response time
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638—Organizing or formatting or addressing of data
    • G06F3/064—Management of blocks
    • G06F3/0641—De-duplication techniques
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G06F2212/1024—Latency reduction
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
KR1020180116617A 2018-01-19 2018-09-28 중복제거 디램 캐시 Active KR102401592B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201862619723P 2018-01-19 2018-01-19
US62/619,723 2018-01-19
US15/934,940 US10705969B2 (en) 2018-01-19 2018-03-23 Dedupe DRAM cache
US15/934,940 2018-03-23

Publications (2)

Publication Number Publication Date
KR20190088864A KR20190088864A (ko) 2019-07-29
KR102401592B1 true KR102401592B1 (ko) 2022-05-24

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US (1) US10705969B2 (enExample)
JP (1) JP7010809B2 (enExample)
KR (1) KR102401592B1 (enExample)
CN (1) CN110058805B (enExample)
TW (1) TWI761608B (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11068406B2 (en) * 2017-07-27 2021-07-20 EMC IP Holding Company LLC Maintaining a single copy of data within a read cache
CN110764697B (zh) * 2019-09-29 2023-08-29 望海康信(北京)科技股份公司 一种数据管理方法及装置
US20200133884A1 (en) * 2019-12-19 2020-04-30 Intel Corporation Nvram system memory with memory side cache that favors written to items and/or includes regions with customized temperature induced speed settings
CN111263240B (zh) * 2020-02-12 2022-07-19 青岛海信宽带多媒体技术有限公司 Iptv 4k音视频播放管理方法、装置、显示设备
US11720484B2 (en) * 2020-07-28 2023-08-08 EMC IP Holding Company, LLC System and method for efficient background deduplication during hardening
US11442911B2 (en) 2020-08-31 2022-09-13 Google Llc Moving window data deduplication in distributed storage
CN112351293B (zh) * 2020-10-26 2021-09-21 北京达佳互联信息技术有限公司 一种检测状态信令丢失的方法、装置及介质
US11403212B1 (en) * 2021-05-05 2022-08-02 Vmware, Inc. Deduplication assisted caching policy for content based read cache (CBRC)
US12117939B2 (en) * 2021-12-21 2024-10-15 Advanced Micro Devices, Inc. Stochastic optimization of surface cacheability in parallel processing units
US20240311315A1 (en) * 2023-03-14 2024-09-19 Samsung Electronics Co., Ltd. Systems and methods for computing with multiple nodes
US12210453B2 (en) 2023-06-30 2025-01-28 Genesys Cloud Services, Inc. Technologies for configurable caching, deduplication, and rate limit handling

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8719501B2 (en) * 2009-09-08 2014-05-06 Fusion-Io Apparatus, system, and method for caching data on a solid-state storage device
KR101023877B1 (ko) * 2009-04-17 2011-03-22 (주)인디링스 캐시 및 디스크 관리 방법 및 상기 방법을 이용한 컨트롤러
US9401967B2 (en) 2010-06-09 2016-07-26 Brocade Communications Systems, Inc. Inline wire speed deduplication system
US9116812B2 (en) 2012-01-27 2015-08-25 Intelligent Intellectual Property Holdings 2 Llc Systems and methods for a de-duplication cache
US8732403B1 (en) * 2012-03-14 2014-05-20 Netapp, Inc. Deduplication of data blocks on storage devices
US9898410B2 (en) 2013-09-10 2018-02-20 Intel Corporation Hybrid main memory using a fine-grain level of remapping
US9304914B1 (en) 2013-09-26 2016-04-05 Emc Corporation Deduplicated cache system of a storage system
US9390116B1 (en) 2013-09-26 2016-07-12 Emc Corporation Insertion and eviction schemes for deduplicated cache system of a storage system
CA2920004C (en) * 2014-09-15 2019-10-22 Huawei Technologies Co., Ltd. Data deduplication method and storage array
US9852076B1 (en) * 2014-12-18 2017-12-26 Violin Systems Llc Caching of metadata for deduplicated LUNs
US10176190B2 (en) 2015-01-29 2019-01-08 SK Hynix Inc. Data integrity and loss resistance in high performance and high capacity storage deduplication
CN105095113B (zh) * 2015-07-21 2018-06-29 浪潮(北京)电子信息产业有限公司 一种缓存管理方法和系统
US20170091117A1 (en) 2015-09-25 2017-03-30 Qualcomm Incorporated Method and apparatus for cache line deduplication via data matching
US10169232B2 (en) * 2016-02-19 2019-01-01 Seagate Technology Llc Associative and atomic write-back caching system and method for storage subsystem
KR102190403B1 (ko) * 2016-05-20 2020-12-11 삼성전자주식회사 물리적 메모리 크기보다 큰 메모리 용량을 가능하게 하기 위한 방법 및 장치

Also Published As

Publication number Publication date
TWI761608B (zh) 2022-04-21
TW201933108A (zh) 2019-08-16
KR20190088864A (ko) 2019-07-29
JP2019128949A (ja) 2019-08-01
US10705969B2 (en) 2020-07-07
CN110058805A (zh) 2019-07-26
JP7010809B2 (ja) 2022-01-26
CN110058805B (zh) 2024-10-01
US20190227941A1 (en) 2019-07-25

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