KR102370021B1 - Method of manufacturing nano-structured semiconductor light emitting device - Google Patents

Abstract

Disclosed are a nanostructure semiconductor light emitting device capable of exhibiting various light emission wavelengths and a method for manufacturing the same.
Nanostructure semiconductor light emitting device according to the present invention is a substrate; a base layer formed of a first conductivity type semiconductor on the substrate; a plurality of nanorods formed on the first conductivity type semiconductor layer to be spaced apart from each other, wherein each of the plurality of nanorods includes a core layer formed of a first conductivity type semiconductor on the base layer, and a surface of the core layer an active layer including indium formed thereon, and a shell layer formed of a second conductivity type semiconductor on a surface of the active layer; The plurality of nanorods may include a first side portion, an inclined second side portion on the first side portion, and a ceiling portion on the second side portion.

Description

Nanostructure semiconductor light emitting device manufacturing method {METHOD OF MANUFACTURING NANO-STRUCTURED SEMICONDUCTOR LIGHT EMITTING DEVICE}

The present invention relates to a semiconductor light emitting device, and more particularly, to a nano-structured semiconductor light emitting device capable of exhibiting various emission wavelengths from a blue wavelength to a red wavelength.

In addition, the present invention relates to a method for manufacturing the nanostructured semiconductor light emitting device.

Quantum Dot, Organic Light Emitting Diodes (OLED) and micro-sized light sources for displays for semiconductor lighting as well as virtual reality (AR) and augmented reality (AR) Light-emitting diodes and the like are attracting attention. However, in the case of a quantum dot light source, it is known that it is very necessary to solve the problem of safety as well as the safety issue of constituent materials and the burn-in phenomenon in the case of OLED.

In contrast, a micro-sized light emitting diode made of an environmentally friendly material as well as stability can be said to be a light source with high competitiveness. In the field of micro-sized light emitting diodes, increasing the amount of light and improving the luminous efficiency are very important research topics, and various development directions and methods have been proposed according to the development goals. In particular, the light emitting properties have been continuously improved through the application of a light emitting layer and a quantum well layer based on Indium Gallium Nitride (InGaN), which is a nitride. ) In addition to increasing electron injection efficiency by applying an Electron Blocking Later (EBL) composed of a superlattice layer made of a combination of improvement has been steadily progressing.

However, research and development to improve these characteristics is basically based on a two-dimensional planar structure, and improvements have been made based on this.

In addition, there are many studies on the implementation of white light. In general, light of a single emission wavelength, such as blue light, is emitted from a single light emitting device. In general, a method of using a blue light emitting device and a yellow phosphor together or a method of using a blue light emitting device, a green light emitting device, and a red light emitting device together is used to realize white light. Accordingly, there is a need to realize white light by emitting light of various emission wavelengths from a single light emitting device.

Korean Patent Publication No. 10-2014-0096970 (published on August 6, 2014)

The problem to be solved by the present invention is to provide a nanostructure semiconductor light emitting device capable of exhibiting an emission wavelength from a blue wavelength to a red wavelength and a mixed wavelength in a nanostructure semiconductor light emitting device having a three-dimensional structure .

Another object of the present invention is to provide a method for manufacturing the nanostructure semiconductor light emitting device using a nano mold.

Nanostructure semiconductor light emitting device according to the present invention for solving the above problems is a substrate; a base layer formed of a first conductivity type semiconductor on the substrate; a plurality of nanorods formed on the base layer to be spaced apart from each other, wherein each of the plurality of nanorods includes a core layer formed of a first conductivity type semiconductor on the base layer, and indium formed on a surface of the core layer and an active layer, and a shell layer formed of a second conductivity type semiconductor on a surface of the active layer.

In this case, the nanostructure semiconductor light emitting device according to the present invention includes a plurality of nanorods on a first side portion, an inclined second side portion on the first side portion, and a ceiling portion on the second side portion.

Through the nano-structured semiconductor light emitting device having the above configuration, the surface area of the active layer can be increased, so that luminous efficiency can be improved. In particular, the first side portion, the second inclined side portion, and the ceiling portion may represent different crystal planes, and accordingly, different growth rates may be exhibited in the first side portion, the inclined second side portion, and the ceiling portion.

As a result, the thickness of the active layer formed on the first side part and the inclined second side part and the ceiling part may be different from each other, and therefore, due to the difference in the amount of indium deposited per unit area, the active layer formed on the first side part, the inclined type The active layer formed on the second side surface and the active layer formed on the ceiling may exhibit different emission wavelengths.

A crystal plane of the first side part may be an m-plane, a crystal plane of the second side part may be an r-plane, and a crystal plane of the ceiling may be a c-plane.

The first side portion may have a rectangular shape when viewed from the side, and the second side portion may have a trapezoidal shape whose width becomes narrower toward the upper side when viewed from the side. Meanwhile, the ceiling portion may have a hexagonal shape in plan view.

The pitch between the nanorods may be different from each other in the range of 1.0 ~ 4.5㎛. The smaller the pitch between the nanorods, the shorter the emission wavelength, and the larger the pitch between the nanorods, the longer the emission wavelength may be.

A method for manufacturing a nanostructure semiconductor light emitting device according to the present invention for solving the above problems comprises: forming a base layer of a first conductivity type semiconductor on a substrate; and forming a plurality of nanorods on the base layer.

The forming of the plurality of nanorods may include: forming a plurality of nano molds on the base layer in which the base layer is partially exposed; forming a plurality of core layers of a first conductivity type semiconductor in the plurality of nano molds; removing the plurality of nano molds; forming an active layer including indium on the surface of each core layer; and forming a shell layer of a second conductivity type semiconductor on the surface of the active layer.

At this time, in the present invention, in the forming of the plurality of core layers, a core layer including a first side part, a second inclined side part on the first side part, and a ceiling part on the second side part is formed. The core layer including the first side part, the inclined second side part, and the ceiling part may be formed while further growing on the nano mold after growth in the nano mold is completed in the process of depositing the first conductivity type semiconductor in the nano mold. .

A crystal plane of the first side part may be an m-plane, a crystal plane of the second side part may be an r-plane, and a crystal plane of the ceiling may be a c-plane.

An amount of indium per unit area of the active layer of the first side part and the active layer of the second side part may be different.

The pitch between the nanorods can be adjusted to be different from each other in the range of 1.0 ~ 4.5㎛.

The nanostructure semiconductor light emitting device according to the present invention can improve luminous efficiency through a three-dimensional active layer structure.

In particular, the present invention includes a nanorod including a first side portion, a second inclined side portion, and a ceiling portion. Accordingly, the thickness of the active layer of the first side portion, the thickness of the active layer of the inclined second side portion, and the thickness of the active layer of the ceiling portion may be different, and as a result, the emission wavelength in each portion may be different.

Furthermore, the nanostructure semiconductor light emitting device according to the present invention can control the wavelength of light emitted by changing the pitch interval between the nanorods. Through this, it is possible to emit light in a desired wavelength band, and furthermore, it is possible to realize white light.

1 schematically shows a nanostructure semiconductor light emitting device according to an embodiment of the present invention.
FIG. 2 shows the structure of the nanorod of FIG. 1 in more detail.
3A illustrates an example in which a base layer and an insulating layer are formed on a substrate.
3B shows that a nano mold is formed through etching.
FIG. 3C shows that a core layer made of a first conductivity type semiconductor material is formed on the nano-mold.
3D shows that the second insulating layer is removed through etching.
3E shows that an active layer, a shell layer, and a transparent electrode layer are formed on the core layer.
4A is a perspective view schematically illustrating a core layer including a first side part, a second side part, and a ceiling part.
4B is a side view schematically illustrating a core layer including a first side part, a second side part, and a ceiling part.
5 is a view for explaining a growth plane of a nitride semiconductor.

Advantages and features of the present invention, and methods for achieving them, will become apparent with reference to the embodiments and drawings described below in detail. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various different forms, and only these embodiments allow the disclosure of the present invention to be complete, and are common in the art to which the present invention pertains. It is provided to fully inform those with knowledge of the scope of the invention, and the present invention is only defined by the scope of the claims.

Hereinafter, a nanostructure semiconductor light emitting device and a method for manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings.

1 schematically shows a nanostructured semiconductor light emitting device according to an embodiment of the present invention, and FIG. 2 shows the structure of a nanorod in more detail.

Referring to FIG. 1 , a nanostructure semiconductor light emitting device according to an embodiment of the present invention includes a substrate 110 , a base layer 120 , and a plurality of nanorods 130 . An insulating layer 125 may be formed in a region where the nanorods 130 are not formed on the base layer 120 .

In addition, the plurality of nanorods 130 include a core layer 131 , an active layer 132 , and a shell layer 133 . A transparent electrode layer 134 may be formed on the surface of the shell layer 133 and the surface of the insulating layer 125 .

The substrate 110 may be a sapphire substrate, a silicon substrate, a GaN substrate, and various known substrates on which a nitride semiconductor may be grown may be used. Considering the nitride semiconductor growth efficiency and cost, the substrate 110 is most preferably a sapphire substrate or a silicon substrate.

The base layer 120 is formed of a first conductivity type semiconductor. For example, the base layer is an n-type conductivity-type semiconductor layer in which a nitride semiconductor such as GaN is doped with an n-type dopant such as Si. Another example is a p-type conductivity-type semiconductor layer in which a nitride semiconductor such as GaN is doped with a p-type dopant such as Mg. The base layer 120 and the core layer 131 of the nanorods 130 are formed of the same conductivity type semiconductor (eg, an n-type semiconductor). In addition, the shell layer 133 is formed of a conductive type semiconductor (eg, a p-type semiconductor) opposite to that of the base layer 120 and the core layer 131 .

Between the substrate 110 and the base layer 120 , in order to improve the crystal quality of the base layer 120 , a buffer layer made of AlN, low-temperature GaN, etc., an undoped nitride semiconductor layer such as un-GaN, etc. are additionally provided. can be formed.

Each of the plurality of nanorods 130 is a light-emitting structure, and is formed on the base layer 120 to be spaced apart from each other. In the present invention, the surface area of the active layer can be increased by including the plurality of nanorods 130 , and thus the luminous efficiency can be improved.

1 and 2 , each of the plurality of nanorods 130 includes a core layer 131 , an active layer 132 , and a shell layer 133 . Each of the nanorods 130 may have a diameter of about 10 nm to 1.5 μm, but is not limited thereto. Also, the nanorods 130 may have an aspect ratio of 1:10 to 1:1000, which means the ratio of the height to the diameter of the nanorods 120 , but is not limited thereto. The aspect ratio of the nanorods 120 may be determined by the nanomold.

The core layer 121 is formed of a first conductivity type semiconductor. The lower end of the core layer 121 is in contact with the base layer 110 made of the first conductivity type semiconductor material. The active layer 122 is formed on the surface of the core layer 121 , that is, on the side and top surfaces of the core layer 121 . The active layer 122 may have various well-known active layer structures including MQW (Multi Quantum Wells) structures.

The shell layer 133 is formed on the surface of the active layer 132 , that is, on the side and upper surfaces of the active layer 132 . The shell layer 133 is formed of a second conductivity type semiconductor, and the second conductivity type semiconductor is a conductivity type semiconductor opposite to that of the first conductivity type semiconductor of the core layer 131 . An electron blocking layer made of AlGaN material may be additionally formed between the active layer 132 and the shell layer 133 to prevent electron overflow in high current.

An insulating layer 125 is formed between the plurality of nanorods 130 , and the lower end of the active layer 132 and the lower end of the shell layer 133 made of the second conductivity type semiconductor material may contact the insulating layer 125 . there is.

Since the insulating layer 125 is formed, the nitride semiconductor is not deposited on the insulating layer when the nitride semiconductor is deposited. When the insulating layer 125 is not formed, nanorods spaced apart from each other may not be formed, and the shell layer 133 made of a second conductivity type semiconductor material is formed with the core layer 131 made of a first conductivity type semiconductor material. Direct contact issues may arise.

The insulating layer 125 may be formed to a thickness of about 10 nm to 100 nm. For the insulating layer 115 , a material on which a nitride semiconductor is difficult to be deposited, such as silicon nitride, silicon oxide, silicon oxynitride, or aluminum oxide, may be used. Since the nitride semiconductor is not deposited on the insulating layer 125 , nanorods spaced apart from each other may be formed. The insulating layer 125 is preferably a silicon nitride layer.

In addition, the nanostructured semiconductor light emitting device according to the present invention may further include a transparent electrode layer 134 .

The transparent electrode layer 134 may be formed on the surface of the nanorods, that is, the side and upper surfaces of the nanorods, and the surface of the insulating layer, that is, the upper surface of the insulating layer. The surface of the nanorods becomes the surface of the second conductivity type semiconductor layer. The transparent electrode layer 134 may be a film formed of a transparent and electrically conductive material such as a transparent conductive oxide film such as indium tin oxide (ITO), fluorine-doped tin oxide (FTO), or a graphene film.

As another example, a transparent conductive film such as an ITO film may be attached to the upper surface of the nanorods.

In addition, the nanostructured semiconductor light emitting device according to the present invention may further include a first electrode 141 and a second electrode 142 .

1 , the first electrode 141 may be formed on the base layer 120 made of a first conductivity type semiconductor material. The second electrode 142 may be formed on the transparent electrode layer 134 . For example, the first electrode 141 and the second electrode 142 may be connected to the printed circuit board through wire bonding. As another example, the first electrode 141 and the second electrode 142 may be connected to the printed circuit board in the form of a flip chip using a solder ball.

As can be seen in FIGS. 1 and 2 , in the nanostructure semiconductor light emitting device according to the present invention, a plurality of nanorods 130 have a first side portion, a second inclined side portion on the first side portion, and a second side portion It has a structure including the ceiling part of the upper part.

The first side part, the second inclined side part, and the ceiling part may represent different crystal planes from each other. Specifically, the crystal plane of the first side portion may be the m-plane, the crystal plane of the second side portion may be the r-plane, and the crystal plane of the ceiling may be the c-plane. The nanorod structure including the first side part, the inclined second side part, and the ceiling part will be described later with reference to FIGS. 4A, 4B and 5 .

Meanwhile, the pitch P between the nanorods may be the same, but preferably, the pitch P between the nanorods may be different from each other. In the present invention, the pitch P between nanorods is defined as a distance between the center of one nanorod and the center of another adjacent nanorod, as shown in FIG. 2 . This eventually becomes the distance between the centers of the core layer in the two adjacent nanorods.

When the pitch P between the plurality of nanorods is different, the deposition amount of indium included in the active layer 132 is changed. By changing the pitch (P) of individual nanostructures, the wavelength of the emitted light can be changed. This allows for regions such as for example a first region to which a first pitch is applied, a second region to which a second pitch different from the first pitch is applied, and a third region to which the first pitch and a third pitch different from the second pitch are applied. Accordingly, it can be designed to emit light of different wavelength bands.

Specifically, the pitch (P) between the nanorods may be different from each other in the range of 1.0 ~ 4.5㎛. The smaller the pitch between the nanorods, the shorter the light emission wavelength, and the larger the pitch P between the nanorods, the longer the light emission wavelength may be. For example, when the pitch between the nanorods is 1.0 to 1.4 μm, a blue emission wavelength may be exhibited. As another example, when the pitch between the nanorods is 2.4 to 3.0 μm, a green emission wavelength may be exhibited. As another example, when the pitch between the nanorods is 3.8 μm or more, a red emission wavelength may be exhibited. By adjusting the pitch between the nanorods in various ranges, it is possible to represent the emission wavelength from blue to red.

Accordingly, various emission wavelengths can be exhibited, and further, white light can be realized.

Table 1 shows the wavelengths of emitted light according to the pitch of the nanorods.

[Table 1]

Referring to Table 1, as the pitch of the nanorods increases, it can be seen that the emission wavelength is changed from 450 nm in the blue light region to 603 nm in the red light region. Based on these experiments, it is possible to predict the implementation of the wavelength characteristic of 648 nm at a pitch interval of 4.5 μm. The change in the wavelength characteristics according to the increase in the nanorod pitch is due to the change in the composition of indium constituting the light emitting layer, and it can be seen that indium incorporation increases as the pitch increases. The change in indium incorporation may be caused by a difference in the area in which indium is deposited according to the pitch of the nanorods, and as the pitch size increases, the deposition area of indium becomes relatively small. Mixing will increase. Therefore, as the nanorod pitch increases, the wavelength becomes longer.

In addition, referring to Table 1, when the indium deposition area and the relative emission wavelength at the 1.4 μm pitch are 1, when the 2.0 μm pitch increases, the indium deposition area decreases to 0.7 level and the relative wavelength increases by 1.067 times, , when increasing to a pitch of 2.4 μm, the indium deposition area decreases to a level of 0.583 and the relative wavelength increases by 1.144 times, and when increasing to a pitch of 2.8 μm, the deposition area of indium decreases to a level of 0.5, and the relative wavelength increases to a level of 1.200 it can be seen that

Hereinafter, a method for manufacturing a nanostructure semiconductor light emitting device according to the present invention will be described with reference to FIGS. 3A to 3E .

The method for manufacturing a nanostructure semiconductor light emitting device according to the present invention includes a base layer forming step and a plurality of nanorod forming steps.

First, as in the example shown in FIG. 3A , the base layer 120 is formed on the substrate 110 . Thereafter, as in the example shown in FIGS. 3A to 3E , a plurality of nanorods 130 are formed on the base layer 120 . The steps of forming the plurality of nanorods 130 are as follows.

3A , a first insulating layer 125 and a second insulating layer 127 are formed on the base layer 120 . For example, the first insulating layer 125 may be made of a silicon nitride material, and the second insulating layer 127 may be made of a silicon oxide material. The second insulating layer 127 serves as a nano mold for forming a plurality of nanorods spaced apart from each other. In addition, the height of the plurality of nanorods is determined by the thickness of the second insulating layer 127 . The thickness of the second insulating layer 127 may be 0.1 to 10 μm, but is not limited thereto.

Thereafter, as in the example shown in FIG. 3B , a plurality of nano molds in which the base layer 120 is partially exposed are formed on the base layer 120 through etching. The sidewalls of the nano mold become the first insulating layer 125 and the second insulating layer 127 thereon.

For example, to form the nanomold, the second insulating layer 127 and the first insulating layer 125 are sequentially etched. The etching may be performed using, for example, a process used in a semiconductor etching process, such as a laser etching process or a reactive ion etching process. As another example, an etchant capable of etching both the second insulating layer 127 and the first insulating layer 125 is used, or the second insulating layer 127 is etched through the first etchant, and then the second etchant is used. A method of etching the first insulating layer 125 may be used.

Thereafter, as shown in the example shown in FIG. 3C , a core layer 131 made of a first conductivity type semiconductor material is formed on the nano mold.

At this time, in the core layer forming step, after depositing the first conductivity type semiconductor to the top of the nano mold, due to the difference in growth rates of c, r and m-plane, the first side part, the inclined second side part and the ceiling part are included. to form a core layer.

When the filling of the nitride into the nano-mold is completed, a nitride semiconductor such as GaN grows out of the nano-mold, and the growth rate of the c-plane is faster than the m-plane or r-plane in a wurtzite nitride semiconductor. Thus, the filled nitride semiconductor has a hexagonal pyramid structure with a c-plane top. In addition, the side surface of the hexagonal pyramid is formed as an r-plane. This growth mechanism appears in a trapezoidal shape. Therefore, at the last stage for filling the nano-mold, it has a trapezoidal shape, and c-plane (0001) and r-plane (10-12) appear.

In addition, as a result of comparing the thickness of the InGaN thin film formed on the crystal plane for each crystal plane, it was confirmed that the growth rate of the r-plane was reduced to 30% or less compared to the m-plane (10-10). In terms of nanorods, the m-plane without c-plane polarization caused by the planar structure becomes the main crystal growth plane, and the r-plane generated during the finishing step of filling the nano-mold is the overall light emission of the nanostructure. It can be seen that the area is small compared to the area.

Meanwhile, the first side portion may be an m-plane, the inclined second side portion may be an r-plane, and the ceiling portion may be a c-plane (0001). The growth rate of the c-plane is faster than that of the m-plane (1-100) or r-plane (10-12) in a GaN-based nitride semiconductor having a wurtzite structure. The inclined second side portion may have a trapezoidal shape in which the nitride semiconductor growth rate is the slowest as an r-plane, and the width becomes narrower toward the top. Accordingly, the core layer may have a hexagonal pyramid structure having a c-plane ceiling portion.

Thereafter, as in the example shown in FIG. 3D , the second insulating layer 127 is removed through etching to form a plurality of core layers 131 spaced apart from each other. For example, when the first insulating layer 125 is made of silicon nitride and the second insulating layer 127 is made of silicon oxide, removal of the second insulating layer 127 is performed with an etchant having a high etch selectivity to silicon oxide. It may be carried out by wet etching using

Thereafter, as in the example shown in FIG. 3E , the active layer 132 including indium is formed on the surface of the core layer 131 , and the shell layer 133 is formed on the surface of the active layer 132 using a second conductivity type semiconductor. In addition, a transparent electrode layer 134 may be additionally formed on the side and top surfaces of the second conductivity-type semiconductor layer 133 of the nanorods, and on the top surface of the first insulating layer 125 . As another example, a transparent conductive film such as an ITO film may be attached to the upper portion of the second conductivity-type semiconductor layer 133 of the nanorods.

4A and 4B are perspective and side views schematically illustrating the core layer 131 of the nanorod including a first side part, a second side part, and a ceiling part.

Each of the core layers 131 has a structure including a first side part 410 , a second inclined side part 420 on the first side part, and a ceiling part 430 on the second side part.

The first side part 410 , the inclined second side part 420 , and the ceiling part 430 may represent different crystal planes from each other. Specifically, a crystal plane of the first side part 410 may be an m-plane, a crystal plane of the second side part 420 may be an r-plane, and a crystal plane of the ceiling 430 may be a c-plane. The m-plane, r-plane, and c-plane may be defined using the hexagonal prisms shown in FIG. 5 . The M-plane can be the side face (1-100) of the hexagonal prism, the c-plane can be the top face (0001) of the hexagonal prism, and the r-plane can be the diagonal face (10-12) of the hexagonal prism can be

As described above, as the crystal planes of the first side part 410, the second side part 420, and the ceiling part 430 are different, the first side part 410, the inclined second side part 420, and the ceiling part 430 are different from each other. growth rate can be indicated.

Specifically, the nitride semiconductor growth rate may be the fastest on the c-plane of the ceiling portion 430 , and the nitride semiconductor growth rate may be the slowest on the r-plane of the inclined second side portion 420 . For example, if the thickness of the active layer on the second side portion is 1, the thickness of the active layer on the first side portion may be about 3, and the thickness of the active layer on the ceiling portion may be about 17. As a result, the thicknesses of the active layers respectively formed on the first side part 410, the inclined second side part 420, and the ceiling part 430 may be different from each other, and thus a difference may occur in the amount of indium deposited per unit area. . Accordingly, the active layer formed on the first side portion 410 , the active layer formed on the inclined second side portion 420 , and the active layer formed on the ceiling portion 430 may exhibit different emission wavelengths.

The first side part 410 may have a rectangular shape when viewed from the side, and the second side part 420 may have a trapezoidal shape in which the width becomes narrower toward the upper side when viewed from the side. Meanwhile, the ceiling 430 may have a hexagonal shape when viewed in a plan view.

As described above, in the nanostructured semiconductor light emitting device according to the present invention, a plurality of nanorods have a hexagonal pyramid shape including a ceiling, so that the active layer thickness on each crystal plane is different and the pitch between the nanorods is different. It is possible to emit light having various emission wavelengths.

Although preferred embodiments of the present invention have been described in detail above, those of ordinary skill in the art will understand that various modifications and equivalent other embodiments are possible therefrom. Accordingly, the scope of the present invention is not limited thereto, and various modifications and improvements by those skilled in the art using the basic concept of the present invention defined in the following claims also fall within the scope of the present invention.

110: substrate
120: base layer
125: first insulating layer (insulating layer)
127: second insulating layer
130: nano rod
131: core layer
132: active layer
133: shell layer
134: transparent electrode layer
141: first electrode
142: second electrode
410: first side part
420: inclined second side part
430: ceiling

Claims (10)

delete delete delete delete delete delete forming a base layer of a first conductivity type semiconductor on a substrate; and
Including; forming a plurality of nanorods on the base layer;
The forming of the plurality of nanorods includes:
forming a plurality of nano molds on the base layer in which the base layer is partially exposed;
forming a plurality of core layers of a first conductivity type semiconductor in the plurality of nano molds;
removing the plurality of nano molds;
forming an active layer including indium on the surface of each core layer;
Comprising the step of forming a shell layer with a second conductivity type semiconductor on the surface of the active layer,
In the forming of the plurality of core layers, a first conductive type in the plurality of nano molds to form a core layer including a first side portion, a second inclined side portion on the first side portion, and a ceiling portion on the second side portion A method of manufacturing a nanostructure semiconductor light emitting device, characterized in that the first conductivity type semiconductor is grown outside the nano mold after the filling of the semiconductor is completed.
8. The method of claim 7,
The crystal plane of the first side portion is an m-plane, the crystal plane of the second side portion is an r-plane, and the crystal plane of the ceiling portion is a c-plane.
9. The method of claim 8,
The method of manufacturing a nanostructure semiconductor light emitting device, characterized in that the amount of indium per unit area of the active layer of the first side portion and the active layer of the second side portion is different.
8. The method of claim 7,
A method of manufacturing a nanostructure semiconductor light emitting device, characterized in that the pitch between the nanorods is differently adjusted in the range of 1.0 to 4.5 μm.

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