KR102342992B1 - Liquid crystal display device - Google Patents

Abstract

The present invention relates to a liquid crystal display device, comprising a column spacer provided between first and second substrates and a black matrix dividing a plurality of pixels into a light blocking region and an opening region, the black matrix being positioned between the opening region and the column spacer; , characterized in that it comprises a flow preventing metal pattern provided on the first substrate. By including the flow-blocking metal pattern, it is possible to prevent light leakage by limiting movement of the column spacer due to an external force, as well as to improve the aperture ratio.

Description

Liquid crystal display device {LIQUID CRYSTAL DISPLAY DEVICE}

The present invention relates to a liquid crystal display device capable of not only improving display quality but also improving transmittance.

Recently, as interest in information display is rising and the demand to use portable information media is increasing, a lightweight thin-film flat panel display (FPD) replacing the conventional display device, a cathode ray tube (CRT), has been developed. Research and commercialization are focused on. In particular, among these flat panel display devices, a liquid crystal display (LCD) is a device that expresses an image using the optical anisotropy of liquid crystal, and has excellent resolution, color display, and picture quality, and is actively applied to notebooks and desktop monitors. have.

The liquid crystal display generally includes an array substrate as a first substrate, a color filter substrate as a second substrate, and a liquid crystal layer formed between the array substrate and the color filter substrate. .

1 is a plan view schematically illustrating a part of a pixel structure of a conventional liquid crystal display device. As illustrated, in the array substrate, which is the first substrate, the gate line 20 and the data line 10 cross each other to define a pixel area, and a thin film transistor, which is a switching element, is disposed in the crossed area.

In addition, as shown in FIG. 2 , on the second substrate, the color filter substrate sub2 , a black matrix 55 corresponding to the edge of the pixel region, and a color filter pattern 60 formed in the region corresponding to the pixel region ) is included.

The liquid crystal display includes a liquid crystal panel bonded to each other with a liquid crystal layer interposed between a first substrate and a second substrate, and electrodes are formed on inner surfaces of the first and second substrates, and liquid crystal is generated by electric fields applied to the two electrodes. By changing the arrangement direction of molecules, a difference in transmittance occurs. The difference in transmittance of the liquid crystal panel is that the color combination is reflected while light supplied from a backlight placed on the rear surface passes through the color filter and is displayed in the form of a color image.

A spacer for maintaining a constant distance between the two substrates is positioned between the array substrate and the color filter substrate of a general liquid crystal display panel.

It is advantageous in terms of image quality to place the spacer in a region avoiding it rather than in a pixel region where an image is displayed. .

A method of randomly dispersing ball spacers such as glass beads or plastic beads was used for the spacers. However, as liquid crystal displays have become increasingly larger in recent years, column spacers formed on an array substrate or a color filter substrate have become increasingly difficult. is being used

However, in a general liquid crystal display device, after the array substrate and the color filter substrate are bonded together, the array substrate or the color filter substrate is moved in the horizontal direction by an external force. At this time, the column spacer also moves, and even if the array substrate or the color filter substrate is returned to its original position after moving, a light leakage defect occurs, which further deteriorates the display quality. This will be described in detail with reference to FIG. 3 .

As shown in FIG. 3 , when an external force is applied to the conventional liquid crystal display in the direction of the arrow, the upper second substrate sub2 moves to the right relative to the lower first substrate sub1 . will do At this time, the column spacer 50 on the second substrate sub2 also moves to the right, and the column spacer 50 comes into contact with the alignment layer 80 of the pixel area PA. The alignment layer 80 of the first substrate and the second substrate is rubbed in a predetermined direction, respectively. Due to contact with the column spacer 50 , the contact area of the alignment layer 80 changes its orientation to have a different alignment from other areas. do.

The column spacer 50 moved by the external force damages the alignment layer 80 made of polyimide (PI) on the first substrate sub1. Accordingly, the liquid crystal arrangement of the liquid crystal layer (not shown) interposed between the first substrate sub1 and the second substrate sub2 is misaligned, and light is leaked out. As such, the scratches on the alignment layer 80 generated while the spacers 50 formed on the second substrate sub2 are moved due to the deformation of the liquid crystal panel due to external force are not recovered even if the second substrate sub2 is returned to its original position. The orientation is shifted from the original arrangement, resulting in undesirable light leakage, light leakage.

In general, the leaked light is reddish, greenish, or bluish depending on the formation position of the column spacer 50 in the black image of the liquid crystal panel.

A typical liquid crystal display device has a column spacer 50 caused by external force as well as an area in which the column spacer 50 is located in order to improve stains and defects caused by pressure caused by the movement of the array substrate or the color filter substrate by external force. ), the area of the black matrix 55 under the color filter substrate is increased to correspond to the margin area M1. However, as the area of the black matrix 55 increases, the area of the light blocking region increases and the area of the opening region decreases, so that the opening ratio and luminance of the liquid crystal display device are lowered. This acts as the biggest obstacle to the needs of customers for high resolution and high aperture ratio, and in particular, brings a limit to securing the aperture ratio of the liquid crystal display device.

An object of the liquid crystal display according to an embodiment of the present invention is to provide a liquid crystal display capable of not only preventing light leakage caused by an external force, but also improving transmittance by reducing a black matrix area.

In addition, the liquid crystal display according to an embodiment of the present invention provides a liquid crystal display capable of preventing frictional charging between a column spacer and a transistor and improving display quality.

According to the present invention, in a liquid crystal display device comprising a first substrate having a step portion including a metal pattern and a second substrate having a black matrix defining a plurality of pixels as a light blocking region and an opening region and a column spacer, The step portion may be positioned between the opening region and the column spacer.

More specifically, the light blocking region includes a first transistor region and a second transistor region, and the flow-blocking metal pattern includes a first metal pattern positioned on the first transistor region and a second pattern positioned on the second transistor region. Includes metal patterns. In particular, it is preferable that the first metal pattern and the second metal pattern have a symmetrical structure spaced apart from each other.

Meanwhile, the flow-blocking metal pattern may include a third metal pattern extending to overlap the gate line, which is electrically connected to the common electrode positioned on the first substrate, and thus, a common voltage is applied do.

Furthermore, according to the present invention, the flow-blocking metal pattern may be provided in a shape surrounding the column spacer so as to restrict vertical, horizontal, horizontal movement of the column spacer.

The liquid crystal display according to an embodiment of the present invention includes a step portion including a metal pattern for preventing flow between a pixel region and a region in which the column spacer is located on a first substrate, so that the column spacer between the color filter substrate and the array substrate is subjected to external force. movement in the direction of the pixel region is suppressed, thereby preventing light leakage caused by the column spacer scratching the alignment layer, and improving the problem of deterioration of display quality.

In addition, the liquid crystal display according to the embodiment of the present invention has an advantage in that the transmittance is improved by securing the opening area by minimizing the black matrix area of the color filter substrate.

In addition, the liquid crystal display according to an embodiment of the present invention includes a flow-preventing metal pattern electrically connected to a common electrode, and applies a common voltage to the flow-blocking metal pattern to offset frictional charging generated between the column spacer and the transistor. Display quality can be improved.

Furthermore, the present invention has an advantage in that it is possible to improve the display quality deterioration problem by preventing staining and pressing caused by external force without separately changing the column spacer structure of the existing liquid crystal display device.

1 is a plan view schematically illustrating a pixel structure of a conventional liquid crystal display device.
2 is a cross-sectional view illustrating a conventional liquid crystal display having column spacers.
3 is a cross-sectional view for explaining the reason why light leakage occurs when an external force is applied in a conventional liquid crystal display device.
4 is a plan view schematically illustrating a pixel structure of a liquid crystal display according to the present invention.
5 is a plan view schematically illustrating a pixel structure of a liquid crystal display according to the present invention.
6 is a cross-sectional view schematically illustrating a cross-sectional structure of a liquid crystal display having a column spacer according to an embodiment of the present invention.
7 is a cross-sectional view schematically illustrating a cross-sectional structure of a liquid crystal display of a column spacer according to another exemplary embodiment of the present invention.

Advantages and features of the present invention and methods of achieving them will become apparent with reference to the embodiments described below in detail in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in a variety of different forms, and only these embodiments allow the disclosure of the present invention to be complete, and common knowledge in the technical field to which the present invention belongs It is provided to fully inform the possessor of the scope of the invention, and the present invention is only defined by the scope of the claims.

The shapes, sizes, proportions, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are illustrative and the present invention is not limited to the illustrated matters. Like reference numerals refer to like elements throughout. In addition, in describing the present invention, if it is determined that a detailed description of a related known technology may unnecessarily obscure the gist of the present invention, the detailed description thereof will be omitted.

The term “at least one” should be understood to include all possible combinations from one or more related items. For example, the meaning of “at least one of the first, second, and third items” means that each of the first, second, or third items as well as two of the first, second and third items It may mean a combination of all items that can be presented from more than one.

Each feature of the various embodiments of the present invention may be partially or wholly combined or combined with each other, technically various interlocking and driving are possible, and each of the embodiments may be independently implemented with respect to each other or implemented together in a related relationship. may be

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

4 is a plan view illustrating a part of an array substrate of a liquid crystal display according to the present invention, wherein a fringe field formed between a pixel electrode and a common electrode penetrates a slit to drive liquid crystal molecules positioned on the pixel region and the common electrode. A portion of the array substrate of a fringe-field-switching type liquid crystal display device that realizes However, the present invention is not limited thereto, and it is applied not only to the FFS method, but also to liquid crystal display devices such as an IPS method using a transverse electric field, a VA method using a vertical electric field, and a TN method.

In this case, in an actual liquid crystal display, N gate lines and M data lines intersect, and MxN sub-pixels exist. However, for simplicity of explanation, one sub-pixel is shown as an example in the drawing.

In FIG. 4 , the column spacers 150 formed on the color filter substrate are also shown for convenience of explanation.

4 , a gate line 120 extending in a first direction and a gate electrode (not shown) connected to the gate line 120 are formed on a first substrate.

A gate insulating layer (not shown) is formed on the gate line 120 and the gate electrode (not shown).

An active layer (not shown) made of amorphous silicon is formed on the gate insulating layer over the gate electrode. However, the present invention is not limited thereto, and a polycrystalline silicon thin film or an oxide semiconductor may be used as the active layer.

A data line 110 extending in the second direction, a source electrode connected to the data line 110 , and a drain electrode spaced apart from the source electrode are formed on the active layer (not shown). The data line 110 crosses the gate line 120 to define a plurality of pixels.

Here, it extends from the data line 110 to become a source electrode (not shown), but the source electrode (not shown) may be a part of the data line 110 .

The gate electrode, the active layer, the source electrode, and the drain electrode constitute the thin film transistor T, and the active layer between the source electrode and the drain electrode becomes a channel of the thin film transistor T.

Here, the thin film transistor T is not limited to the illustrated structure, and the structure may be different.

Meanwhile, the thin film transistor T connected to the odd-numbered gate line may be connected to the left data line, and the thin film transistor T connected to the even-numbered gate line may be connected to the right data line. Alternatively, the thin film transistor T connected to the odd-numbered gate line may be connected to the right data line, and the thin film transistor T connected to the even-numbered gate line may be connected to the left data line.

In FIG. 4 , it is illustrated that the pixel electrode 140 is formed to have a plurality of slits and the common electrode 135 is formed in a single pattern. However, instead of the pixel electrode 140 , the common electrode 135 has a plurality of slits. The pixel electrode 140 and the common electrode 135 may be formed on the same layer.

A first passivation layer and a second passivation layer 190 are sequentially formed on the data line 110 and the source and drain electrodes. Here, the first passivation layer is formed of an inorganic material, and the second passivation layer is formed of an organic material and has a flat surface. The first passivation layer may be omitted.

Each of the plurality of pixels may be divided into a light blocking area that is a non-opening area and a pixel area that is an open area. In general, the black matrix 155 defines a plurality of pixels as a non-aperture area and an open area. That is, an area corresponding to the black matrix 155 is defined as a non-opening area, and an area in which the black matrix 160 is not formed is defined as an open area. Various driving elements and wirings such as a thin film transistor T are formed in the light blocking area corresponding to the non-opening area, and the pixel electrode 150 and the common electrode 135 are formed in the pixel area defined as the open area.

The pixel electrode 140 formed in each opening area on the inner surface of the first substrate sub1 extends in the second direction, includes a plurality of electrode patterns spaced apart from each other in the first direction, and contacts the drain electrode through a contact hole. do.

The pixel electrode 140 is inclined at a predetermined angle with respect to the gate line 120 and has a central portion bent at least once. It may have bends. Accordingly, the data line 110 is also inclined at a predetermined angle with respect to the gate line 120 so as to be parallel to the pixel electrode 140 , and has a bent portion corresponding to each pixel area.

In addition, the alignment layer 180 is formed on the pixel electrode 140 , and the alignment layer 180 is rubbed along a predetermined direction.

In addition, a black matrix 155 is formed on the inner surface of the second substrate sub2 to correspond to a light blocking area that is a non-opening area, and a color layer 160 is formed on the black matrix 155 , and the color layer 160 is formed on the black matrix 155 . ) on the overcoat layer 170 may be formed. Also, the alignment layer 180 is formed on the overcoat layer 170 like the first substrate sub1 .

In addition, column spacers 150 are formed on the alignment layer 180 corresponding to the black matrix 155 , and at least one column spacer 150 may be formed per one pixel.

Specifically, the color layer 160 formed on the black matrix 155 includes a red color filter, a green color filter and A blue color filter is formed. A partial region of each of the red color filter, the green color filter, and the blue color filter may overlap the black matrix 155 .

In addition, an overcoat layer 170 may be formed on the second substrate sub2 to cover the black matrix 155 , the red color filter, the green color filter, and the blue color filter. The overcoat layer 170 is a layer for planarizing the lower portion of the second substrate sub2 on which the black matrix 155 and the color layer 160 are formed, and is formed of an insulating material. The overcoat layer 170 includes the planarization layer and the planarization layer. It may be formed of the same material.

A bar-shaped column spacer 150 is provided on the overcoat layer 170 between the first substrate sub1 and the second substrate sub2 . Here, the bar-shaped column spacer 150 is a cell gap spacer for maintaining a cell gap of the liquid crystal display, but is not limited thereto, and may be a pressed spacer to prevent being pressed.

As described above, it is advantageous in terms of image quality that the bar-shaped column spacer 150 is formed in the non-opening area. That is, the bar-shaped column spacer 150 may be disposed in the non-opening region in which the transistor of each pixel is formed, and may have a bar shape extending in the same direction as the extending direction of the gate line 120 .

According to an embodiment of the present invention, a metal pattern PTN is formed on the first substrate sub1 to prevent the column spacer from flowing between the column spacer 150 and the opening region where the pixel electrode 140 is located. It is provided with a step portion including. Here, the flow-blocking metal pattern PTN is preferably disposed in a region in which a transistor is formed in a light blocking region of each pixel.

By including the flow-blocking metal pattern PTN in the region between the opening region and the column spacer 150 , a step portion is provided on the surface of the alignment layer 180 on the first substrate sub1 . As the step portion is provided, it is possible to control the movement of the column spacer 150 even when the second substrate sub2 moves horizontally due to an external force.

In this case, it is preferable that the step portion can prevent the flow of the metal pattern PTN, and for this purpose, the flow prevention metal pattern PTN may have a thickness of 2000 Å or more.

Meanwhile, in the present invention, the common electrode 135 is formed on the entire surface of the substrate sub1 and overlaps the common electrode 135 to form the pixel electrode 140 including a plurality of electrode patterns. ) and the pixel electrode 140 each include a plurality of electrode patterns, and may be alternately disposed in the pixel area. Alternatively, the pixel electrode 140 may be formed with an area corresponding to the pixel area, formed on the entire surface of the substrate sub1 on the pixel electrode 140 , and the common electrode 135 may have a plurality of openings corresponding to the pixel area. have.

5 is an enlarged plan view of a portion in which a column spacer is positioned in a liquid crystal display according to an exemplary embodiment of the present invention.

5 , the light blocking region includes a first transistor region and a second transistor region, and the flow-blocking metal pattern PTN includes a first metal pattern PTN1 positioned on the first transistor region and the and a second metal pattern PTN2 positioned on the second transistor region. Here, the first metal pattern PTN1 and the second metal pattern PTN2 have a symmetrical structure spaced apart from each other, and it is preferable that the first metal pattern PTN1 and the second metal pattern PTN2 have a structure that restrains the column spacer 150 .

Hereinafter, a detailed structure according to an embodiment of the present invention will be described. 5 , the column spacer 150 includes a first column spacer and a second column spacer provided in the light blocking area. The first metal pattern PTN1 and the second metal pattern PTN2 have a symmetrical structure spaced apart from each other and are preferably arranged as a pair. More specifically, the first metal pattern PTN1 is the first column spacer. has a first portion extending in a first direction to surround one edge of the outer portion and a second portion extending in a second direction perpendicular to the first direction, wherein the second metal pattern PTN2 is the second column spacer It has a third portion extending in the first direction and a fourth portion extending in the second direction so as to surround the other edge of the outer portion of the .

In addition, a third metal pattern PTN3 extending in the first direction to overlap the gate line 120 is further included.

Through this structure, even if the second substrate sub2 moves due to an external force applied to the liquid crystal display, it is possible to prevent the column spacer 150 from moving in the direction of the opening region. Accordingly, it is possible to prevent the alignment layer 180 from being damaged by preventing contact between the column spacer 150 and the alignment layer 180 in the opening region.

In other words. Even when an external force is applied to the liquid crystal display device, the vertical flow of the column spacer 150 can be restricted.

In addition, since the flow-blocking metal patterns PTN1 and PTN2 have the second and fourth portions extending in the second direction, vertical and horizontal movements of the column spacer 150 may be restricted.

For this reason, even when the column spacer is pushed to the left or right by an external force, the contact of the spacer with the alignment layer may be minimized.

In addition, the liquid crystal display according to the present invention improves display quality by minimizing vertical/left/right movement of the column spacer 150 as described above, as well as a first metal pattern and a second metal pattern having a symmetrical structure spaced apart from each other. Since it is possible to secure an aperture ratio due to the patterns PTN1 and PTN2, it has an advantage in improving transmittance.

That is, in order to effectively prevent vertical/left/right flow of the column spacer 150 and to maximize the aperture ratio, the shape as described above rather than the first metal pattern PTN1 and the second metal pattern PTN2 being provided integrally It is preferable to have a symmetrical structure spaced apart from each other and to surround the column spacer.

The flow-blocking metal pattern PTN may further include a third metal pattern PTN3 extending to overlap the gate line 120 . The third metal pattern PTN3 may be a wiring additionally formed on the common electrode 135 of the liquid crystal display to overlap the gate line 120 or may be the same wiring as the common wiring provided to apply a common voltage. .

In general, the third metal pattern PTN3 may be used as a common wiring for applying a common voltage, different from the first and second metal patterns PTN1 and PTN2, and as a wiring for applying other driving signals. can also be used, it is preferable to extend in the first direction to overlap the gate line 120 without being patterned to have a separate pattern shape.

In this way, the liquid crystal display according to the embodiment of the present invention has a step portion on the first substrate sub1 through the flow preventing metal pattern PTN, so that the column spacer 150 is supported even when an external force is applied. Therefore, the alignment layer 180 of the pixel area does not come into contact with the column spacer 150 , and thus light leakage in the black image can be prevented.

In particular, in the liquid crystal display according to the present invention, the display quality is improved by minimizing vertical/left/right movement of the column spacer 150 as described above, and the first metal pattern and the second metal pattern and the second metal having a symmetrical structure spaced apart from each other. Due to the patterns PTN1 and PTN2, there is an advantage in securing an aperture ratio.

The flow prevention metal pattern (PTN) according to an embodiment of the present invention may be formed in various positions, and will be described in detail with reference to the drawings below.

6 is a cross-sectional view schematically illustrating a cross-sectional structure of a liquid crystal display having a column spacer according to an embodiment of the present invention.

As shown in FIG. 6 , a gate electrode is formed on the first substrate sub1 . Although not shown, a gate line ( 120 of FIG. 4 ) extending in the first direction and in contact with the gate electrode is also formed on the first substrate sub1 . The gate line ( 120 in FIG. 4 ) and the gate electrode are made of a metal material having a relatively low resistivity.

A gate insulating layer is formed on the gate electrode and the gate line 120 . The gate insulating layer is made of an inorganic insulating material such as silicon nitride or silicon oxide.

An active layer (not shown) is formed on the gate insulating layer over the gate electrode. The active layer (not shown) is made of intrinsic amorphous silicon. However, the present invention is not limited thereto, and a polycrystalline silicon thin film or an oxide semiconductor may be used as the active layer.

Source and drain electrodes are formed on the active layer (not shown). The source and drain electrodes are spaced apart from the center of the gate electrode. In addition, a data line ( 110 of FIG. 4 ) is formed on the gate insulating layer, and the data line ( 110 of FIG. 4 ) is connected to the source electrode and extends in the second direction, and crosses the gate line ( 120 of FIG. 4 ) to define the pixel area. The data line 110 in FIG. 4 and the source and drain electrodes are formed of a metal material having a relatively low resistivity.

Meanwhile, an ohmic contact layer made of impurity-doped amorphous silicon is formed between the active layer (not shown) and the source electrode and between the active layer (not shown) and the drain electrode.

Here, the gate electrode, the active layer, the source electrode, and the drain electrode constitute a thin film transistor, and the structure of the thin film transistor is not limited to the illustrated one, and may vary.

A first passivation layer is formed on the data line ( 110 of FIG. 4 ) and the source and drain electrodes, and a second passivation layer 190 that is a planarization layer is formed over the first passivation layer. The first passivation layer is made of an inorganic insulating material such as silicon nitride or silicon oxide, and the second passivation layer 190 is made of an organic insulating material such as photoacrylic and has a flat surface. Here, the first passivation layer may be omitted.

A common electrode 135 is formed on the second passivation layer 190 to correspond to the entire surface of the substrate sub1 . The common electrode 135 is made of a transparent conductive material such as indium tin oxide or indium zinc oxide, and may have an opening corresponding to the drain electrode. Accordingly, it may be provided without an opening.

According to the present invention, a flow preventing metal pattern (PTN) is formed on the common electrode 135 . The flow-blocking metal pattern PTN may be formed of a single layer of copper (Cu), a copper alloy, or a molybdenum and titanium alloy (MoTi), or a double layer. However, it is preferable that the flow-blocking metal pattern PTN is a metal material having a relatively low resistivity.

A third passivation layer is formed on the flow preventing metal pattern PTN. The third passivation layer may be formed of an inorganic insulating material such as silicon nitride or silicon oxide. A step portion may be formed on the surface of the alignment layer 180 of the first substrate sub1 by the flow-blocking metal pattern PTN positioned on the common electrode 135 .

In this case, it is preferable that the step portion can prevent the flow of the metal pattern PTN, and for this purpose, the flow prevention metal pattern PTN may have a thickness of 2000 Å or more.

A pixel electrode 140 is formed in the pixel region on the third passivation layer. The pixel electrode 140 is formed of a transparent conductive material such as indium-tin-oxide or indium-zinc-oxide, and includes a plurality of electrode patterns spaced apart from each other and overlapping the common electrode 135 .

In the present invention, the alignment layer 180 of the pixel region is formed by the movement of the column spacer 150 by forming a step portion including the flow preventing metal pattern PTN on the common electrode 135 to support the column spacer 150 . avoid being affected.

In addition, the flow-blocking metal pattern PTN may be electrically connected to the common electrode 135 . However, when the first metal pattern (PTN1 in FIG. 5 ) and the second metal pattern ( PTN2 in FIG. 5 ) overlap the opening area of the common electrode 135 , they may not be connected.

The third metal pattern (PTN3 of FIG. 5 ) may be formed as a common wiring for applying a voltage to the common electrode, or may include a separate wiring. In any case, the third metal pattern (PTN of FIG. 5 ) is electrically connected to the common electrode 135 .

In general, as the column spacer 150 of the liquid crystal display is moved by an external force, frictional charging may occur between the surface of the transistor and the column spacer 150. In the liquid crystal display according to the present invention, the common electrode 135 and the electrical A common voltage signal is also applied to the flow-blocking metal pattern (PTN) connected by can have an effect.

7 is a cross-sectional view schematically illustrating an array substrate for a liquid crystal display having a column spacer according to another embodiment of the present invention.

As shown in FIG. 7 , according to another embodiment of the present invention, the flow-blocking metal pattern PTN may be located under the common electrode 135 of the first substrate sub1 .

7 also, as described in FIG. 6, by forming a step on the alignment layer 180 of the first substrate sub1 through the flow prevention metal pattern (PTN), it is possible to restrict the movement of the column spacer 150, Accordingly, it is possible to prevent the alignment layer 180 of the pixel region from being damaged by the movement of the column spacer 150 .

In addition, a common voltage may be applied to the flow-blocking metal pattern PTN by being electrically connected to the common electrode 135 , and thus frictional charging between the surface of the transistor and the column spacer 150 generated by an external force is canceled can bring about the effect of

As described above, according to the present invention, the flow-blocking metal pattern PTN is included between the pixel region in which the pixel electrode 140 is provided and the region in which the column spacer 150 is provided on the first substrate sub1 . Thus, by forming the stepped portion on the first substrate sub1 , it is possible to restrict movement of the column spacer 150 in the pixel direction. That is, since the column spacer 150 does not move in the pixel area direction even when a force is applied to the panel from the outside, it is possible to prevent light leakage caused by the movement of the column spacer 150, and to reach the conventional light leakage area. The aperture ratio of the liquid crystal display panel may be improved by reducing the area of the formed black matrix 155 .

In addition, since the movement of the column spacer 150 is controlled without changing the structure of the column spacer 150 by including the flow prevention metal (PTN) according to the present invention, the side effect caused by the structure change of the existing column spacer 150 is reduced. can be prevented

Although embodiments of the present invention have been described in more detail with reference to the accompanying drawings, the present invention is not necessarily limited to these embodiments, and various modifications may be made within the scope without departing from the technical spirit of the present invention. . Accordingly, the embodiments disclosed in the present invention are not intended to limit the technical spirit of the present invention, but to explain, and the scope of the technical spirit of the present invention is not limited by these embodiments. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not restrictive. The protection scope of the present invention should be construed by the following claims, and all technical ideas within the scope equivalent thereto should be construed as being included in the scope of the present invention.

Sub1: first substrate
Sub2: second substrate
10, 110: data line
20, 120: gate line
30, 130: common electrode
40, 140: pixel electrode
50, 150: column spacer
60, 160: color layer
70, 170: overcoat layer
80, 180: alignment layer
90, 190: protective layer

Claims (12)

a first substrate having a step portion including a metal pattern; and
A second substrate including a black matrix defining a plurality of pixels as a light blocking region and an opening region and a column spacer;
The step portion is positioned between the opening region and the column spacer,
The light blocking region has a first transistor region and a second transistor region,
The metal pattern includes a first metal pattern positioned on the first transistor region and a second metal pattern positioned on the second transistor region.
delete The method of claim 1,
The first metal pattern and the second metal pattern have a symmetrical structure spaced apart from each other.
The method of claim 1,
a gate line is provided on the first substrate;
The liquid crystal display device further comprising a third metal pattern extending to overlap the gate line.
5. The method of claim 4,
Further comprising a common electrode on the first substrate,
and the third metal pattern is electrically connected to the common electrode.
6. The method of claim 5,
The first metal pattern and the second metal pattern are electrically connected to the common electrode.
6. The method of claim 5,
The metal pattern is positioned on the common electrode.
6. The method of claim 5,
The metal pattern is located under the common electrode.
The method of claim 1,
The column spacer includes a first column spacer and a second column spacer provided in the light blocking area,
The metal pattern may include a first metal pattern having a first portion extending in a first direction to surround one edge of an outer portion of the first column spacer and a second portion extending in a second direction perpendicular to the first direction;
and a second metal pattern having a third portion extending in the first direction and a fourth portion extending in the second direction to surround the other edge of the outer portion of the second column spacer.
10. The method of claim 9,
a gate line is provided on the first substrate;
and a third metal pattern overlapping the gate line and extending in the same direction as the gate line.

4. The method of claim 3,
The first metal pattern includes a first portion extending in a first direction to surround one edge of the column spacer, and a second portion extending from the first portion in a second direction perpendicular to the first direction, ,
The second metal pattern includes a third portion extending in a first direction to surround the other edge of the column spacer, and a fourth portion extending from the third portion in a second direction perpendicular to the first direction liquid crystal display.
12. The method of claim 11,
a gate line is provided on the first substrate;
Further comprising a third metal pattern extending to overlap the gate line,
and the third metal pattern is parallel to the first portion and the third portion.

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