KR102288657B1 - Power supply and control method of power supply - Google Patents

Abstract

In polyphase interleaving control of a power supply device, the pulse width ΔT of each phase is allowed to overlap with each other, so that the control can be performed corresponding to a wide-band pulse power control. When the deadbeat control is applied to polyphase interleaving, constant current control is performed using the combined current of each phase current, and pulse width ΔT(k) is calculated in this constant current control to calculate the pulse width ΔT(k) of each phase. Suppresses the deviation between each phase of , and performs stable power control. In this way, the pulse power control is assumed to be broadband. In addition, even in two-level pulse power control in which high-level power and low-level power are switched to high frequency and controlled, it is possible to control in a wide band.

Description

Power supply and control method of power supply

The present invention relates to a power supply device and a method for controlling the power supply device.

DESCRIPTION OF RELATED ART The function which can supply RF power in the pulse state to a plasma load is calculated|required with the high density and high precision of thin film formation, such as ashing and an etching, for a semiconductor, a flat panel manufacturing apparatus, etc. In particular, there is a demand for a two-level pulse power control that performs a high/low pulse power operation in a wide band by continuously varying the RF power between the low power of the minimum power that does not extinguish the plasma and the high power required for thin film generation.

For example, the frequency band required for high/low pulse power operation is 1Hz-50kHz. As a power supply device for supplying RF power, it is known that class A to class E amplifiers by PI control are used, but in PI control, two-level pulse power control covering a wide band of several Hz to several tens of kHz is not feasible.

In such a situation, power sources used in fields such as RF power sources for facilities require a power supply capable of two-level pulse power control that performs high/low pulse power operation in a wide band.

As a power supply from which a high-speed response is expected, there is a power supply using an interleaved method. For example, the following Patent Documents 1 to 3 are known.

Patent Document 1 discloses an interleaved control power supply device for improving power factor, comprising a converter of a master and a converter of a slave, and operating the switching element of the master converter and the switching element of the slave converter with a predetermined phase difference, and performing voltage control by interleaving performed based on the fed back output voltage.

In Patent Document 2, a step-up chopper circuit is constituted by an interleaved circuit of a multiphase control type of two or more phases n or more in which the main switch switches with a predetermined phase difference from each other, and control by interleaving is performed based on the fed back output voltage. What to do is described.

Patent Document 3 describes protecting a power element by solving the problem of current inequality between phases occurring in a polyphase interleaved converter, and current control by interleaving based on the phase currents of sub-circuits provided for each phase. What to do is described.

Japanese Patent Laid-Open No. 2010-119285 Japanese Patent Laid-Open No. 2015-177636 Japanese Patent Laid-Open No. 2015-220976 Japanese Patent Publication No. 5704772

In a power supply device, application of polyphase interleaving is considered as a pulse power control in a wide band. However, the interleaved control disclosed in Patent Documents 1 and 2 described above is a control method in which voltage control is performed based on the fed back output voltage, and Patent Document 3 is a control in which current control is performed based on the phase current of each phase. As the method, there are problems as shown below, respectively.

Since the interleaved control disclosed in Patent Documents 1 and 2 is a _{constant voltage control performed by feeding back the output voltage o} , a secondary oscillation voltage is generated in a step response, and overshoot or undershoot occurs in the output voltage. there is a problem with In order to suppress this overshoot or undershoot, it is necessary to set the speed of the control response to a low speed, and it is impossible to respond to a high speed response.

It is a figure for demonstrating the constant voltage control which shows the equivalent circuit of an LCR circuit, and feeds _{back the output voltage o.} Incidentally, here, an example of a power supply device including a step-down chopper circuit constituted by an LCR circuit is shown.

In the LCR circuit shown in Fig. 19, the output voltage v _o obtained from the step response when the input voltage U is input is expressed by the following formula (1).

[Number 1]

The above formula (1) indicates that the output voltage v _o is a secondary oscillation voltage, and suggests generation of overshoot or undershoot.

In addition, since the interleave control disclosed in Patent Document 3 is current control performed based on the phase currents of each phase, there is a problem that a plurality of detection units are required to detect each phase current, and the control becomes complicated.

In addition, the conventional interleave control has a problem in terms of the set width of the pulse width ΔT of each phase constituting the interleave, and it is difficult to cope with a wide band.

In order to make the bandwidth of pulse power control correspond to a wide band, it is required that the set width of the pulse width ΔT of each phase of the interleave can be arbitrarily adjusted. However, the conventional interleave control is a control in which the pulse widths of the respective phases do not overlap each other, and there is a limit to the set width of the pulse width ΔT.

For example, the interleave control disclosed in Patent Document 1 is a two-phase interleave that is in an inverse relationship to each other, and the interleaved control disclosed in Patent Document 2 does not disclose control in which the pulse widths of each phase overlap each other. The interleave control disclosed in Patent Document 3 is a control in which phase pulses are distributed in time series at predetermined phase intervals, for example, as shown in Fig. 4 in the literature, and the pulse widths of each phase do not overlap each other. .

Therefore, when the conventionally known interleave control is applied, since the pulse width ΔT of each phase is limited to the control that does not overlap each other, the pulse width ΔT of each phase of the interleave is not allowed to overlap each other. Therefore, the pulse width ΔT cannot be adjusted to an arbitrary set width, and it is difficult to make the pulse power control correspond to a wide bandwidth.

Therefore, in the polyphase interleaving control of the power supply device, a control that allows the pulse width ΔT of each phase to overlap each other and makes it possible to cope with a wide-band pulse power control is required.

An object of the present invention is to solve the above conventional problems, and to allow the pulse width ΔT of each phase to overlap each other in the polyphase interleave control of a power supply device, and to control a wideband pulse power control.

As a control method, a deadbeat control in which a fast dynamic response and a high gain are obtained as compared with the PI control is known. In the deadbeat control, with respect to a state equation obtained by developing a circuit state using input and output as state variables as a discrete model, pulse width ΔT(k) such that the output of the sampling period (k+1)th becomes equal to the target value. is calculated for each sampling period, and the switching operation is controlled by the calculated pulse width ΔT(k).

Power control of power supplies with deadbeat control applied to polyphase interleaving is unknown. If it is attempted to apply the deadbeat control to each phase of the polyphase interleave, since the pulse width ΔT(k) obtained by the deadbeat control of each phase will vary between phases, stable power control is desired. can't

In the present invention, when the deadbeat control is applied to polyphase interleaving, constant current control is performed using the combined current of each phase current, and the pulse width ΔT(k) is calculated in the constant current control to calculate the pulse width of each phase. Stable power control is performed by suppressing the variation between phases of ΔT(k).

The present invention enables control using a pulse width ΔT(k) that allows overlapping of the pulse widths of each phase by performing constant current control using the combined current of each phase current, and thereby, the pulse power Let the control be broadband. In addition, even in two-level pulse power control in which high-level power and low-level power are switched to high frequency and controlled, it is possible to control in a wide band.

(Power Unit)

The power supply device of the present invention includes an LC chopper circuit, and includes a control unit that performs step response control toward a command value by polyphase interleave control that performs polyphase control by a plurality of phase currents, and a switching signal generation unit that generates a switching signal.

The control unit of the present invention controls the switching signal for driving the LC chopper circuit by constant current control (deadbeat control) of a predetermined period performed based on the control current including the synthesized current obtained by synthesizing the phase currents in the LC chopper circuit. Calculation of the pulse width ?T(k) is performed for each sampling period T.

The switching signal generator of the present invention generates a switching signal for each phase by using the pulse width ΔT(k) calculated by the control unit as the pulse width ΔT(k) of each phase current.

In the calculation of the pulse width ΔT(k), by calculating based on the control current including the synthesized current obtained by synthesizing the phase currents, the limitation due to the overlap of the pulse width ΔT(k) of each phase can be eliminated, The pulse width ΔT(k) that allows the pulse width ΔT of each phase to overlap with each other can be obtained, so that a wide-band pulse power control is possible.

In addition, by performing calculation based on the control current including the synthesized current obtained by synthesizing the phase currents, a plurality of detection units is unnecessary to detect the respective phase currents.

The control unit performs constant current control at a predetermined cycle by setting the pulse width ΔT(k) calculated by the calculating unit as the pulse width ΔT(k) of each phase current. By constant current control of the control current, the secondary oscillation voltage of the output voltage is suppressed in the step response.

(The control method of the power unit)

The control method of a power supply device of the present invention is a control method of a power supply device including an LC chopper circuit, and is a control method in which a step response toward a command value is performed by polyphase interleave control in which polyphase control is performed by a plurality of phase currents.

The control method includes a control process and a switching signal generating process.

The control step is a switching signal pulse for driving the LC chopper circuit by constant current control (deadbeat control) of a predetermined period performed based on a control current including a synthesized current obtained by synthesizing the phase currents in the LC chopper circuit. Calculation of the width ΔT(k) is performed for each sampling period T.

The switching signal generating step generates a switching signal for each phase by using the calculated pulse width ΔT(k) as the pulse width ΔT(k) of each phase current. The LC chopper circuit performs a switching operation with a pulse width ΔT(k) for each cycle, whereby deadbeat control is performed toward the command value of the command voltage or command current.

In the power supply device and control method of the power supply device of the present invention, the constant current control by the control current includes the constant current control by the combined current of the inductance currents of each phase of the LC circuit, the constant current control by the capacitance current, or the synthesis of the inductance currents. It is a combination of constant current control by current and constant current control by capacitance current.

The constant current control by the combined current of the inductance current causes the output voltage to respond stepwise toward the command voltage.

The capacitance current is a current obtained by subtracting the load current from the combined current of the inductance current. The constant current control by the capacitance current causes the capacitance current to respond stepwise toward the command current.

The constant current control, which combines constant current control by the combined current of inductance current and constant current control by capacitance current, is a first step response in which the capacitance current is directed toward the command current by constant current control using the capacitance current, and the combined current of the inductance current This is the second step response in which the output voltage is directed toward the command voltage by constant current control.

(control current)

(a) common

One form of the control current of the present invention is a form in which constant current control is performed using a combined current of inductance currents of each phase of an LC circuit as a control current, and constant current control of inductance current or constant current control of capacitance current is performed based on the control current. do

In the case of three-phase interleaved control in polyphase interleave control, the pulse width ΔT(k) of each phase of the switching operation of the LC circuit is,

[Number 2]

V _in (k) is the input voltage,

v _o (k) is the output voltage,

i _L (k) is the resultant current of the inductance currents of each phase,

i _R (k) is the load current,

L is the inductance of the LC circuit,

C is the capacitance of the LC circuit,

T is the sampling period width

am.

The constant current control by the combined current i _L (k) of the inductance current performs a step response of the _{output voltage v o} (k) _{toward the command voltage V REF .}

(b)(mode 1)

One form of the control current of the present invention performs constant current control based on the capacitance current of the LC circuit.

In the case of three-phase interleaved control in polyphase interleave control, the pulse width ΔT(k) of each phase of the switching operation of the LC circuit is,

[Number 3]

V _in (k) is the input voltage,

v _o (k) is the output voltage,

i _C (k) is the capacitance current,

I _C-REF is the capacitance reference current,

L is the inductance of the LC circuit,

C is the capacitance of the LC circuit,

T is the sampling period width

am.

Capacitance constant current control by the current i _c (k) according to the type, capacitance current i _c is carried out step response toward a (k) the capacitance instruction current I _C-REF. According to this aspect, the load current i _R (k) and the inductance current i _L (k) can be eliminated from the pulse width ΔT (k).

(c)(mode 2)

One form of the control current of the present invention performs constant current control based on the capacitance current of the LC circuit.

In the case of three-phase interleaved control in polyphase interleave control, the pulse width ΔT(k) of each phase of the switching operation of the LC circuit is,

[Number 4]

V _in (k) is the input voltage,

V _c1 is the initial value of the output voltage,

I _C-REF is the capacitance reference current,

β ₂ is the coefficient of the capacitance command current,

L is the inductance of the LC circuit,

C is the capacitance of the LC circuit,

T is the sampling period width

am.

Constant current control by the capacitance current i _c (k) according to the type, to the V _c1 to an initial value of the output voltage, capacitance, current i _c is carried out step response capacitance to (k) towards the command current I _C-REF. In this constant current control, the capacitance command current is given by _{β 2} ·I _{C-REF .}

(d)(mode 3)

One form of the control current of the present invention performs constant current control based on the inductance current of the LC circuit.

In the case of three-phase interleaved control in polyphase interleave control, the pulse width ΔT(k) of each phase of the switching operation of the LC circuit is,

[Number 5]

V _in (k) is the input voltage,

V _REF is the reference voltage,

v _o (k) is the output voltage,

i _C (k) is the capacitance current,

A _v is a coefficient multiplied by the difference (V _REF -v _o (k)) between the command voltage V _REF and the output voltage v _{o (k),}

β ₃ is the coefficient of capacitance current

L is the inductance of the LC circuit,

C is the capacitance of the LC circuit,

T is the sampling period width

am.

Constant current control by the inductance current i _L (k) according to the form, a constant current control by, capacitance current i _c (k) by that for replacing the inductance current i _L (k) to the capacitance current i _c (k) is displayed According to this aspect, the pulse width ΔT(k) is calculated using the _{capacitance current i c} (k) and the output voltage v _{o (k) as the feedback signal.}

(e)(mode 3)

One form of the control current of the present invention performs constant current control based on the inductance current of the LC circuit.

In the case of three-phase interleaved control in polyphase interleave control, the pulse width ΔT(k) of each phase of the switching operation of the LC circuit is,

[Number 6]

V _in (k) is the input voltage,

V _REF is the reference voltage,

i _C (k) is the capacitance current,

β ₃ is the coefficient of capacitance current,

L is the inductance of the LC circuit,

C is the capacitance of the LC circuit,

T is 1 period width

am.

In the constant current control by the inductance current i _L (k) of this form, A _v is set to 3 T/L in the form (d). By setting this A _v , the pulse width ΔT(k) is calculated using only the _{capacitance current i c} (k) as a feedback signal without using the output voltage v _{o (k).}

(control mode)

One form of control of the power supply device of the present invention is a two-level deadbeat control by a polyphase interleaved bidirectional step-down chopper circuit that does not use PI control.

In the interleaved method, by making the constant n into polyphase, the switching frequency can be made n times the driving switching frequency, and the control response can be increased n times, and a smoothing capacitor is used with a value corresponding to the switching frequency of n times the driving switching frequency. By employing it, a significant reduction in the amount of the smoothing capacitor is expected.

In general, a detector for detecting a DC signal has a low-speed response, whereas an AC current transformer for detecting an AC signal has a high-speed response. By high-speed detection of an AC signal of a capacitance current, a high-speed response of deadbeat control is possible even when a DC signal including other AC components is detected at a relatively low speed.

Moreover, according to the aspect of this invention, overshoot and undershoot of a step response can be suppressed by performing constant current control.

Further, according to the aspect of the present invention, since the control current is a combined current of the inductance currents of each phase, it is possible to reduce the number of detection units that detect the feedback signal that is the control current.

Further, in the LC chopper circuit, class A to class E amplifiers are known as amplifiers for controlling RF power by converting a DC voltage of a previous stage into an AC voltage using an inverter. Among these amplifiers, class A to class C amplifiers control RF power by the dropper method, so that the conversion efficiency of RF power is about 30% to 50%. On the other hand, since the class D amplifier and the class E amplifier control the RF power by varying the DC voltage of the previous stage using the switching method, the RF power conversion efficiency is high efficiency of 90% to 93% at a typical high frequency of 13.56 MHz. this is obtained

Therefore, in the deadbeat control by polyphase interleaving of the power supply device of the present invention, the class D amplifier and the class E amplifier are suitable as the amplifier to which the switching control can be applied.

BRIEF DESCRIPTION OF THE DRAWINGS It is a figure for demonstrating the schematic structural example of the power supply apparatus of this invention.
Fig. 2 is a diagram showing an example of the pulse width ?T(k) in the case of a phase current in the control of the power supply device of the present invention.
3 is a view for explaining an example of inductance current control of the power supply device of the present invention.
4 is a view for explaining an example of capacitance current control of the power supply device of the present invention.
5 is a view for explaining an example of inductance current control and capacitance current control of the power supply device of the present invention.
6 is a view for explaining one form of inductance current control and capacitance current control of the power supply device of the present invention.
7 is a view for explaining one form of inductance current control and capacitance current control of the power supply device of the present invention.
8 is a view for explaining an example of inductance current control and capacitance current control of the power supply device of the present invention.
FIG. 9 is a diagram for explaining a process of correcting to a specified voltage by mode 1 to mode 3. FIG.
Fig. 10 is a diagram for explaining an example of a chopper circuit of the power supply device of the present invention.
11 is a view for explaining the LCR circuit of the power supply device of the present invention.
12 is a diagram for explaining an equivalent circuit of the LCR circuit of the power supply device of the present invention.
13 is a diagram for explaining a first-order transfer function of constant voltage control.
14 is a diagram for explaining a secondary transfer function of constant voltage control.
15 is a view for explaining a control example of an RF generator to which the power supply device of the present invention is applied.
16 is a flowchart for explaining a control example of an RF generator to which the power supply device of the present invention is applied.
17 is a flowchart for explaining an example of High/Low control of a device to which the power supply device of the present invention is applied.
18 is a view for explaining an example of control of a DC power supply device and an AC power supply device to which the power supply device of the present invention is applied.
It is a figure for demonstrating the constant voltage control which feeds back _{output voltage o.}

The power supply device and the power supply device control method of the present invention will be described with reference to Figs. Hereinafter, a schematic configuration example of the power supply device of the present invention will be described with reference to Fig. 1, and a control example of the power supply device of the present invention will be described with reference to Figs. The derivation of the pulse width ΔT(k) of the present invention will be described with reference to FIGS. 10 to 12, the followability to the command value will be described with reference to FIGS. 13 and 14, and this view using FIGS. 15 to 18 An application example of the power supply device of the present invention will be described.

(Schematic configuration of the power supply device of the present invention)

A schematic configuration of the power supply device of the present invention will be described with reference to FIG. 1 . Power supply device 1 of the present invention, an input voltage of V _in the input and output voltage v _o and the LC chopper circuit (2), LC switching element of the chopper circuit (2) for outputting a load current i _R on / The switching signal generator 5 that generates the switching signal for controlling the off operation, the LC chopper circuit 2, and the feedback signal from the load are input to calculate the pulse width ΔT(k), and the calculated pulse width ΔT(k) ) is provided with a control unit 6 for outputting the switching signal generation unit (5).

The LC chopper circuit 2 is an LC circuit 4 configured by series-parallel connection of an inductance L and a capacitance C, and an inductance current i _{L formed by switching the input voltage V in} to polyphase to the LC circuit 4 . It is constituted by the switching circuit 3 that supplies it.

The control unit 6 calculates the pulse width ΔT(k) of the switching signal that controls the on/off operation of the switching element of the switching circuit 3 . The pulse width ΔT(k) determines the time width of the on state of the switching element within one cycle of switching, and the power supplied to the load via the LC circuit 4 according to the length of the pulse width ΔT(k) to control For example, when the time width of the switching period is set to T, the pulse width ΔT(k) with respect to the time width T is expressed as a duty ratio.

The control unit 6 calculates the pulse width ΔT(k) for each sampling period so that the output of the sampling period (k+1)th becomes equal to the target value, and controls the switching operation according to the obtained pulse width ΔT(k). Deadbeat control is performed. In the deadbeat control, the control unit 6 performs constant current control at a predetermined cycle based on the control current including the synthesized current obtained by combining the phase currents in the LC chopper circuit 2, and performs switching of the LC chopper circuit 2 Calculation of the pulse width ΔT(k) of the switching signal for driving the switching element (not shown) of the circuit 3 is performed for each sampling period T.

The control unit 6 sets the pulse width ΔT(k) calculated by constant current control of the control current including the synthesized current as the pulse width ΔT(k) of each phase current. By constant current control of the control current, the secondary oscillation voltage of the output voltage is suppressed in the step response.

The switching signal generating unit 5 of the present invention generates a switching signal for each phase by setting the pulse width ΔT(k) calculated by the control unit 6 as the pulse width ΔT(k) of each phase current. In the calculation of the pulse width ΔT(k), the pulse width ΔT(k) is calculated based on the control current including the synthesized current obtained by synthesizing the phase currents. In this calculation, since the control current is based on the combined current of the phase currents, the limitation due to the overlap of the pulse width ΔT(k) of each phase can be eliminated, and the pulse width allowing the pulse width ΔT of each phase to overlap each other ΔT(k) can be found.

Fig. 2 shows an example of the pulse width ?T(k) in the case of a three-phase phase current. FIG. 2A shows an example in which the pulse width ΔT(k) overlaps the pulse width ΔT(k) of three phase currents among the three phase currents with respect to the time width T of one period of switching. FIG. 2B shows an example in which the pulse width ΔT(k) overlaps the pulse width ΔT(k) of two phase currents among the three phase currents with respect to the time width T of one period of switching. FIG. 2C shows an example in which there is no overlap in the pulse width ΔT(k) of the phase currents with respect to the three-phase phase currents.

When switching the switching circuit 3 by n-phase polyphase interleaving, inductance currents i _{L1 to i Ln} flow through the n inductances L (L1 to Ln) in the LC chopper circuit 2, respectively. Control unit 6, and inputs the current thereof inductance current i _L1 ~i _Ln synthetic current i _L by synthesizing the respective phase current as control current.

_{As the control current, in addition to the combined current i L} obtained by combining the inductance currents of the respective phase currents, a capacitance current i _c obtained by subtracting the load current i _R from the combined current i _L may be used.

(constant current control)

The constant current control by the control unit 6 has a plurality of control forms. As the control form, there are a control form of inductance current control, a control form of capacitance current control, and a control form in which inductance current control and capacitance current control are combined.

Hereinafter, a plurality of control modes of constant current control and pulse width ΔT(k) in each control mode will be described with reference to FIGS. 3 to 8 .

(Control type and pulse width ΔT(k) of constant current control)

In the LCR circuit constructed by connecting the load 7 to the LC chopper circuit 2 of FIG. 1, the inductance current i _{L of the inductance L in the LC chopper circuit or the capacitance current i c} of the capacitance C is used as the control current. Constant current control is performed. The inductance current i _L (t), the capacitance current i _c (t), and the output voltage v _o (t) are respectively expressed by the following formula (2).

[Number 7]

In the multi-phase interleaved, the formula (2) of the inductor current i _L (t) is, LC chopper circuit inductance L n of each phase current of the inductance (L1~Ln) i _L1 ~i _Ln synthesized current synthesized containing the am. There is a relationship between the inductance current i _L (t) and the capacitance current i _{c : i L} (t) = i _c (t) + i _R (t). Also, i _R (t) is the load current of the load R.

In the polyphase interleave control, in the three-phase interleave control as an example, the pulse width ΔT(k) when the constant current control is performed using the above-described inductance current and capacitance current as control currents is expressed by the following equation (3).

[Number 8]

In addition, V _in (k) is the input voltage, v _o (k) is the output voltage, i _L (k) is the combined current of the inductance current of each phase, i _R (k) is the load current, L is the inductance of the LC circuit, C is the capacitance of the LC circuit, and T is the sampling period.

The constant current control can be a constant current control of the inductance current using the inductance current as the control current, or constant current control of the capacitance current using the capacitance current as the control current.

Hereinafter, each control form of the constant current control of the inductance current, the control form of the constant current control of the capacitance current, and the control form of the combination of the constant current control of the inductance current and the constant current control of the capacitance current will be described. Here, in the polyphase interleave control, the three-phase interleave control will be described as an example.

(Control form of constant current control of inductance current)

Fig. 3 is a diagram for explaining the outline of the control mode of the inductance current control by the control unit, Figs. 3A and 3B show the schematic configuration of the control mode, Fig. 3C _{shows an example of the command voltage V REF} , and Fig. 3D shows an example of the output voltage v _{o .}

Fig. 3 shows two configuration examples for constant current control of inductance current, taking three-phase interleave control as an example. In the constant current control of the inductance current, current control is performed so that the difference between the inductance current and the rated current value or a value obtained by multiplying the rated current value by a predetermined coefficient becomes zero.

In the configuration of Fig. 3A, in the control form of the constant current control of the inductance current in the three-phase interleave control, the pulse width ΔT(k) expressed by the following equation (4) is used, and the feedback capacitance current i _c (k) is used. ) and the output voltage v _o (k), the step response is controlled so that the _{output voltage v o} (k) becomes the command voltage V _{REF .}

[Number 9]

In the configuration of Fig. 3B, in the control form of the constant current control of the inductance current in the three-phase interleave control, the pulse width ΔT(k) expressed by the following equation (5) is used, and the feedback capacitance current i _c (k ) to control the step response so that the output voltage v _o (k) becomes the command voltage V _{REF .} In addition, in this configuration, _{by setting the coefficient A v} to A _v = 3T/L, _{feedback of the output voltage v o} (k) is made unnecessary, and _{only the capacitance current i c} (k) is detected and fed back. The pulse width ΔT(k) can be determined.

[Number 10]

_{The command voltage V REF} shown in FIG. 3C shows an example of the command voltage _{of two levels of V H at the high level and V L} at the low level in the two-level control of H/L, _{and the output voltage v o} shown in FIG. 3D . shows an example of a two-level step response.

Note that the voltage waveforms shown in Figs. 3C and 3D are schematically shown for explanation, and do not represent actual voltage waveforms.

(Control form of constant current control of capacitance current)

Fig. 4 is a diagram for explaining the outline of the capacitance current control by the control unit taking the three-phase interleave control as an example, Fig. 4A shows the schematic configuration, and Fig. 4B is an example _{of the capacitance current command current I C-REF} , and FIG. 4C shows the capacitance current i _c .

In the configuration of Fig. 4A, in the control form of the constant current control of the capacitance current in the three-phase interleave control, the pulse width ΔT(k) expressed by the following equation (6) is used, and the feedback capacitance current i _c (k) is used. ) and the output voltage v _o (k), the step response is controlled so as to become the _{capacitance command current I C-REF.}

[Wed 11]

And also in the two-level control of the reference current I _{REF is-C,} H / L capacitance current shown in 4b, I _C-REFH corresponding to the V _H High level, I _C- corresponding to the Low level of the V _{L The example of the command current of two levels of REFL is shown, and the capacitance current i c} shown in FIG. 4C has shown the example of a two-level step response.

Note that the voltage waveforms shown in Figs. 4B and 4C are schematically shown for explanation, and do not represent actual voltage waveforms.

(Control type combining constant current control of inductance current and constant current control of capacitance current)

The constant current control of the present invention is applicable to constant current control in multiple stages of constant current control of capacitance current and subsequent constant current control of inductance current, in addition to the above-described control mode of constant current control of inductance current and constant current control of capacitance current. A control form for controlling the step response is provided.

In this multi-step control mode, in addition to the first control mode in which constant current control of the inductance current is performed after constant current control of the capacitance current, the second control mode in which constant current control of the capacitance current is performed in two steps, followed by constant current control of the inductance current to provide

5 to 7 are diagrams for explaining the control mode of the combination of constant current control of inductance current and constant current control of capacitance current. FIG. 5A shows the outline of the control unit, and FIG. 5B shows the command voltage V _REF .

In the control form of the combination of constant current control of capacitance current and constant current control of inductance current, Figs. 6A and 6B show the command current I _C-REF and the output voltage _o in the first control form, and Figs. 7A and Fig. _{7b is the second control mode, the command current I C-REF} and the output voltage when constant current control of capacitance current is performed in two stages of mode 1 and mode 2, and then constant current control of inductance current is performed in mode 3, respectively _o is shown.

(first control mode)

In the control mode of the combination of constant current control of capacitance current and constant current control of inductance current, in the first control mode, constant current control of the capacitance current in the first stage is performed, and the output voltage v _o reaches the switching voltage V _c . , switches to constant current control of the inductance current of the second stage, and performs constant current control toward the _{command voltage V REF .}

In the constant current control of the capacitance current in the first stage, the pulse width ΔT(k) by the constant current control of the capacitance current is used, and in the constant current control of the inductance current in the second stage, the pulse width by the constant current control of the inductance current ΔT(k) is used.

If the constant current control of the inductance current is performed over the entire section of the step response, it is assumed that an excessive current is generated. To avoid this overcurrent, a constant current control of the capacitance current is combined.

The control form in which the constant current control of the capacitance current and the constant current control of the inductance current are performed in combination avoids the generation of the excessive current assumed in the constant current control of the inductance current. By performing constant current control of the capacitance current in the first stage, the occurrence of excessive current is suppressed, and after the possibility of occurrence of excessive current is eliminated, the second stage switches from constant current control of capacitance current to constant current control of inductance current, The output voltage v _o is controlled toward the target value of the control command voltage V _{REF .}

When switching the constant current control of the capacitance current in the first stage to the constant current control of the inductance current in the second stage, the switching voltage V _c is the target output voltage by the current energy held in the inductance in the constant current control of the capacitance current. It is the voltage for switching so that it does not pass the value.

The control mode shown in Fig. 6 shows a mode in which inductance current control is performed following capacitance current control. In the voltage waveform shown in Fig. 6B, voltage V1 indicated by a thin solid line represents a step response when the entire section is controlled by constant current control of inductance current, and voltage indicated by dark solid lines is constant current control of capacitance current and constant current of inductance current. A step response of a control type combining control is shown, and includes a voltage V2 when controlling a capacitance current and a voltage V3 when controlling an inductance current.

In the capacitance current control, _{based on the command current I C-REF} shown in Fig. 6A, constant current control is performed to set _{the output voltage o} toward a target value while suppressing the generation of excessive current, so that the output voltage _{o o} does not exceed the target value. When the set switching voltage V _c is reached, it switches to constant current control of the inductance current. The voltage during capacitance current control is indicated by voltage V2. After that, the inductance current is controlled to the command voltage V _REF by constant current control. The voltage during inductance current control is indicated by the voltage V3.

(Second control mode)

In the control mode of the combination of constant current control of capacitance current and constant current control of inductance current, in the second control mode, constant current control of capacitance current is performed in two stages, and then constant current control of inductance current is performed.

The control mode shown in Fig. 7 shows a mode by two steps in which constant current control of inductance current is performed following constant current control of capacitance current control. Fig. 7A shows the command current I _C-REF in constant current control of the capacitance current, and Fig. 7B shows the voltage waveform of the _{output voltage v o .} In the voltage waveform shown in Fig. 7B, a voltage V1 indicated by a thin solid line represents a step response when constant current control of the inductance current is performed over the entire section. The voltage indicated by the solid solid line is the voltage V2a during constant current control of the capacitance current in the first stage, the voltage V2a in the constant current control of the capacitance current in the second stage, in a mode in which constant current control of capacitance current and constant current control of inductance current are combined. Step responses by V2b and voltage V3b during inductance current control are shown. In addition, in Fig. 7B, the voltage V1 and the voltage V3b are shown in a substantially overlapping state during constant current control of the inductance current.

In the constant current control of the capacitance current in the first stage _{, based on the command current I C-REF} shown in Fig. 7A, constant current control is performed to set _{the output voltage v o} toward the target value while suppressing the generation of the excessive current _{, and the output voltage v o When it reaches the switching voltage V c1} set so that it does not pass the target value, it switches to constant current control of the capacitance current of the second stage. The voltage for constant current control of the capacitance current in the first stage is indicated by voltage V2a, and the voltage for constant current control of the capacitance current in the second stage is indicated by voltage V2b.

In the constant current control of the capacitance current of the second stage, when the output voltage v _o reaches the switching voltage V _c2 , it switches to the constant current control of the inductance current. The voltage at the time of constant current control of the capacitance current in the second stage is represented by a voltage V2b.

After that, the inductance current is controlled to the command voltage V _REF by constant current control. The voltage at the time of constant current control of the inductance current is indicated by the voltage V3b.

The constant current control of the capacitance current in the second stage is a constant current control that connects between the constant current control of the capacitance current in the first stage and the constant current control of the inductance current. The voltage at which constant current control of inductance current is started by switching from constant current control of current is made to match the voltage obtained when only constant current control of inductance current is performed for the entire period without temporarily performing capacitance current control. _{Therefore, the switching voltage V c2} from the constant current control of the capacitance current in the second stage to the constant current control of the inductance current corresponds to the voltage at the time of switching the voltage obtained only by the constant current control of the inductance current.

The constant current control of the capacitance current of the first stage, the constant current control of the capacitance current of the second stage, and the constant current control of the inductance current described above are the constant current control of the capacitance current of mode 1 and mode 2, and the constant current control of the mode 3 described later. It corresponds to constant current control of inductance current. Note that the waveforms of the command current and voltage shown in Figs. 6 and 7 are schematically shown for explanation, and do not represent actual waveforms.

Table 1 shows the relationship between the command signal and input signal for constant current control of inductance current and constant current control of capacitance current.

Next, the control form of the constant current control performed by each mode of mode 1, mode 2, and mode 3 in one step response will be described. 8 is a view for explaining each control form of mode 1, mode 2, and mode 3; Fig. 8a shows the control form of mode 1, Fig. 8b shows the control form of mode 2, and Fig. 8c shows the control form of mode 3; Hereinafter, the three-phase interleave control will be described as an example of the polyphase interleaved control.

In this constant current control, a step response is performed by constant current control of the capacitance current in two stages of mode 1 and mode 2 and multi-stage constant current control by constant current control of the inductance current in mode 3 performed thereafter.

mode 1:

The constant current control in mode 1 is the first stage of the constant current control of the capacitance current performed in two stages. In the constant current control of this mode 1, it is a mode in which the output voltage does not pass the target value by the current energy retained in the inductance. In mode 1 of the first stage, the voltage V _c1 for switching to mode 2 of the next second stage is set in advance, and when the output voltage v _o reaches the switching voltage V _c1 , mode 1 is terminated, and mode 2 is carry out

The pulse width ΔT(k) of mode 1 of 3-phase interleaved control is,

[Number 12]

is displayed as

FIG. 8A is a diagram for explaining a control form of constant current control of capacitance current in mode 1. FIG. The control unit also input the input voltage V _in at the same time, capacitance, current i _c (k) and the output voltage v _o to the feedback (k) and, toward the _C-command current I _REF of current capacitance performs the constant current control.

mode 2:

The constant current control in mode 2 is the second stage of the constant current control of the capacitance current performed in two stages. In this constant current control in mode 2, the output voltage _o reached by constant current control of the capacitance current in mode 1 is transferred to the initial voltage when constant current control of the inductance current in mode 3 is started (Transfer mode) am.

The constant current control of the capacitance current has a function of suppressing an excessive current, but does not have a function of directing the output voltage to a target value, so it is necessary to control so that the output voltage does not pass the target value. After constant current control of capacitance current, when switching to constant current control of inductance current and controlling the output voltage not to pass the target value, the output voltage _o at the time of switching is constant current control for the entire section of the step response with inductance current It becomes a voltage _{different from the output voltage v o} in one case, and a gap arises.

As described above, in the control mode for switching to constant current control of inductance current after constant current control of capacitance current, the output when constant current control is performed with inductance current for all sections of the voltage and step response when switching to constant current control of inductance current Since there is a gap between them, the constant current control of the inductance current after switching starts control from a voltage different from the output voltage in the case of constant current control of the entire section with the inductance current.

The aspect in which constant current control of the capacitance current is performed in two stages of mode 1 and mode 2 eliminates the difference in voltage at the time of switching described above. In this control form, constant current control of capacitance current is performed in two stages, mode 1 and mode 2, the deviation of output voltage generated by constant current control in mode 1 is eliminated in mode 2, and constant current control of inductance current in mode 3 is started. The voltage value at this time is matched with the output voltage when constant current control is performed with an inductance current for the entire section of the step response. This makes it possible to start the output voltage starting in the constant current control of the inductance current in mode 3 from the output voltage in the case where the entire section of the step response is temporarily controlled by the inductance current constant current.

Therefore, the section of mode 2 is a transition section in which the final value of mode 2 is adjusted to be the predetermined value of mode 3, the initial value of mode 2 is the final value of mode 1 V _c1 , and the final value of mode 2 is mode 3 Constant current control is performed so that the required initial value V _{c2 is obtained.}

The pulse width ΔT(k) of mode 2 of 3-phase interleaved control is,

[Number 13]

is displayed as

8B is a diagram for explaining a control mode of constant current control of capacitance current in mode 2; The control unit performs constant current control toward the command current β ₂ ·I _{C-REF of the capacitance current.} β ₂ is a coefficient for setting the command current in mode 2 .

mode 3:

In mode 3, the output voltage v _o is controlled not to pass the target value by constant current control of the inductance current. In the case of high/low two-level control, constant current control is performed so that the _{respective target values V H} and V _{L do not pass.}

The pulse width ΔT(k) of mode 3 of 3-phase interleaved control is,

[Number 14]

, and when A _v =3T/L is set,

[Wed 15]

is displayed as

8C is a diagram for explaining a control form of constant current control of inductance current in mode 3; The control unit feeds back the capacitance current i _c (k) and the output voltage v _o (k) or feeds back the capacitance current i _c (k) to perform constant current control of the _{output voltage toward the command voltage V REF .} β ₃ is a coefficient set in order to stably follow the output voltage to the command voltage V _{REF .}

Table 2 below shows the signal relationship in each constant current control in mode 1 to mode 3.

(Correction with command voltage)

Next, the correction process to the command voltage by the process of mode 1 to mode 3 described above will be described with reference to the flowchart of Fig. 9 . In the flowchart of FIG. 9, each process is shown by attaching|subjecting the code|symbol P1-P14.

Initially, it sets the reference voltage V _REF, the command current I _C-REF, the rated output current I _{R -rat,} constant coefficient α _H, α _L. In the case of high/low two-level pulse power control, the high-level command voltage is V _H and the low-level command voltage is V _L . In addition, α _H is the constant current coefficient of the high level of the high/low two-level pulse power control, and α _L is the constant current coefficient of the low level of the high/low two-level pulse power control (P1).

_{The switching voltage V c1} from mode 1 to mode 2 _{and the switching voltage V c2} from mode 2 to mode 3 are calculated. Calculation of the voltages of the switch voltages V _c1 and V _c2 is performed using Formula (34) and Formula (39) which are demonstrated later (P2).

(Steps in mode 1: P3 to P6)

First, constant current control of the capacitance current is performed by the process of mode 1.

i _C (k) and v _o (k) are detected (P3), and the pulse width ΔT (k) of mode 1 is calculated. Calculation of the pulse width ΔT(k) in mode 1 is performed using Equation (7) (Equation (24)). In addition, Equation (24) described later is the same calculation expression as Equation (7) (P4). Based on the pulse width ΔT(k) calculated in P4, the switching operation of the LC chopper circuit is controlled to perform constant current control of the capacitance current, and the output voltage v _o (k) is detected (P5).

It is determined whether the detected output voltage v _o (k) has _{reached|attained the switching voltage V c1 computed by P2 (P6).} If the output voltage _o (k) has _{not reached the switching voltage V c1} , the steps P3 to P5 are repeated. When the output voltage _o (k) reaches the switching voltage V _c1 , the next mode Step 2 is followed.

(Steps in mode 2: P7 to P10)

The constant current control of the capacitance current is performed by the process of mode 2.

i _C (k) and v _o (k) are detected (P7), and the pulse width ΔT (k) of mode 2 is calculated. Calculation of the pulse width ΔT(k) in mode 2 is performed using Equation (8) (Equation (25)). In addition, Equation (25) described later is the same calculation expression as Equation (8) (P8). Based on the pulse width ΔT(k) calculated in P8, the switching operation of the LC chopper circuit is controlled to perform constant current control of the capacitance current, and the output voltage v _o (k) is detected (P9).

It is determined whether the detected output voltage v _o (k) has _{reached|attained the switching voltage V c2 computed by P2 (P10).} If the output voltage _o (k) has _{not reached the switching voltage V c2} , the steps P7 to P9 are repeated. When the output voltage _o (k) reaches the switching voltage V _c2 , the next mode Step 3 is carried out.

(Steps in mode 3: P11 to P14)

Constant current control of inductance current is performed by the process of mode 3.

i _C (k) and v _o (k) are detected (P11), and the pulse width ΔT (k) of mode 3 is calculated. Calculation of the pulse width ΔT(k) in mode 3 is performed using Equation (9) (Equation (26), Equation (28)). In addition, Equation (26) described later is the same calculation expression as Equation (9) (P12). Based on the pulse width ΔT(k) calculated in P12, the switching operation of the LC chopper circuit is controlled to perform constant current control of the inductance current, and the output voltage v _o (k) is detected (P13).

It is determined whether or not the detected output voltage v _o (k) has _{reached the command voltage V REF set in P1 (P14).} If the output voltage _o (k) has _{not reached the command voltage V REF} , the steps P11 to P13 are repeated. When the output voltage _o (k) reaches the command voltage V _REF , the command voltage V The correction to _{REF is finished.} When the next command voltage V _REF is set, the above steps P1 to P14 are repeated to correct _{the output voltage v o} to the command voltage V _{REF .}

(derivation of pulse width ΔT(k) (derived 1 to 9))

The structural example of the LC chopper circuit shown in FIG. 10 is an example of the bidirectional step-down chopper circuit by a polyphase interleaving method. This step-down chopper circuit replaces the current diodes of diodes D1 to D3 used in general step-down chopper circuits with a control element so that high-speed control from full load to no load is possible, and the excess energy of the output is transferred to the input side. is reviving in

Here, three-phase interleaving is indicated as polyphase interleaving. Three switching circuits constituting a three-phase interleave are provided, and each of the switching elements Q1 to Q3 and diodes D1 to D3 is provided. In each phase of the three-phase interleave, the inductance L of the LC circuit 4 corresponds to the respective inductance L of the three switching circuits, and the inductance currents i _{L1 to i L3} of each inductance L are the respective phase currents of the interleave. In the multi-phase interleaved, LC circuit 4 having a capacitance C 1 and the capacitance C, subtracting the load current from the inductance current i _R i _L1 ~i synthesis current (i _L1 i + _L2 + _L3 i) of _L3 current flows

Hereinafter, the derivation of the pulse width ΔT(k) will be described. In the derivation of the pulse width ΔT(k), the shearing step will be described first. In the previous step, in the constant current control (derivation step 1) in which the synthesized current of polyphase interleave is fed back as the control current, the polyphase interleaved bidirectional step-down chopper circuit and the state equation of the pulse width ΔT(k) are obtained (derived step) 2, 3), the function expression (derivation step 4) of the pulse width ΔT(k) is obtained based on this state equation.

Next, derivation of the pulse width ΔT(k) of the constant current control of the inductance current (derivation step 5), and the constant current of the capacitance current using the relational expression of the pulse width ΔT(k) obtained with respect to the control current in the preceding step The derivation of the pulse width ΔT(k) of the control (derivation step 6) will be described.

After that, in the control form in which the step response is performed by the constant current control of the capacitance current in two stages of mode 1 and mode 2, and the constant current control of the inductance current in mode 3 performed thereafter in multi-stage constant current control, each mode 1, The derivation process (derivation process 7 - derivation process 9) which derive|leads-out the pulse width ΔT(k) of mode 2 and mode 3 is demonstrated.

・Deduction process 1:

The equations for the control current and output voltage of the constant current control that feed back the resultant current as the control current are derived. Fig. 11 is an equivalent circuit of the circuit of Fig. 10, and shows an equivalent circuit of a time band sufficiently longer than the switching frequency in the region of the closed-loop automatic control response.

In the equivalent circuit of FIG. 11 , the combined currents (i _L1 +i _L2 +i _L3 =i _{L ) of the phase currents i L1} , i _L2 , and i _L3 of each phase are denoted as current sources, and each of the three switching circuits is The combined inductance of the inductance L is expressed as (L/3). In this equivalent circuit, the step response of the output voltage v _{o by the input current (i L ) input from the current source is}

[Number 16]

is displayed as

Equation (11) has shown that _{the step response of the output voltage v o} increases exponentially toward _{(R·i L} ) without causing a secondary oscillation voltage.

_{If the time function i L} (t) of the combined current of the inductance current i _L is defined by the following equation (12),

[Wed 17]

becomes

The combined current i _L (t), the capacitance current i _c (t), and the output voltage v _o (t) are respectively expressed by the following formula (13).

[Wed 18]

Expression output voltage represented by (13) v _o (t), the expression the output voltage represented by (11) v _o and then the load resistance R is removed and, given sufficient time, from (t) (t → ∞) of The final value has shown convergence to the _{command voltage VREF.}

Therefore, the step response can be controlled without generating a secondary oscillation voltage by performing constant current control using the combined current of the _{inductance current i L} (t) expressed by Equation (12) as the control current.

In addition, in the output voltage v _o (t) _{expressed by Equation (13), A v} is a coefficient multiplied by the difference value (V _REF -v _o (t)) between the output voltage v _o (t) and the command voltage V _REF , β is a coefficient multiplied by the _{capacitance current i c} (t), and determines the tracking characteristic for the _{command voltage V REF .}

For example, the _{closer the coefficient A v} is to "1", the more _{strongly the magnitude of the difference value (V REF} -v _o (t)) is reflected. _A step response with a high degree of followability to REF is obtained.

・Derivation process 2:

Next, the equation of state of the three-phase interleaved bidirectional step-down chopper circuit is derived. 12 shows an equivalent circuit in one of the three phases. The formula (12) synthesized current (i _L) to, in order to convert the form applied to the constant current control, i _L1, synthesized current i _L2, and i _L3 shown in Fig. 10 i _L (= i represented by _L1 + i _L2 +i _L3 ) is obtained, and a relational expression with the pulse width ΔT is derived.

By the ON/OFF operation of Q1/D1 to Q3/D3 of each phase in FIG. 10 , _{voltage V in} or 0 is applied to _{u 1} (τ), u ₂ (τ), and u ₃ (τ). Expressed using the principle of superposition, u ₁ (τ) is represented by the equivalent circuit of FIG. 12 . In Fig. 12, u ₁ (τ) becomes V _in when Q1 is on and D1 is off, and u ₁ (τ) becomes 0 when Q1 is off and D1 is on. .

In the equation of state for Fig. 10, the general solution of the equation of state by u(τ) divided for each section in which u(t) is constant is expressed by the following equation (14), respectively.

[Wed 19]

The resultant current i(t) is obtained by multiplying the general solution x(t) by a transformation matrix F corresponding to the circuit configuration of Fig. 10 from the left.

[Number 20]

only,

[Wed 21]

am.

^{GFe AT} is derived using the transformation matrix G to obtain i _L (t) = i _L1 (t) + i _L2 (t) + i _{L3 (t) from i(t).} In addition, FB and FAB are converted as shown in the following formula.

[Wed 22]

・Deduction process 3:

Next, the state equation of the pulse width ?T(k) is derived.

In the section T of one cycle shown in Fig. 2A, the relational expression of the pulse width ?T(k) is obtained. With respect to Equation (15), when i(T) is derived using Equations (16) and (17), a state equation expressed by Equation (18) below is obtained. Although not described, i(T) in the section T of one cycle in Figs. 2B and 2C is also the same as in equation (18).

[Wed 23]

・Derivation process 4:

Next, a function expression of the pulse width ?T(k) is derived.

Transforming the state equation of the pulse width ΔT(k) in Equation (18) using Equation (17),

[Wed 24]

is obtained

When the load current i _R (k) is i _R (k) = v _o (k)/R, and R is removed from the formula (19), the following formula (20) is obtained.

[Number 25]

If the pulse width ΔT(k) is obtained from the above equation (20),

[Wed 26]

this is obtained

The pulse width ΔT(k) expressed by the formula (21) represents the pulse width ΔT(k) in the constant current control of the control current of the inductance current. Hereinafter, derivation of the pulse width ΔT(k) of the inductance current control (derivation step 5) and the derivation of the pulse width ΔT(k) of the capacitance current control (derivation step 6) are shown based on Equation (21).

・Derivation step 5:

Next, the pulse width ?T(k) of the constant current control of the inductance current is derived.

In the pulse width ΔT(k) shown in equation (21), _{by using a function expression obtained by converting the inductance current i L} shown in equation (12) into _{discrete time format as i L} (k+1), the constant current of the inductance current is used. A pulse width ΔT(k) by control is obtained. _{Here, β shown in Equation (12) is β=β 3} in accordance with the constant current control of the inductance current in mode 3 .

[Wed. 27]

In addition, the above-described pulse width ΔT(k) is expressed using the capacitance current i _c (k) and the output voltage v _{o (k) instead of the inductance current i L (k) in the constant current control of the inductance current. By displaying the capacitance current i c} (k) instead of the inductance current i _L (k), constant current control of the inductance current and constant current control of the capacitance current can be performed by feeding back the _{common capacitance current i c (k).} can be

· Derivation process 6:

Next, the pulse width ?T(k) of the constant current control of the capacitance current is derived.

In the constant current control of the capacitance current, i _L (k+1) = I _C-REF +i _R (k) is defined with the _{command current as I C-REF .}

In the pulse width ΔT(k) of the formula (21), by using i _L (k+1) = I _C-REF + i _R (k), the pulse width ΔT(k) of the constant current control of the capacitance current is It is represented by the following formula (23).

[Wed 28]

According to the pulse width ΔT(k) described above, since the elements of the load current i _R (k) and the inductance current i _L (k) are eliminated, the load current i _R (k) and the inductance current i _L (k) are Without feedback, the pulse width ΔT(k) can be obtained by feeding back the capacitance current i _c (k) and the output voltage v _{o (k).}

Next, derivation of the pulse width ΔT(k) of mode 1 and moed2 in constant current control of capacitance current, and pulse width ΔT(k) of mode 3 of constant current control of inductance current (derivation steps 7 to 9) Explain.

・Derivation process 7:

The derivation of the pulse width ΔT(k) of the constant current control of the capacitance current in mode 1 will be described.

In mode 1, constant current control of the first stage of the capacitance current is executed. _{I C-REF} is the command current in the first stage constant current control, _{and i L} (k+1) = I _C-REF + i _R (k) is defined as the inductance current i _L (k+1). . By using the pulse width ΔT(k) in the constant current control of the control current expressed by the equation (21), the pulse width ΔT(k) in mode 1 is obtained by the following equation (24).

[Wed 29]

_{Since the elements of the load current i R} (k) and the inductance current i _L (k) are removed from the function expression of the pulse width ΔT(k) that determines the mode 1 control _{, the load current i R} (k) and the inductance current i _{The feedback of L} (k) becomes unnecessary.

In the constant current control of the capacitance current of mode 1, in order to in the period of the mode 1 output voltage v _o (k) is away from traffic over a direct current reference voltage V _REF, the output voltage v _o (k) reaches V _c1 At one point in time, the constant current control of the capacitance current of mode 1 of the first stage is terminated, and the constant current control of the capacitance current of mode 2 of the second stage is switched. In addition, V _c1 is an output voltage at the time of switching from mode 1 to mode 2. In the two-level deadbeat control, a high DC command voltage V _H and a low DC command voltage V _L are determined as the DC command voltage.

・Deduction process 8：

Next, the derivation of the pulse width ΔT(k) of the constant current control of the capacitance current in mode 2 will be described.

Pulse width ΔT(k) in mode 2 is _o (k)=V _c1 and i _L (k+1)=β ₂ I _C-REF +i _R (k), and the pulse width ΔT(k) is By substituting into the general formula (21), it is obtained by the following formula (25).

[Number 30]

Equation (25) is expressed by eliminating the elements of the _{load current i R} (k) and the inductance current i _L (k) in the function expression of ΔT(k) that determines the mode 2 control.

In the period of mode 2, in order to make constant current control a high-speed response, in one period of the output voltage v _o (k) to v _o (k+1), the initial value V _c1 to the final value V _c2 is reached. By selecting β ₂ , mode 2 can be terminated in 1 sampling time.

・Deduction process 9:

Next, the derivation of the pulse width ΔT(k) of the constant current control of the inductance current in mode 3 will be described.

The pulse width ΔT(k) of the constant current control of the inductance current in mode 3 is the same as the pulse width ΔT(k) of the constant current control of the inductance current shown in (derivation step 5), and is expressed by the following equation (26).

[Wed 31]

In general, an AC current transformer that detects an AC signal has a high-speed response, whereas a general-purpose detector that detects a DC signal has a relatively low-speed response.

The pulse width ΔT(k) expressed by the above formula detects the capacitance current i _c (k) and the output voltage v _o (k), and sets it as a feedback signal. The capacitance current i _c (k) can have a high-speed response by the AC current transformer, but _{the response of the detector detecting the output voltage v o} (k) is relatively low-speed. In order to speed up the step response, it is necessary to obtain a feedback signal at a high speed, and for this purpose, it is preferable that the detection of the detector is high speed.

Therefore, the control for speeding up the response is shown by omitting the detection of the output voltage v _o (k) of the low-speed response and detecting only the AC signal of the capacitance current at high speed.

In the pulse width ΔT(k) expressed by the above equation (26), _{the influence of the output voltage v o} (k) is eliminated _{by setting A v} to the relation of the following equation (27).

A _ｖ = 3T/L … (27)

In addition, T is a sampling period, and L is the inductance of the LC circuit shown in FIG.

By setting A _v so that it becomes the relationship of the above formula (27) by the sampling period T and the inductance L of the LC circuit, the pulse width ΔT(k) is less than the _{output voltage v o (k)} It is expressed by Equation (28) of

[Number 32]

The pulse width ΔT(k) expressed by Equation (28) includes only the _{capacitance current i c (k) as a feedback signal.} Since the AC current transformer for detecting the capacitance current i _c (k) can have a high-speed response, the pulse width ΔT(k) can be obtained with a high-speed response.

_{Therefore, the factors of output voltage o} (k), load current i _R (k), and inductance current i _L (k) can be eliminated from the function expression of pulse width ΔT(k) that determines constant current control of inductance current in mode 3 . In addition, β ₃ is selected such that a control response following the DC command voltage V _REF is obtained in constant current control of the inductance current i _{L (t).}

(derivation of switching voltages V _c1 , V _{c2 )}

Hereinafter, derivation|leading- _{out of switch voltage V c1 at the} time of switching from mode 1 to mode 2 _{and switching voltage V c2 at} the time of switching from mode 2 to mode 3 is demonstrated.

・derivation of switching voltage V _c1

Here, in the two-level deadbeat control, a high DC command voltage V _H and a low DC command voltage V _L are determined _{as the DC command voltage V REF .}

The derivation of each switching voltage V _{c1 in} the case where the target voltage of the step response is the high level command voltage V _H and the low level command voltage V _L will be described.

(derivation _{of V c1} in mode 1 during high-level pulse control)

If the initial value of the High level to the target voltage V _H, the rated output current I _{R -rat,} constant coefficient α _H, the output voltage of the v _o (0), reference voltage V _REF = V _H, the command current capacitance Current I _C-REF =α _H ·I _{R -rat} , the initial value of the output voltage v _o (0) = V _L .

Since the constant current control of the capacitance current in mode 1 is the current control for charging the capacitor with constant current, the output voltages v _o (1) to _{v o} (n) at each time point are expressed by the following formula (29). Here, the number of sampling is 1,2,… k,… n,… is doing with

[Number 33]

provided that k and n are positive integers.

The switching voltage V _c1 is a voltage for terminating mode 12 by preventing the _{output voltage v o} (k) from _{passing beyond the command voltage V REF} (= V _H ) within the period of constant current control of the capacitance current of mode 1 . When the output voltage v _o (k) reaches the switching voltage V _c1 , the constant current control of the capacitance current of mode 1 of the first stage is terminated, and the next stage is switched to the constant current control of the capacitance current of mode 2 of the second stage. do

In order not to overshoot the output voltage v _o (n) beyond the high-level command voltage V _H , in the equivalent circuit shown in Fig. 11, from the relationship between the energy stored in the capacitor and the input/output energy, the following equation ( 30) needs to be satisfied.

[Number 34]

If this relational expression (30) is rewritten using equation (29), an expression related to the number of sampling times n that does not overshoot the _{output voltage v o} (n) beyond the high-level command voltage V _{H is obtained.}

[Number 35]

Here, N represents the value of the integer part of n. Therefore, when the sampling frequency is N or less, the output voltage _o (N) does not overshoot beyond the high-level command voltage V _H.

Assuming that the transition voltage for transitioning from mode 1 to mode 2 is V _{trans , the output voltage v o} (n) expressed by Equation (29) is Satisfy the relationship In addition, V _{L is the initial voltage o} (0) of the output voltage in High/Low control.

[Number 36]

_{Here, when the transition voltage V trans} is selected using the average value of the upper and lower values of the above relational expression (32), it is expressed by the following expression (33).

[Number 37]

When the output voltage v _{o becomes V c1} equal to or greater than _{the transition voltage V trans} that satisfies Equation (33), mode 2 is shifted. _{Therefore, the switching voltage V c1} in mode 1 at the time of the pulse control of a high level is represented by the following formula|equation (34).

[Wed 38]

(derivation _{of V c1} in mode 1 during low pulse control)

_{Next, the derivation of V c1} in mode 1 at the time of low pulse control will be described.

If the initial value of the Low level, the target voltage V _L, the rated output current I _{R -rat,} the constant coefficient α _L, the output voltage of the v _o (0), reference voltage V _REF = V _L, the capacitance of the current command Current I _C-REF = -α _L ·I _{R -rat} , the initial value of the output voltage v _o (0) = V _H.

In order not to undershoot the low level output voltage v _o beyond the target voltage V _L , when the regeneration _{to the input voltage V in} is completed when Q1 to Q3 and D1 to D3 of FIG. 10 are both off. In other words, _{the time t us until the capacitance current i c} goes from I _C-REF to the zero current is _{V starting from v o} (n) in Equation (29) within the time t _us. We need to terminate at _REF =V _{L .} From the relational expression of energy in the no-load state, it is necessary to satisfy the relation expressed by the following equation (35).

[Joe 39]

The output voltage of this relation, Equation (29) v _o (n) write fix using the output voltage v _o (n) the associated expression in the sampling number n that is beyond the reference voltage V _L of the Low level not undershoot ( 36) is obtained.

[Number 40]

Here, N represents the value of the integer part of n. When the number of sampling times is N or less, the output voltage _o (N) does not undershoot beyond the low-level command voltage V _L.

Assuming that the transition voltage for transitioning from mode 1 to mode 2 is V _{trans , the output voltage v o} (n) expressed by Equation (29) is Satisfy the relationship In addition, V _{L is the initial voltage o} (0) of the output voltage in High/Low control.

[Number 41]

_{Here, when the transition voltage V trans} is selected using the average value of the upper and lower values of the relational expression, it is expressed by the following Equation (38).

[Number 42]

When the output voltage v _{o (n) becomes V c1} less than or equal to _{the transition voltage V trans} that satisfies Equation (38), mode 2 is shifted. _{Therefore, the switching voltage V c1} in mode 1 at the time of the pulse control of a low level is represented by the following formula|equation (39).

[Joe 43]

・derivation of switching voltage V _c2

Next, derivation|leading-out of _{switch voltage Vc2 is demonstrated.}

Mode 2 executes constant current control of the second stage of the capacitance current. The constant current control of mode 2 of this second stage is a mode that connects the constant current control of mode 1 and the constant current control of mode 3 .

When the entire period of the step response is executed by constant current control of the inductance current, the output voltage v _o (k) becomes the operation of the exponential function shown in Equation (13), which is expressed by Equation (40) below. Here, β in the capacitance current i _c (t) is assumed to be β=β _{3 using β 3} of constant current control by inductance current in mode 3 .

[Number 44]

The time point of the final value of mode 2 is the same as the initial time point of mode 3, and when this time point is t=t2, the output voltage v _o and the capacitance current i _c are respectively expressed by the following formula (41).

[Number 45]

V _c2 , and i _C2 are the final values of mode 2 and initial values of mode 3 . Switching voltage V _c2 of mode 2 is represented by the following Formula (42) using _{i C2 of Formula (41).}

[Number 46]

where V _REF =V _H or V _REF =V _L .

(derivation of coefficients β ₂ , β _{3 )}

Next, the derivation of the _{coefficients β 2} and β _{3 will be described.}

・derivation of coefficient β _{2 :}

Mode 2 is a transfer mode for transferring from mode 1 to mode 3 without generating hunting as much as possible, and in mode 2, the initial values are V _c1 and i _C1 =I _C-REF . , the final values are V _c2 and i _C2 .

Therefore, in mode 2, while controlling so that the final value of mode 2 reaches the value of Equation (41), β=β ₂ is set to control the capacitance current as a constant current β ₂ ·I _C-REF . β ₂ is a coefficient for adjusting _{the command current I C-REF} of the capacitance current in mode 2 .

_{That is, the capacitance current i c} (k+1) for reaching the value of equation (41) at the time of (k+1) is expressed by the following equation (43).

[Number 47]

The coefficient β ₂ is obtained by substituting Equation (41) into Equation (43).

[Number 48]

By setting the coefficient β ₂ by equation (44), the capacitance current i _{c can be set to i c2} at the time of mode 2 switching.

・derivation of coefficient β _{3 :}

_{Next, the derivation of β 3} in the control of mode 3 will be described. β ₃ is a coefficient of the capacitance current i _c , and in constant current control of the inductance current i _L (t), it is selected such that a control response following the _{DC command voltage V REF is obtained.}

The coefficient β ₃ is selected such that a control response following the _{command voltage V REF} is obtained in the constant current control of _{the inductance current i L} expressed by Equation (12). The selection of this coefficient β ₃ is performed by stability determination in the automatic control system of mode 3 . Hereinafter, _{selection of the coefficient β 3} will be described.

(closed-loop first-order transfer function of constant voltage control)

First, a closed-loop first-order transfer function of constant voltage control is shown. _{In the inductance current i L} (t) expressed by Equation (12), β = β ₃ and expressed as an s function, it is expressed by Equation (45) below.

[Number 49]

Fig. 13 shows a circuit block of the closed-loop transfer function expressed by the above formula (45), and shows the circuit state by the first-order transfer function of constant voltage control. In the circuit block of the closed-loop transfer function shown in Fig. 13, the control response frequency ω _c is the point at which the gain of the one-time transfer function reaches "1". _{ω c} at which the gain of the instantaneous transfer function of FIG. 13 becomes 1 is obtained from the following equation (46) by substituting _{A v} in equation (27).

[number 50]

Equation (46) above shows that the control response frequency ω _c is _{selected as β 3 , but the control response frequency ω c} at which the gain becomes “1” is affected by the parameters ω _n and T in addition to β _{3 .} , there are limitations in the selection of _{β 3 .} Therefore, _{the value of β 3} is determined by the selection range.

(closed-loop second-order transfer function and selection range of _{β 3 )}

Next, the closed-loop second-order transfer function and the selection range of _{β 3 are shown.}

The following equation (47) is obtained by modifying equation (28) regarding the pulse width ΔT(k) in mode 3 and expressing it as a continuous function.

[Number 51]

_{V in} (t) ΔT(t)/T on the left side of the formula (47) represents the average value of the _{output voltage v o (t).} That is, in the circuit of Fig. 10, it corresponds to the average voltage of the voltages at both ends of D1 to D3.

Therefore, v _o (t) expressed as a function s v _o (s) is, by using the circuit configuration of Figure _{19, U = V in (s} ) ΔT (s) / when a T,

[Number 52]

becomes

Accordingly, the second-order transfer function v _o (s)/V _REF (s) is represented by FIGS. 13 and 14 . Fig. 14 shows the circuit state of the secondary system transfer function of constant voltage control. _{The instantaneous transfer function of v o} (s) in Fig. 14 is expressed by the following equation (49).

[Joe 53]

Since this transfer function is positive feedback, the gain in the control response must be selected to be "1" or less in order to prevent oscillation. From this gain limitation, the following conditional expression (50) is obtained.

[Number 54]

In this conditional expression (50), a case in which the coefficient expressed by final sigma is set to 0 and the stability condition becomes the worst is considered. Substituting equation (46) expressions for the conditional expression is obtained expression (51) below.

[Number 55]

In the stability determination, the control response frequency ω _c is limited by the above conditional expression, and the influence of the switching time T on the waste time is also considered.

The wasted time is expressed as exp(−jω _c T)=cos(ω _c T)−jcos(ω _c T). Accordingly, the scope of Figure 13 shown in v _o (s) the phase margin 0 [deg], i.e. of the spurt transfer function _{ω c T = π / 2 ω} c , up to is _{ω c <π / (2T)} .

By using the formula (46), _{the range of (1-β 3} ) is expressed by the following formula (52).

[Number 56]

The range of (1-β ₃ ) including the equation (51) is expressed by the following equation (53), whereby the coefficient β ₃ can be selected.

[Number 57]

In the constant current control of the inductance current i _{L (t), by selecting the coefficient β 3} from the above range, the gain can be suppressed to “1” or less, and the control response can be stably followed _{by the DC command voltage V REF .} .

(detection of output voltage v _o (t))

Next, high-speed detection of the output voltage v _o (t) will be described.

In order to control with a high switching frequency, _{it is necessary to detect the output voltage v o} (t) and the capacitance current i _c (t) at high speed. In pulse control including two levels of High/Low, in particular, in constant current control of mode 1 and mode 2 for performing constant current control of capacitance current, the output voltage v _o (t) and the capacitance current i _c (t) are A detector for detecting is required to be measured at high speed.

In order to detect the output voltage _{o (t) at high speed, the detection signal v o -slow} detected by the detection means for the relatively slow response characteristic of the general-purpose sensor is used as the initial value _{o o} (0), and the initial value _o (0) ) and the capacitance current i _c (t) are subjected to high-speed discrete-time processing _{to obtain the output voltage v o} (t). In the acquisition of the output voltage v _{o (t), the detection signal v o -slow} detected by the detection means having a relatively slow response characteristic is set to the initial value v _o (0), but this detection is performed at the initial value v _o (0). _{Since the calculation of the output voltage v o} (t) at each point in time can be performed without using a detection means having a slow response speed, high-speed detection is possible.

_{Since mode 3 can be obtained without using the output voltage v o} (t) at each time point t as a feedback signal, it _{is not affected by disturbance by v o -slow} , and in the mode 3 correction section, v _{o -slow} is being corrected. In the constant-current control mode 1~mode 3 for performing a cycle for each sample, before (前) of the final value of the mode 3 in the sampling period is _-slow v _o, v _o used in the mode 1 of the next sampling period of the mode 2 It is used as the _{initial value v o} (0) to obtain (t).

In the circuit example of the step-down chopper circuit of the three-phase interleaved system shown in Fig. 1, the sampling time T is set to T=1/Fs. where Fs is the switching frequency.

In order to detect the output voltage v _o (t) at high speed, a sampling time Th that is sufficiently shorter than the sampling time T satisfying Th<0.1·(T/3) is set.

_{At this sampling time Th, the capacitance current i c} (t) is detected by an AC current transformer that is easy to detect at high speed, and the following discrete time processing is performed. Here, Th = tm-tm-1.

[Number 58]

In 2-level pulse control that performs high/low 2-level pulse operation in a wide band (1Hz to 50Hz), after correcting the Low (High) level, the next output voltage is applied to the next High/Low 2-level pulse operation It is used as the initial value of High (Low) voltage.

Low When the output voltage _{starts a High level pulse operation from V L} after correction of the level pulse operation, and the output voltage _{reaches V H} after correction, the following expression (55) is obtained.

[Number 59]

It becomes possible to use _{the detection signal o -slow} detected by the detection means of the general-purpose sensor whose response is comparatively slow for the initial value _{o (0) corresponding to V L} in said Formula (55).

Control of mode 3 continues even after the output voltage v _o (km) _{reaches the set voltage V H -set. Assuming} that the time to reach V _H -set is Tset, the following relationship exists between the sampling times km in mode 1 and mode 2 and Tset.

km Th>Tset

km>Tset/Th

In a practical example, when Tset = 8 mu s and Th = 1/60 MHz, km>8 mu s x 60 MHz = 480. In this example, the resolution is 480 or more, and the detection speed is Th = 1/60 MHz = 0.0167 mu s.

Similarly, when the low-level pulse operation is started from the _{voltage V H} after the high-level pulse operation has been corrected _{and the voltage V L} is reached _{after the correction, o (0) corresponding to V H} is a general-purpose sensor with a relatively slow response. It becomes possible to use a detection signal obtained by detecting with v _{o -slow.} After _o (km) _{reaches the set voltage V L -set} , mode 3 control is continued.

In the power supply device of the present invention, the main loop is controlled according to the command signal of the power supply device, and the minor loop is a two-level deadbeat control according to the high/low DC command voltage of the bidirectional step-down chopper circuit of the polyphase interleaved method. It can be applied to a control system, and can be applied to a DC power supply device, an AC power supply device such as a UPS, an RF generator, and the like.

Hereinafter, an example of applying the power supply device of the present invention to an RF generator will be described with reference to FIG. 15, and an operation example when the power supply device of the present invention is applied to an RF generator will be described using the flowchart of FIG. 16, and High / A low control example will be described using the flowchart of FIG. Further, an example in which the power supply device of the present invention is applied to a DC power supply device and an AC power supply device will be described with reference to FIG. 18 .

(Application example of RF generator)

15 is a control block diagram for explaining a control system of an application example of an RF generator. The control system includes PI control constituting the main loop control system and control constituting the minor loop control system. A two-level deadbeat control system according to the high/low DC command voltage of the bidirectional step-down chopper circuit of the polyphase interleaved method of the power supply device of the present invention is applied to the control constituting the minor loop control system.

When performing two-level control of high level and low level, in the main loop, as a high level command signal, a high level traveling wave power command P _{H -Forward} or a high level load power command P _{H -Load} is used, a command signal of the Low level, Low level progressive wave power command P _{L -Forward,} or Low-level load power command using the P and _{L -Load,} High level or Low level obtained from the load-side progressive wave power traveling wave power, or, High-level power load Alternatively, PI control is performed by feeding back low level load power. In addition, input the rated DC voltage V _{o -rat} , the rated DC current I _{o -rat} , and the rated traveling wave power P _{H -rat} as rated values.

On the other hand, in the minor loop, the high level command voltage V _H and the low level command voltage V _L obtained by the PI control are used as command values, and the output voltage _o or the capacitance current i _c is fed back to perform deadbeat control.

The flowchart of FIG. 16 has shown the starting mode which ignites plasma in a plasma load by an RF generator. In the flowcharts of Figs. 16 and 17, the respective steps are denoted by reference numerals S1 to S10, S11, and S12.

The rated value of the RF generator and the command value for driving the RF generator are set. As the rated value, input the rated DC voltage V _{o -rat} , the rated DC current I _{o -rat} , and the rated traveling wave power P _H-rat to set the rated value. Further, as electric power command P _H of the High level, High-level progressive wave power command P _{H -Forward,} or High-level load power command, type P and _{H -Load,} Low level of a power command P _L, Low level progressive wave power command P and sets the _{L -Forward,} or Low-level load power command P _{L -Load} (S1).

First, to perform the High-level power command P _H in a continuous mode, for example, raising operation _{(Ramp Up (P H -rat /} 20㎳)) to 20㎳ (S2).

In the case where the plasma does not ignite due to the voltage rise in the continuous mode (S3), the ignition operation is performed by pre-pulse control. In addition, the prepulse control is a control that forms an atmosphere of plasma ignition by applying a plurality of prepulses having a pulse width narrower than that of the main pulse as a step before the main pulse causing plasma ignition. It is disclosed in document 4.

In the pre-pulse control, for example, the supply power is raised _{to P H while the average reflected power P REF-ave} is maintained at a predetermined value by a duty control of 5 kHz. The predetermined value of the average reflected electric power P _{REF -ave} is determined by multiplying the high level rated electric power P _{H -rat by a predetermined coefficient, for example.} The predetermined coefficient can be set to 0.1, for example. For the average reflected power P _{REF -ave} in the pre-pulse mode, a pulse that is controlled on/off with a duty ratio of 10% can be used.

The pattern operation in the pre-pulse mode is repeated, and when the number of repeated operations reaches the prescribed number, an ignition (ignition) failure is displayed and the operation is stopped (S4).

When plasma is ignited (S3), the high level _{voltage value V H is secured after starting from the high level power command P H} set to the high level, and corrected by the high level power command P _H (S5).

Then, the lowering operation _{(Ramp Down (P H -rat /} 20㎳)) by a High-level power command after a fall from P _H to P _L and Low-level power command (S6), correcting the Low-level power command P _L A voltage value V _L of a low level is secured (S7). Thereby, V _REF (High) = V _H , the high level command voltage V _REF (High) can be set as the corrected high level command voltage V _{H , and V REF} (Low) = V _L , it is possible to set the low-level command voltage V _REF (Low) to the low-level command voltage V _L after correction.

After that, when an arc occurs, the power supply is stopped by arc cut-off control, and then the ignition operation of S2 to S7 is performed (S8), and when arc cut-off control is not performed, high/low two-level control (S10) ) is performed.

(High/Low level control)

Next, an example of high/low level control will be described using the flowchart of FIG. 17 . In the flowchart of FIG. 17 , the High/Low level control sets the output power to P _H (Forward)/ _PL (Forward), a power command of the _{traveling wave power, or P H} (Load)/P _L ( Load) includes PI control by the main loop (S11) to follow the power command, and deadbeat control by the minor loop (S12) to follow the output voltage to two-level command voltages of High/Low.

_{In the PI control of P H} and P _L by the main loop of S11, the processing is performed with a sampling period Tc that is slower than the sampling period T performed in the deadbeat control of the minor loop (S11A). For example, the sampling period Tc can be set to 50 mu s, and the H/L pulse period can be set to 1 Hz to 50 kHz.

In the minor loop control (S12) performed during the control process of the PI control of S11A, for example, in the case of three-phase interleaving, the following equation (56) expressed in equation (55)

ｖ _o (km)=(i _c (km-1)/C) Th+ｖ _o (km-1) … (56)

_{, calculates the output voltage o} (km) using the sampling period Th. _{For each phase of the three-phase interleave, o} (km) obtained every T/3 which is 1/3 of the sampling period T is detected as the _{output voltage o (k).}

km is the resolution, for example, in the case of Tset = 8 mu s and Th = 1/60 MHz, km>Tset/Th = 8 mu s x 60 MHz = 480. In this example, a resolution of 480 or more is obtained (S12A).

The high level command voltage V _H and the low level command voltage V _L are obtained (S12B), and after correction _{o (km) at the k time point is set as the output voltage o} (k) of the High level and the Low level, respectively. Acquire (S12C).

The pulse width ΔT(k) of the high level is obtained (S12D), and control is performed to follow the _{output voltage o o} to the command voltage V _{H of the high level using the obtained pulse width ΔT(k), and then} to obtain a pulse width ΔT (k) (S12E), using the thus obtained pulse width ΔT (k) is carried out the control for following the output voltage v _o to the command voltage Low level v _L.

It starts with control to follow the high level electric power command P _{H , then performs control to follow the low level electric power command P L} , and this high level P _H Repeat control and Low level P _L and continues to control the operation of the High / Low pulse power control.

Whenever each High/Low pulse power control ends, high level ending power P _{H -end} and low level ending power P _{L -end} , high level ending voltage V _{H -end} and low level ending voltage V _{L -end} data peak hold.

The high level end voltage V _{H -end} and the low level end voltage V _{L -end hold the command voltage V REF} of Equation (12) corresponding to the High/Low level as the command voltages V _H and V _L . . In addition, the high level end power P _{H -end} and the low level end power P _{L -end} are used as feedback signals of the High/Low pulses.

(Application examples of DC power supply and AC power supply)

Next, an example in which the power supply device of the present invention is applied to a DC power supply device and an AC power supply device will be described with reference to FIG. 18 .

18 is a control block diagram for explaining a control system of an application example of the power supply device of the present invention to a DC power supply device and an AC power supply device. The control system includes PI control constituting the main loop control system and debit control constituting the minor loop control system. A two-level deadbeat control system according to the high/low DC command voltage of the bidirectional step-down chopper circuit of the polyphase interleaved method of the power supply device of the present invention is applied to the debit control constituting the minor loop control system.

When performing the two-level control of the High level and the Low level, in the main loop, as the command signal, and using a High-level power command P _H or the voltage command V _REFH, Low-level power command P _L or the voltage command V _REFL, PI control is performed by feeding back the power or voltage acquired from the load side. In addition, input the rated DC voltage V _{o -rat} , the rated DC current I _{o -rat} , and the rated traveling wave power P _{H -rat} as rated values.

On the other hand, in the minor loop, the high level command voltage V _H and the low level command voltage V _L obtained by the PI control are used as command values, and the output voltage _o or the capacitance current i _c is fed back to perform deadbeat control.

In addition, the description in the above embodiments and modifications is an example of a power supply device according to the present invention, and the present invention is not limited to each embodiment, and various modifications can be made based on the gist of the present invention. and these are not excluded from the scope of the present invention.

The power supply device of the present invention can be applied to supply of high-frequency power to a device using high frequency, such as a manufacturing apparatus for semiconductors and liquid crystal panels, etc., a vacuum vapor deposition apparatus, and a heating/melting apparatus.

1: power supply
2: chopper circuit
3: switching circuit
4: LC circuit
5: Switching signal generator
6: Control
7: load
A _v , β: coefficient
C: capacitance
D1-D3: Diode
F: transformation matrix
G: transformation matrix
I _C-REF : Command current of capacitance current
I _{R -rat} : Rated output current
I _{o -rat} : Rated DC current
i _C : capacitance current
i _L : inductance current
i _L1 ∼ _{i Ln} : inductance current
i _R : load current
L: inductance
N: number of sampling
P _H : High level power command
P _{H -Forward} : High level traveling wave power command
P _{H -Load} : High level load power command
P _{H -end} : High level end power
P _{H -rat} : High level rated power
P _L : Low level power command
P _{L -Forward} : Low-level traveling wave power command
P _{L -Load} : Low level load power command
P _{L -end} : Low level end power
P _{REF -ave} : average reflected power
Q1 to Q3: switching elements
R: load resistance
T: sampling period
Th: sampling time
Tc: sampling period
V: input voltage
V _c1 : switching voltage
V _c2 : switching voltage
V _H : High level command voltage
V _{H -end} : High level end voltage
V _{H -set} : High level correction voltage
V _L : Low level command voltage
V _{L -end} : Low level end voltage
V _REF : Reference voltage
V _in : input voltage
V _l : correction voltage
ｖ _o : output voltage
V _{o -rat} : Rated DC voltage
v _{o -slow} : detection signal
V _trans : transition voltage
km: number of samples
ΔT(k): Pulse width

Claims (9)

A power supply comprising an LC chopper circuit, comprising:
A control unit that performs step response control toward a command value by polyphase interleave control that performs polyphase control using a plurality of phase currents, and a switching signal generation unit that generates a switching signal,
The control unit is
Calculation of the pulse width ΔT(k) of the switching signal for driving the LC chopper circuit by constant current control of a predetermined period performed based on the control current including the synthesized current obtained by synthesizing the phase currents in the LC chopper circuit every sampling period T,
The switching signal generator,
A switching signal of each phase is generated by using the pulse width ΔT(k) calculated by the controller as the pulse width ΔT(k) of each phase current,
The control current is a combined current of the inductance current of each phase of the LC circuit, and/or the capacitance current,
the control current comprises the resultant current of the inductance currents of each phase of the LC circuit,
performing constant current control of inductance current or constant current control of capacitance current based on the control current;
In the polyphase interleave control, the pulse width ΔT(k) by the three-phase interleave control is,

V _in (k) is the input voltage,
v _o (k) is the output voltage,
i _L (k) is the resultant current of the inductance currents of each phase,
i _R (k) is the load current,
L is the inductance of the LC circuit,
C is the capacitance of the LC circuit,
T is 1 period width
Power supply, characterized in that. delete A method of controlling a power supply comprising an LC chopper circuit, the method comprising:
A control method for stepwise response toward a command value by polyphase interleave control in which polyphase control is performed by a plurality of phase currents,
Calculation of the pulse width ΔT(k) of the switching signal for driving the LC chopper circuit by constant current control of a predetermined period performed based on the control current including the synthesized current obtained by synthesizing the phase currents in the LC chopper circuit A control process performed for each sampling period T;
a switching signal generating step of generating a switching signal for each phase by using the calculated pulse width ΔT(k) as the pulse width ΔT(k) of each phase current;
The control current is a combined current of the inductance current of each phase of the LC circuit, and/or the capacitance current,
the control current comprises the resultant current of the inductance currents of each phase of the LC circuit,
performing constant current control of inductance current or constant current control of capacitance current based on the control current;
In the polyphase interleave control, the pulse width ΔT(k) by the three-phase interleave control is,

V _in (k) is the input voltage,
v _o (k) is the output voltage,
i _L (k) is the resultant current of the inductance currents of each phase,
i _R (k) is the load current,
L is the inductance of the LC circuit,
C is the capacitance of the LC circuit,
T is 1 period width
characterized in that, the control method of the power supply. delete delete 4. The method of claim 3,
the control current is the capacitance current of the LC circuit,
performing constant current control based on the capacitance current;
In the polyphase interleave control, the pulse width ΔT(k) by the three-phase interleave control is,

V _in (k) is the input voltage,
v _o (k) is the output voltage,
i _c (k) is the capacitance current,
I _C-REF is the capacitance reference current,
L is the inductance of the LC circuit,
C is the capacitance of the LC circuit,
T is 1 period width
characterized in that, the control method of the power supply. 4. The method of claim 3,
the control current is the capacitance current of the LC circuit,
performing constant current control based on the capacitance current;
In the polyphase interleave control, the pulse width ΔT(k) by the three-phase interleave control is,

V _in (k) is the input voltage,
V _c1 is the initial value of the output voltage,
I _C-REF is the capacitance reference current,
β ₂ is the coefficient of the capacitance command current,
L is the inductance of the LC circuit,
C is the capacitance of the LC circuit,
T is 1 period width
characterized in that, the control method of the power supply. 4. The method of claim 3,
the control current is the inductance current of the LC circuit,
performing constant current control based on the inductance current;
In the polyphase interleave control, the pulse width ΔT(k) by the three-phase interleave control is,

V _in (k) is the input voltage,
V _REF is the reference voltage,
v _o (k) is the output voltage,
i _c (k) is the capacitance current,
A _v is a coefficient multiplied by the difference (V _REF -v _o (k)) between the command voltage V _REF and the output voltage v _{o (k),}
β ₃ is the coefficient of capacitance current,
L is the inductance of the LC circuit,
C is the capacitance of the LC circuit,
T is 1 period width
characterized in that, the control method of the power supply. 9. The method of claim 8,
Wherein A _v is A _v =3T/L,
In the polyphase interleave control, the pulse width ΔT(k) by the three-phase interleave control is,

V _in (k) is the input voltage,
V _REF is the reference voltage,
i _c (k) is the capacitance current,
β ₃ is the coefficient of capacitance current,
L is the inductance of the LC circuit,
C is the capacitance of the LC circuit,
T is 1 period width
characterized in that, the control method of the power supply.

Images