KR102284952B1 - Dynamic saving of registers in transactions - Google Patents

Abstract

The data processing apparatus includes a plurality of data storage elements each storing data. The mask storage circuitry stores the mask, and the processing circuitry executes one or more instructions. The data saver, in response to a transaction start command, selects a subset of the data store members to keep a backup of the subset. The mask control circuitry then updates the mask to indicate the subset of the data storage elements selected by the data saver. Finally, the monitor detects a write or write attempt to one of the data repositories not indicated by the mask.

Description

DYNAMIC SAVING OF REGISTERS IN TRANSACTIONS

BACKGROUND This disclosure relates to the field of data processing, and more particularly to the use of transactions in data processing devices.

In multiprocessor systems, it is sometimes necessary to ensure coordination between the various processing devices. For example, consider a situation where both processor A and processor B want to decrease a shared resource (eg, the value of an individual's bank balance) by 10. If the value of an individual's bank balance is initially 100 and processed correctly, the share value should be reduced to 80 (100-10-10). However, if each of the processors A and B simultaneously fetches the current value, each of the processors may simultaneously perform calculations and write back the new value 90 to the shared memory. Thus, due to lack of coordination, one of the two transactions is masked or overwritten by the other.

Locks may be used to ensure that only a single executing agent (processor or thread) can access a shared resource at a time. Considering the above example, a user's bank balance may be a shared resource, so that a lock may be applied to the data value to ensure that only one processor can read and modify the value at a time. When recorded correctly, the locks can be used to prevent transactions from overwriting each other and to ensure that access to the shared resource is coordinated across agents. In other words, this helps to avoid situations where one agent is operating on an outdated version of a shared resource. The downside to using locks is the level of granularity that is protected. For example, consider a linked list. In a linked list, each element provides a data value and a pointer to the next element in the list. When multiple agents are looking for change access to the linked list, to prevent a situation where one of the elements no longer points to the next element in the list - corrupted by the list, It is desirable to lock the access of One option is to lock the entire list. However, if one agent wants to change the head of the list and the other agent wants to change the tail of the list, this lock is unnecessarily restrictive - two agent edits are not easy to interfere with each other. Another option is to lock each individual element of the list. However, this may require multiple locks in the case of large lists, where each lock requires its own storage in memory. Also, locks have the disadvantage of causing deadlocks. For example, if two agents each need access to two shared data resources protected by locks and each of the two agents maintains a lock on one of their two shared data resources, the system enters a deadlock state. In other words, neither agent can proceed and will wait a very long time for the other agent to release the lock it needs.

One solution is to use transactions rather than locks. When a transaction starts, the processor enters a special execution mode. While in this mode, the system tracks reads and writes. If it determines that there is a conflict (eg, between multiple agents), one of those agents is aborted and rolled back, eg, its change will not be made. If a conflict does not occur, the agents continue until a conflict occurs, at which time changes made are committed. Thus, a transaction may be thought of as a series of operations that are acquired as a single atomic operation, that the entire transaction is invisible to other agents, even that one agent, until the transaction is committed (a single operation). This is because it may not be done or may not be reversed by rolling back only by

In some embodiments, performing a transaction may require that all rescue registers be preserved in order for them to be restored to their original values in the event of a rollback. Since some architectures have a significant number of registers, in such a system it may be necessary to preserve the values of all of those registers. However, this approach can be useless because it involves preserving data that never changes within a transaction. In this case, the data is stored unnecessarily, thereby consuming a storage space for storing the values and time for physically copying the data values. Also, when a rollback occurs, all saved registers must have their values restored even if their data values have not changed. Accordingly, when rollback occurs, more time may be wasted when restoring all of the stored data values. Additionally, it is also desirable to avoid the power consumption associated with restoring all of their stored data values in the event of a rollback.

As an alternative, it is possible to make their registers changed during a transaction user and/or compiler specific. In this case, only the registers specified above are preserved, and only those registers will be restored in case of a rollback. However, it may not always be possible to predict whether a particular register will be used in a transaction or not. For example, a transaction may involve one or more calls to library functions. Users or programmers may have little control over these library functions and may not be able to see how those library functions work. In this case, the user has no way of knowing which registers should be preserved when the transaction starts. Thus, the user must either preserve all of the registers, or go ahead with the possibility that the rollback will fail because otherwise the unsaved registers are being changed.

In the first configuration example, the data processing apparatus includes: a plurality of data storage elements each storing data; a mask storage circuit for storing the mask; processing circuitry for executing one or more instructions; a data saver that, in response to a transaction start command, selects a subset of the data store members and preserves a backup of the subset; mask control circuitry for updating the mask to indicate the subset of the data store elements selected by the data saver; and a monitor for detecting writes to one of the data storage elements that are not indicated by the mask.

A data processing apparatus according to a second configuration example includes: means for storing a plurality of data; mask storage means for storing the mask; processing means for executing one or more instructions; data preservation means for selecting a subset of means for storing the plurality of data in response to a transaction start command to preserve a backup of data stored by the subset of means for storing the plurality of data; mask control means for updating said mask to indicate said subset of means for storing said plurality of data selected by said data preservation means; and monitoring means for detecting writing to one of said plurality of data storing means not indicated by said mask.

According to a third configuration example, there is provided a data processing method in a data processing apparatus having a plurality of data storage members for storing data, the method comprising: in response to a transaction start command, selecting a subset of the data storage members; maintaining a backup of the data stored by the subset of the data repository; updating a mask to indicate the subset of the data store members; and detecting a write to one of the data storage elements not indicated by the mask.

The present technology is further illustrated by way of example only with reference to embodiments thereof, as shown in the accompanying drawings below:
1 shows an overview of a system having a data processing device in one embodiment;
Fig. 2 is a circuit diagram showing components constituting the data processing apparatus in one embodiment;
Fig. 3 is a circuit diagram showing components constituting the data processing apparatus in one embodiment;
Fig. 4 shows in flow chart form a method of using the data processing apparatus according to an embodiment;
5 is a flow diagram illustrating how heuristics are used to select a set of preserved registers at the start of a transaction.

In the first configuration example, the data processing apparatus includes: a plurality of data storage elements each storing data; a mask storage circuit for storing the mask; processing circuitry for executing one or more instructions; a data saver that, in response to a transaction start command, selects a subset of the data store members to keep a backup of the subset; mask control circuitry for updating the mask to indicate the subset of the data store elements selected by the data saver; and a monitor for detecting writes to one of the data storage elements that are not indicated by the mask.

In response to a transaction start command indicating that a transaction is to be started, the mask storage circuitry preserves (backs up) the subset of data stores. For example, these data storage elements may be registers in the data processing apparatus. It will be appreciated that such a data store may also take the form of various memory configurations consisting of register files, shadow register files, and, for example, caches and internal scratch pad memories. A mask is then stored indicating which of the data store members is preserved. It should be noted that the word "subset" is used herein to mean "less than the whole" of the full set of data store members. In the transaction, the processor executes one or more instructions. A monitor detects an attempt to write to a data store not indicated by the mask (i.e., an attempt to write to a data store that is not archived or backed up. For example, the monitor writes to the data store may check their instructions that cause the data to be stored, or it may block signals sent to the data store by the processing circuitry, where, throughout this specification, "write" It is intended to represent both a write and a write request from the processor to their data store.If such a write or write attempt were allowed to proceed, the transaction mechanism itself would have failed because a rollback is possible. This is because the data processing unit (by the monitor) is able to detect the record and, if appropriate, take appropriate action. Therefore, it is not necessary to preserve or back up every single register every time a transaction is started, and the user is concerned about the possibility that the transaction mechanism will fail because an attempt is made to write to a data store that is not preserved or backed up. You do not have to do.

Actions taken by the data processing device in response to detection of an attempt to write to a data repository not indicated by the mask may take a number of different forms, exemplified below, which exist in separation or combination. You can do it.

For example, the data processing apparatus may include a prohibition circuit that prohibits writing to one of the data storage elements not indicated by the mask. In this embodiment, when an attempt is made to write to a data store that is not backed up, the attempt to write may simply be blocked. This may be done by the monitor by the fact that the write request issued by the processor does not reach the data store. In some embodiments, the monitor also signals the processor that the write attempt has failed, which may enable the processor to take its own corrective action, for example by executing an exception handling routine. may be

As another example, the data processing apparatus may include a restorer that restores the data storage element indicated by the mask from the backup. Accordingly, when an attempt is made to write to a data storage device that has not been backed up, all of the data storage device may be restored to previous values. In some cases, an updater (eg, embodied as an update circuit) may also update a program counter to indicate the transaction start instruction or an error handler. As a result of returning the program counter and restoring the data store, a full rollback of the transaction occurs. Therefore, the transaction may have to be restarted. By changing the program counter to indicate an error handler, it is possible to execute special error handling code. This can be used to output diagnostic information.

As another example, in response to detecting a write to one of the data storage elements not indicated by the mask, the monitor may be configured to signal an error. For example, a signal may be sent to the processor. The processor may have a dedicated subroutine to handle this situation. Alternatively, the processor may signal an exception, and the software itself may have an exception handling routine to handle the situation. This may allow complete flexibility as to how to proceed with the transaction. For example, if the transaction has already failed several times, the transaction may simply be rolled back and abandoned. If the failure of the transaction is not critical (eg, the data values themselves are not critical), the software will continue to work without rolling back. In other cases, the transaction may have to be rolled back and restarted, this time preserved by an additional register.

The data storage member may be selected by the data saver based on a heuristic (eg, empirical) analysis performed by the data processing device. In particular, by using a heuristic or statistical method, the data saver may select those data stores to be preserved (backed up). In this case, it may reduce the burden on the programmer by not having to explicitly state which datastore the programmer should back up to, and to which datastore the programmer is calling the libraries and to which datastore they should be backed up. It may be appropriate for use in cases where it is not obvious to the programmer.

The heuristic analysis may depend on the data described further by the compiler. For example, at compile time, the compiler may provide hints (ie indications) that can be used to determine which data stores should be preserved by the data saver.

Heuristic analysis may rely on calling conventions associated with the one or more instructions. The calling convention may depend on a particular architecture, and may specify how data should be exchanged between the caller and the callee in a function call. In particular, the calling convention may indicate how to pass parameters (eg, using a special data store or stack) and how to return results. Such information may be useful in predicting which data store(s) should or are likely to be preserved, prior to the start of a transaction.

The heuristic analysis may depend on the number of times the monitor has detected a write to one of the data repositories not indicated by the mask. For example, if a transaction is repeatedly rolled back as a result of writes to registers that are not preserved, the data store selected in the data saver to preserve may be used to attempt to reduce the chance that another transaction will roll back , may be changed. For example, the subset of data storage elements selected may be increased in response to the monitor detecting a write to one of the data storage elements not indicated by the mask. For example, whenever the monitor detects an attempt to write to a data store that is not preserved, a rollback may occur and additional registers may be preserved compared to previous iterations. In other embodiments, the number of registers kept may be incremented more rapidly to limit the number of rollbacks that occur. However, this must be balanced against an increased risk of preserving registers unnecessarily.

The subset of data stores to be preserved may be selected by the data saver in response to a subset definition command. For example, the user may provide a "best estimate" as to which data store(s) should be preserved. This approach may be useful as an initial starting point for determining which data store to back up. This approach may be particularly useful if the user has gained knowledge of how the calling library works.

The data storage element may be a plurality of registers.

The monitor may include a monitoring circuit. The monitoring circuit may block signals issued to the data storage element by the processor. In other embodiments, the monitor may be implemented by monitoring software, and causes the processor to write to a non-conserved (ie, not part of the mask) data store before executing the instruction. You may monitor the instruction being executed to determine

The data saver may include a data saving circuit, that is, a special circuit configured to perform the data saving function described above. However, the data saver may be implemented by data retention software that explicitly backs up or preserves it to a special location by the data repository.

The data saver may be configured to keep a backup to a local cache of a subset of the data store member. By using a local cache, it is possible to isolate changes made by other agents by the time they are committed. This is important because, until the changes are committed, no other agent should see them. This separation can be achieved by using a local cache and by providing an appropriate tag for its associated cache line entry to indicate that it should not be retrieved by other processors.

In some embodiments, the mask indicates both a set of registers to be preserved and a set of registers to be non-preserved; The data store members are selected by the data saver to include those identified in the set of registers to be preserved and to exclude those identified in the set of registers to be preserved. Accordingly, it is possible to mark a set of registers with values that are not preserved. However, since the registers are still marked by the mask, writing to the registers will not occur by any special action. Because of this, these registers can be used, for example, for communication purposes with the outside world.

Figure 1 shows a system comprising two data processing units 102, 104, each having a respective processor core 100, 130 and each having an associated set of registers localized to that processor core. Each processor core 100, 130 is also associated with a local cache (110, 140). In other words, one processor core may not have access to the cache associated with the other processor core. Each cache 110 , 140 may communicate with each other (for consistency purposes) and with shared memory 120 via memory bus 150 . The shared or main memory 120 includes one or more shared data structures (shared resources) that the processor cores 100 and 130 can access. Since each processor core 100, 130 can access the same shared data structure held in main memory 120, the system coordinates between the processor cores, and changes by one processor core to the other processor core. Transactions are used to help prevent being "overwritten" by changes made by

2 illustrates one embodiment of a processor core 100 . The processing circuit 160 executes data processing instructions. One of those commands may be used to indicate that a transaction is starting. In response to receiving this instruction, the processing circuitry 160 signals the data preservation circuitry 170 to preserve the subset 190 of registers in the register file 180 . The mask 200 is also updated by the mask control circuit 210 to reveal the subset 190 of the registers. In this example, the subset 190 consists of registers r0, r1 and r2. Thus, the mask contains a value of 11100000, thus indicating that the subset consists of the first three of the eight registers in the register file 180 . Of course, for a register file of a large or different number of registers, it is important to note that the size of the mask is appropriate to reflect which of the registers has a subset of the registers preserved by the data preservation circuitry 170 . you will know In addition, the processor core 100 includes a monitoring circuit 220 (functionally) located between the processing circuit 160 and the register file 180 . The monitoring circuit 220 intercepts write requests issued to the register file 180 by the processing circuit 160 . In other words, when the processing circuitry 160 sends a signal to write to one register in the register file 180, first, this signal is received by the monitoring circuitry 220 . Then, the monitoring circuit 220 converts the mask 9200 by the inverter 230 and compares it with a set of registers not preserved by the data retention circuit. If a write request issued by the processing circuitry 160 and received by the monitoring circuitry 220 is not made to one of the registers reserved by the data retention circuitry 170, the monitoring circuitry responds. For example, in this embodiment, the monitoring circuit sends a warning signal to the processing circuit 160 . However, when a write request (signal) issued by the processing circuit 160 is made to one of the registers saved by the data retention circuit 170, the request is It may be allowed to proceed to the register file 180 by the monitoring circuit 220 .

In some other embodiments, the mask may further identify a set of registers to be non-preserved (ie, not preserved). However, the reason these registers are not preserved by the data retention circuitry 170 is that these registers are still identified by the mask, and the monitoring circuitry 220 does not respond when written to these registers. These registers are not backed up, but can be written to without the supervisor circuit 170 performing some special action (eg, causing an error, aborting, or restarting). To this end, these registers may be used, for example, to communicate to the outside world. For example, an aborting transaction may use the register to communicate why the transaction is aborting.

In these embodiments, because of this, one register may fit in one of three different cases. In the first case, the register may be indicated by the mask as a register to be preserved. These registers can be backed up and rolled back as needed. In the second case, the register need not be marked at all by the mask. When these registers are written in a transaction, some kind of special action may be initiated by the monitoring circuit 170 . For example, the transaction may be aborted, the system may be restarted, an error may occur, and the like. In the third case, the register may be indicated by the mask as being a non-preserved register. These registers are not backed up and cannot be rolled back. However, when these registers are written, the monitoring circuit 170 does not take any special action.

FIG. 3 shows an embodiment of a data processing device 102 including a processor core 100 and a local cache 110 . The same reference numerals are used to denote features that have already been described.

In the embodiment described above, the data preservation circuit 170 includes a heuristic analyzer 240 . This heuristic analyzer monitors the ongoing success or failure of the data preservation circuitry in the selection of the subset 190 of the registers to be preserved or backed up in the local cache 110 . There are many different heuristics or statistics that the heuristic analyzer 240 may consider when determining the subset 190 . For example, in this embodiment, the number of times the monitoring circuit blocks an attempt by the processing circuitry 160 to write to a register in the register file 180 that is not part of the subset 190 . Consider findings based on In particular, the counter 250 indicates that the processing circuitry 160 places a register in the register file 190 that is not kept in the cache (ie, a register that is not part of the subset 190). Incremented with each attempt to log. When the data retention circuit 170 determines which registers should be preserved, the value of the counter 250 is considered. In this way, the data preservation circuitry 170 preserves a larger subset of registers, as more requests are made to the processing circuitry 160 to write to the registers in the register file 180 that are not preserved. so you can respond.

In addition, the heuristic analyzer 240 may consider heuristics such as the calling convention associated with instructions executed by the processing circuit 160 . The calling convention governs how and how data is passed between the caller and the callee when a function is called. For example, the calling convention governs passing parameters using a special combination of registers, or using the stack. Likewise, the calling convention may indicate how the result of a function call is returned. This information can be used to better predict which registers are more likely to be written to by the processing circuitry 160 . For example, if the calling convention indicates that the first parameter is always passed using register r0, then it is more likely that register r0 will be written by the processing circuitry 160 at some point. Accordingly, the heuristic analyzer 240 may determine that register r0 should always form part of the selected subset.

Another example of discovery considered by the heuristic analyzer may be hints provided by the compiler when compiling source code into instructions for the processing circuit 160 . Since the compiler has visibility of the source code, the compiler may be in a position to provide a good representation of the registers that should be preserved by the data retention circuitry 170 . Note, however, that this is not always possible because the source code may refer to a library or external code source that is not visible to the compiler. Accordingly, hints provided by the compiler may not always be complete.

Similarly, a compiled application may mark registers that should not be preserved by the data preservation circuitry 170 . This may be used to invalidate the heuristics or statistics gathered by the heuristic analyzer 240, or the data preservation circuitry 170 may be configured to preserve all registers except those marked by the compiled application.

It should be noted that many other heuristics are contemplated by the heuristic analyzer 240 in any combination, including still other examples not explicitly mentioned herein but known to those skilled in the art. The heuristic analyzer 240 may also combine different heuristics in a number of ways to produce a final conclusion regarding the subset 190 of the registers that are preserved.

A monitoring and inhibiting circuitry 320 is provided to monitor an attempt by the processing circuitry 160 to write to the register file 180 . The monitoring and inhibiting circuitry 320 is configured to monitor and write requests from the processing circuit 160 to the register file 180 as well as registers that are not preserved (backed up) by the data retention circuit 170 . The signal sent by the processing circuit 160 to the register file 180 is also configured to be inhibited. In other words, this signal is ignored and not sent to the register file 180 .

Additionally, in response to detecting a write request to a register in the register file 180 that is not preserved by the data retention circuitry 170, the program counter 270 maintained in the register file 180 is , is updated by the updater 260 . The program counter 270 is used to indicate the next instruction to be executed by the processing circuitry 160 . Accordingly, by using the updater 260 to update the program counter 270 , the monitoring and inhibiting circuitry 320 causes the processing circuitry 160 to write to a register that is not part of the subset 190 . It is possible to restart one transaction or skip all of it if it detects that it is trying to write In the present embodiment, the data recovery circuit 280 is also provided so that, when writing is attempted to a register that is not part of the subset 190, saved registers are restored from the cache. In other words, the backed up registers are reset to their original values. Accordingly, it is possible to perform rollback by the data recovery circuit 280 and the updater 260 . That is, in response to detecting by the monitoring and inhibiting circuitry 320 that the processing circuitry 160 is attempting to write to a register that is not part of the subset 190 (ie, not preserved). , the write request is inhibited by the monitoring and inhibiting circuit 320 , the program counter 270 is reset by the updater 260 to the value of the command that started the transaction, and the data recovery circuit 280 ) restores the values of the subset of registers 190 to the values they had at the time the transaction started. In other words, the state of the data processing unit is reset at the point at which the transaction started. In another embodiment, in response to detecting by the monitor and inhibit circuitry 320 that the processing circuitry 160 is attempting to write to a register that is not part of the subset 190, the program counter It may be updated to reference the error handling routine. This error handling routine may define special actions to be taken when an attempt is made to write to a register that is not part of the subset 190 .

4 illustrates, in the form of a flow diagram, a method of executing transactions according to one embodiment; In step S200, a transaction starts. This may occur as a result of the processing circuitry 160 receiving a transaction start command. However, the transaction may also be initiated by hardware if special conditions are satisfied. In step S210, a subset of the data store members is selected. For example, the data store may be registers in register file 180 . There are many ways in which the set of data store members may be selected. One way to select them is to use a heuristic, which will be described later with respect to FIG. 5 . However, the data storage device is selected, and a backup is performed in step S220. In some examples, the backup may be made by writing the values of the data stores to the cache 110 . However, it will be appreciated that other forms of data storage may likewise be permitted. The mask 200 is then updated to reflect the subset of data storage elements that are preserved in step S230. Then, the transaction proceeds by the processing circuitry executing one or more instructions. If, at any stage during the sequence of instructions, a write or write attempt is made to a data storage element not indicated by the mask, this is detected in step S240, and the flow proceeds to step S250 to perform some action. In this embodiment, an error signal is sent. However, it will be appreciated that other responses may be appropriate or used in other embodiments. A rollback may be done, including, for example, changing the program counter 270 and/or restoring the values of a subset of data stores as previously described. Numerous other changes or corrective actions apparent to those skilled in the art may be made. Alternatively, if the data processing device does not detect a write to a register not indicated by the mask (ie, a register that is not preserved or backed up), the transaction ends successfully in step S260.

Figure 5 illustrates in flow chart form the use of heuristics in selecting said subset of data repositories. In this example, the data store is considered to be registers that form part of the register file 180 . When the processor executes the transaction start instruction, the process starts in step S100. Accordingly, the initial value of x is initialized or set. In this example, the initial value of x is based on heuristics. In particular, x relates to a counter that is incremented whenever an error occurs as a result of a write request issued to a register in register file 180 that is not saved or backed up by processing circuitry 160 . Having determined the value of x, the set of x registers is preserved in step S110. For example, the set 190 of x registers may be kept in the local cache 110 . The set of x registers 190 is determined in part using knowledge of the calling conventions of instructions executed by the processing circuitry 160 . In particular, if the calling convention indicates always passing parameters and return results using registers in ascending order from r0 to r8, the heuristic is that the set of x registers starts at register r0 and the additional registers are placed in the x register. may be determined to be added sequentially until they are added. In other embodiments, other heuristics may be used to determine how the set of registers is expanded. Before or after the registers are preserved, the mask 200 is updated to reflect the set of registers being backed up. In step S120, a transaction starts. During this phase, a sequence of instructions may be executed by the processing circuitry 160 . However, at any time until the transaction is committed (ie, complete), the registers saved in step S110 can be restored by rolling back. In step S130, it is determined whether or not an error has occurred. In particular, step S130 is performed by the processing circuitry 160 to one of the registers in register file 180 that, at any stage during the transaction, is not part of the subset 190 of registers that were preserved in step S110. Continue testing to see if you try to record. Such an error may be caused by the monitoring circuit 220 or the monitoring and inhibiting circuit 320 . If no such attempt is made during the transaction, the transaction ends in step S160. The end of the transaction may occur implicitly as a result of reaching the end of a block of code, or it may occur explicitly with an end transaction instruction. When the transaction ends, the values of the registers are kept back in main memory so that other processor cores can access the newly updated value. On the other hand, if an error occurs in step S130, the process proceeds to step S140. In step S140, the value of x is incremented by 1 to preserve the next highest register that is not preserved.

In other embodiments, x may be incremented by more than one. This may result in fewer iterations of the loop. However, it may incur the cost of more registers being preserved, which are actually needed.

In some other embodiments, the identity of the erroneously accessed register(s) may be recorded such that the registers are specifically preserved the next time the transaction begins. In step S140, this may be done, for example, by directly changing the mask.

In any case, in step S150, the transaction is aborted. In this embodiment, this updates the program counter 270 with the value of the program counter by the updater 260 when the processing circuit 160 executes the transaction start instruction. Additionally, the set 190 of the registers is restored to values preserved in the previous execution of step S110. In other words, the transaction is rolled back in that the transaction is restarted from the beginning and the values of the subset of registers 190 will be restored to the values held by the registers when the transaction start command was received. Then, when the transaction starts again, the flow proceeds to step S110, and the set of x registers is preserved once more.

Thus, it can be seen in the overall summary that we initially estimate the set of x registers. After that, the transaction proceeds. However, if the transaction fails (ie, the start of the transaction) as a result of an attempt to write by the processing circuitry 160 to a register in a register file 180 that is not part of the subset 190 of registers. If an attempt is made to write to a register that is not preserved at time), an error occurs, the transaction is rolled back, and the set of x registers is expanded. The transaction is then restarted in this new set of registers. This processing may proceed until the transaction ends successfully in step S160. Thus, there is no need to explicitly describe the set of registers that should be preserved, which may not be known, or to preserve the entire set of structural registers.

Although embodiments of the present invention have been described in detail with reference to the accompanying drawings, the present invention is not limited to the specific embodiments thereof, and those skilled in the art can use various methods without departing from the scope and spirit of the present invention as described in the appended claims. You will see that you can make changes, additions, and alterations to the branches. For example, various combinations of the features of the dependent claims and the features of the independent claims may be made without departing from the scope of the present invention.

Claims (22)

a plurality of data storage elements each storing data;
a mask storage circuit for storing the mask;
processing circuitry for executing one or more instructions;
a data saver that, in response to a transaction start command, selects a subset of the data store members to keep a backup of the subset;
mask control circuitry for updating the mask to indicate the subset of the data store elements selected by the data saver; and
and a monitor for detecting writes to one of the data storage elements not indicated by the mask.
The method of claim 1,
and an inhibit circuit for inhibiting writing to one of the data storage elements not indicated by the mask.
3. The method of claim 2,
and a restorer for restoring the data storage element indicated by the mask from the backup.
4. The method of claim 3,
and update circuitry for updating a program counter to indicate the transaction start command or an error handler.
5. The method according to any one of claims 1 to 4,
wherein the monitor is further configured to signal an error in response to detecting a write to one of the data storage elements not indicated by the mask.
5. The method according to any one of claims 1 to 4,
The data storage device is selected by the data saver based on a heuristic analysis performed by the data processing device.
7. The method of claim 6,
wherein the heuristic analysis relies on data amplified by a compiler.
7. The method of claim 6,
wherein the heuristic analysis relies on a calling convention associated with the one or more instructions.
7. The method of claim 6,
wherein the heuristic analysis is dependent on the number of times the monitor has detected a write to one of the data repositories not indicated by the mask.
5. The method according to any one of claims 1 to 4,
and the selected subset of data storage elements is incremented in response to the monitor detecting a write to one of the data storage elements not indicated by the mask.
5. The method according to any one of claims 1 to 4,
wherein the subset of data store members is selected by the data saver in response to a subset definition command.
5. The method according to any one of claims 1 to 4,
wherein the plurality of data storage elements are a plurality of registers.
5. The method according to any one of claims 1 to 4,
wherein the monitor comprises a monitoring circuit.
5. The method according to any one of claims 1 to 4,
wherein the monitor is implemented by monitoring software.
5. The method according to any one of claims 1 to 4,
and the data saver includes a data storage circuit.
5. The method according to any one of claims 1 to 4,
wherein the data saver is implemented by data retention software.
5. The method according to any one of claims 1 to 4,
and the data saver is configured to maintain a backup to a local cache of a subset of the data store member.
5. The method according to any one of claims 1 to 4,
the mask indicates both a set of registers to be preserved and a set of registers to be non-preserved;
and the data store elements are selected by the data saver to include stores identified in the set of registers to be preserved and to exclude those identified in the set of registers to be preserved.
means for storing a plurality of data;
mask storage means for storing the mask;
processing means for executing one or more instructions;
data retention means for selecting a subset of means for storing the plurality of data in response to a transaction start command to preserve a backup of data stored by the subset of means for storing the plurality of data;
mask control means for updating said mask to indicate said subset of means for storing said plurality of data selected by said data preservation means; and
and monitoring means for detecting writing to one of said plurality of data storing means not indicated by said mask.
A data processing method in a data processing apparatus having a plurality of data storage elements for storing data, the data processing method comprising:
in response to a transaction start command, selecting a subset of the data store members;
maintaining a backup of the data stored by the subset of the data repository;
updating a mask to indicate the subset of the data store members; and
and detecting a write to one of the data storage elements not indicated by the mask.
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