KR102274812B1 - Dynamic resistance battery cell equalization apparatus for capacity optimization of parallel connected battery cells - Google Patents

Abstract

The present invention relates to an apparatus for equalizing battery cells, comprising: a plurality of battery cells; a plurality of first resistors, each of which is connected in series with each of the plurality of battery cells; a plurality of second resistors, each of which is connected in series with the respective battery cell and the first resistor; a plurality of first switches, each of which is connected in parallel to each of the second resistors among the plurality of second resistors; and a controller controlling the current flow of each of the battery cells by controlling the plurality of first switches.

Description

DYNAMIC RESISTANCE BATTERY CELL EQUALIZATION APPARATUS FOR CAPACITY OPTIMIZATION OF PARALLEL CONNECTED BATTERY CELLS

The present invention relates to a battery equalization circuit, and more particularly, to a dynamic resistance battery cell equalization device for optimizing the usable capacity of cells connected in parallel.

In a field requiring an energy storage system using a battery, such as a renewable energy system or an electric vehicle, an operating voltage may be increased by connecting a plurality of battery cells in series. Battery cells connected in series may have cell inconsistency at the same temperature and driving conditions as impedance due to non-uniform battery characteristics generated during mass production.

The cell non-uniformity indicates a state in which the state of charge is different between the battery cells, which causes over-discharge and over-charge problems of the battery, which directly affects the safety of the system, and the problem becomes more serious as the battery cells age. In order to solve this problem, various cell equalization techniques for series-connected battery cells are being studied.

On the other hand, a parallel connection configuration in which a plurality of battery cells are connected in parallel may be used to increase the energy capacity because the charging/discharging current increases. However, there have not been many studies on battery equalization of parallel-connected cells, so it is common to use parallel configurations as parallel connections between preselected cells. Accordingly, in the general parallel configuration, a battery mismatch problem may still exist, which may decrease the usable capacity of the battery system.

Recently, battery stability problems such as overcharging or overdischarging due to cell non-uniformity of the battery are emerging, and the optimization of the usable capacity of the battery system is becoming a key issue in the market due to the increase in battery installation cost due to the strengthening of stability. Effective parallel cell equalization is required.

For the equalization of parallel-connected cells, a conventional technology has developed an SOC-based switch sequencing method in which as many switches are placed in parallel and opened and closed sequentially as needed according to the charge/discharge current. At this time, the fuzzy logic control method is used to determine whether each switch is opened or closed, and the number of battery cells connected to the DC bus is automatically adjusted according to the load demand and the SOC ratio. However, in a situation where more battery cells are simultaneously connected to the DC bus due to an increase in load demand, a large number of parallel cells are often directly connected in parallel, so cell non-uniformity continues to exist and the overall equalization performance deteriorates.

Another solution is to add an additional fixed resistor in series with each battery cell to mitigate the impedance difference of the individual battery cells. This fixed resistor balancing method omits a switch compared to the previous method, so that the circuit is simple and the cost can be reduced. However, regular charging and discharging efficiency occurs due to power loss in the added balancing resistor, resulting in low efficiency and unsatisfactory equalization performance due to the difference in self-discharge rates.

In order to improve the equalization performance in the above technique, the balancing resistance must be significantly increased, which in turn entails a decrease in efficiency, so that there is a technical contradiction problem between the efficiency and the equalization performance in the above method. As a result, research on improved equalization technology for parallel-connected battery configuration is required.

[Document 1] Korean Patent Application Laid-Open No. 10-2019-0036242 Battery module equalization device, battery pack and automobile including the same (LG Chemical Co., Ltd.) 2019.04.04.

Accordingly, it is an object of the present invention to achieve capacity optimization of parallel-connected battery cells through a dynamic resistance type battery cell equalization device.

It is also an object of the present invention to provide a dynamic resistance battery cell equalization device capable of improving equalization performance, optimizing battery capacity, and reducing loss dissipation in a parallel battery configuration.

A battery cell equalization apparatus for achieving the above object includes a plurality of battery cells; a plurality of first resistors, each of which is connected in series with each of the plurality of battery cells; a plurality of second resistors, each of which is connected in series with the respective battery cell and the first resistor; a plurality of first switches, each of which is connected in parallel to each of the second resistors among the plurality of second resistors; and a controller controlling the current flow of each of the battery cells by controlling the plurality of first switches.

Preferably, the controller includes a battery management system (BMS).

Preferably, a resistance value of the second resistor is greater than a resistance value of the first resistor.

Preferably, the battery cell equalization apparatus further includes a bidirectional converter connected between the plurality of battery cells and a load.

Preferably, the battery cell equalization device further includes a second switch connected between the bidirectional converter and the load.

Preferably, the controller controls the second switch to control the bidirectional converter to be connected to an external power source in a charging mode.

Preferably, the controller controls the second switch to control the bidirectional converter to be connected to the load in a discharging mode.

Preferably, the controller is characterized in that it checks a state of charge (SOC) rate of each of the battery cells.

Preferably, in the charging mode, the controller controls a first switch corresponding to a battery cell having the largest SOC ratio among the plurality of first switches to be in an off state.

Preferably, in the charging mode, when cell equalization is completed in at least two of the plurality of battery cells in the charging mode, the first switches corresponding to the battery cells for which the cell equalization is completed are alternately turned on or off. control to be

Preferably, the controller controls all of the plurality of first switches to be in an on state when cell equalization of all of the plurality of battery cells is completed in the charging mode.

Preferably, the controller controls a first switch corresponding to a battery cell having the smallest SOC ratio among the plurality of first switches to be in an off state in a discharging mode.

Preferably, in the discharging mode, when cell equalization is completed in at least two or more of the plurality of battery cells in the discharging mode, first switches corresponding to the battery cells for which the cell equalization is completed are alternately turned on or off control to be

Preferably, the controller controls all of the plurality of first switches to be in an on state when cell equalization for all of the plurality of battery cells is completed in the discharging mode.

According to the present invention, by providing an equalization circuit for a parallel-connected battery configuration using a dynamic resistance method, it is possible to improve equalization performance of battery cells, optimize battery capacity, and reduce energy loss due to balancing resistors.

According to the present invention, in a circuit in which a plurality of battery cells are connected in parallel, a given battery capacity can be maximally utilized by controlling a current flowing through each battery cell based on an estimated state of charge (SOC) ratio of the battery cells. Accordingly, as a result, cell inconsistency is minimized and battery life is extended.

1 is a diagram illustrating a circuit in which a plurality of battery cells are connected in parallel.
FIG. 2 is a diagram illustrating an equivalent circuit of FIG. 1 .
3 is a diagram illustrating a conventional SOC-based switch sequencing circuit for battery equalization of parallel cells.
4 is a diagram illustrating a conventional balancing circuit using a fixed resistor for the purpose of battery equalization of parallel cells.
5 is a diagram illustrating a dynamic resistance battery cell equalization circuit for battery equalization of parallel-connected battery cells according to an embodiment of the present invention.
6 is a graph comparing SOC change during a charging operation of a dynamic resistance battery cell equalization circuit according to an embodiment of the present invention with a conventional method.
7 is a graph comparing a battery current change during a charging operation of a dynamic resistance battery cell equalization circuit according to an embodiment of the present invention with a conventional method.
8 is a graph comparing an SOC change during a discharging operation of a dynamic resistance battery cell equalization circuit according to an embodiment of the present invention with a conventional method.
9 is a graph comparing a change in battery current during a discharging operation of a dynamic resistance battery cell equalization circuit according to an embodiment of the present invention with a conventional method.
10 is a graph illustrating a comparison of the time-dependent trend of equalization performance according to an embodiment of the present invention and a conventional method.

Hereinafter, detailed contents for carrying out the present invention will be described based on the embodiments with reference to the drawings. These embodiments are described in sufficient detail to enable those skilled in the art to practice the present invention. It should be understood that various embodiments of the present invention are different but need not be mutually exclusive. For example, certain shapes, structures, and characteristics described herein may be implemented in other embodiments without departing from the spirit and scope of the invention with respect to one embodiment. In addition, it should be understood that the location or arrangement of individual components within each disclosed embodiment may be changed without departing from the spirit and scope of the present invention. Accordingly, the detailed description set forth below is not intended to be taken in a limiting sense, and the scope of the present invention, if properly described, is limited only by the appended claims, along with all scopes equivalent to those claimed by the claims. Like reference numerals in the drawings refer to the same or similar functions throughout the various aspects.

Unless otherwise defined, all terms (including technical and scientific terms) used herein may be used with the meaning commonly understood by those of ordinary skill in the art to which the present invention belongs. In addition, terms defined in a commonly used dictionary are not to be interpreted ideally or excessively unless specifically defined explicitly.

An embodiment of the present invention proposes a dynamic resistance equalization circuit for parallel battery configuration. According to the present invention, for a plurality of battery cells connected in parallel, the equivalent series impedance of individual branches can be changed by controlling the switch of the equalization circuit based on the estimated state of charge (SOC) ratio of each battery cell, Accordingly, it is possible to maximize the use of the SOC by controlling the flow of current flowing to each battery cell connected in parallel.

Hereinafter, various types of battery cell parallel connection circuits will be described before describing an embodiment of the present invention.

1 is a diagram illustrating a circuit in which a plurality of battery cells are connected in parallel, and FIG. 2 is a diagram illustrating an equivalent circuit of FIG. 1 .

Referring to FIG. 1 , a parallel-connected battery cell circuit including three parallel-connected battery cells may be configured. For example, the parallel-connected battery cell circuit includes a first battery cell (B1) 101, a second battery cell (B2) 102, a third battery cell (B3) 103, and a DC/DC converter 110. It may be composed of The first battery cell 101 , the second battery cell 102 , and the third battery cell 103 are connected in parallel to each other, and the DC/DC converter 110 includes the plurality of battery cells 101 , 102 , 103 . ) can be associated with

The power stored in the first battery cell 101 , the second battery cell 102 , and the third battery cell 103 connected in parallel is integrated and transferred to the DC/DC converter 110 , and the DC/DC converter 110 . ) to the voltage appropriate for the load. That is, the DC/DC converter 110 receives the V_bus voltage, converts it into a V_out voltage, and supplies it to the load.

Referring to FIG. 1 as an equivalent circuit, it can be represented as in FIG. 2 . Referring to FIG. 2 , the first battery cell 101 of FIG. 1 may be referred to as the first battery 201 of FIG. 2 , and the first battery cell 201 is a first voltage source (OCV1) 201a. ) and a first equivalent resistor (Rb1) 1201b. The second battery cell 102 of FIG. 1 may be referred to as the second battery 202 of FIG. 2 , wherein the second battery cell 202 includes a second voltage source (OCV2) 202a and a second equivalent resistor. It can be represented by a circuit including (Rb2) 202b. The third battery cell 103 of FIG. 1 may be referred to as the third battery 203 of FIG. 2 , and the third battery cell 203 includes a third voltage source (OCV3) 203a and a third equivalent resistor. It can be represented by a circuit including (Rb3) 203b.

The current combined in the plurality of battery cells 201 , 202 , and 203 may be represented by an equivalent current source (I Load) 210 representing a load current. In this case, the currents I ₁ , I ₂ , and I ₃ branched from each of the battery cells may be expressed by the following <Equation 1>, <Equation 2>, and <Equation 3>, respectively.

Referring to <Equation 1> to <Equation 3>, each branch current (I ₁ , I ₂ , I ₃ ) is the open circuit voltage (OCV _i ) corresponding to each battery cell and the impedance ( R _bi ), which all change during calendar aging. In addition, there is an uncontrolled energy transfer between cells even when the battery system is in idle mode, which is called the so-called self-balancing effect. As a result, the battery may generate additional internal heat, which may cause the cell to ignite, and the equalization performance deteriorates.

3 is a diagram illustrating a conventional SOC-based switch sequencing circuit for battery equalization of parallel cells. Referring to FIG. 3 , the parallel connection circuit of battery cells includes a first battery cell 301 , a second battery cell 302 , a third battery cell 303 , a switch unit 310 , a controller 320 , and an external charging unit. 330 , a voltage source 340 , a DC/DC converter 350 , and a load 360 may be included. The SOC-based switch sequencing according to FIG. 3 controls the respective switches 311, 312, and 313 of the switch unit 310 in the controller 320 to balance the SOC, thereby providing the battery cells 301, 302, 303 to the DC bus. ) are alternately connected or disconnected.

The controller 320 may be configured as a battery management system (BMS), and determines the switching order by measuring the voltage, SOC, and load current of each of the battery cells 301 , 302 , and 302 . At this time, if the charging current or discharging current is higher than the current that one battery cell can handle, several battery cells are directly connected at the same time to prevent over-charging or over-discharging of the cells. In this case, cell non-uniformity still exists, and as the bus voltage changes irregularly, a pulsed battery current flows to each cell at the switching moment.

4 is a diagram illustrating a conventional balancing circuit using a fixed resistor for the purpose of battery equalization of parallel cells. Referring to FIG. 4 , the parallel connection circuit of battery cells includes a first battery cell 301 , a second battery cell 302 , and a third battery cell 303 , and each battery cell has one external resistor 401 . , 402, 403) are connected in series. For example, the first battery cell 301 is connected in series with the first external resistor 401 , the second battery cell 302 is connected in series with the second external resistor 402 , and the third battery cell 303 is It is connected in series with the third external resistor 403 .

The power stored in the first battery cell 301, the second battery cell 302, and the third battery cell 303 connected in parallel is integrated through the external resistors 401, 402, 403, respectively, and a DC/DC converter ( 410), and is converted into a voltage suitable for the load in the DC/DC converter 410.

The circuit of FIG. 4 includes each battery cell 301 , 302 , 303 and external resistors 401 , 402 , 403 connected in series to the outside of the battery cell as shown. If the resistance value of the external resistors 401, 402, 403 additionally installed for cell equalization is sufficiently larger than the internal impedance of the battery cells 301, 302, 303, the cell non-uniformity phenomenon can be almost eliminated and each parallel branch currents are almost the same. However, in order to achieve this performance, a large power loss occurs in the additionally installed external resistor. When the external resistance value is reduced to reduce this, since this again entails degradation of cell equalization performance, there is a technical contradiction problem between efficiency and cell equalization performance in the method.

5 is a diagram illustrating a dynamic resistance battery cell equalization circuit for capacity optimization of parallel-connected battery cells according to an embodiment of the present invention. Referring to FIG. 5 , a parallel connection circuit of battery cells according to an embodiment of the present invention includes a first battery cell 501a, a second battery cell 502a, a third battery cell 503a, a controller 510, and a bidirectional circuit. It may be configured to include a converter 520 .

A first resistor 501b , 502b , 503b and a second resistor 501c , 502c , and 503c may be connected in series to the plurality of battery cells 501a , 502a , and 503a , respectively. That is, the first battery cell 501a may be connected in series with the first-first resistor 501b and the 1-2-th resistor 501c, and the second battery cell 502a has the second-first resistor 502b and A 2-2nd resistor 502c may be connected in series, and the third battery cell 503a may be connected in series with a 3-1 th resistor 503b and a 3-2 th resistor 503c.

The plurality of second resistors 501c, 502c, and 503c may be connected in parallel with the first switches 501d, 502d, and 503d, respectively. That is, the 1-2 th resistor 501c may be connected in parallel with the 1-1 switch 501d, the 2-2 th resistor 502c may be connected in parallel with the 2-1 th switch 502d, and the third The -2 resistor 503c may be connected in parallel with the 3-1 th switch 503d.

The controller 510 may control the current flow of each of the battery cells 501a, 502a, and 503a by controlling the plurality of first switches 501d, 502d, and 503d. The controller 510 may include a battery management system (BMS). According to an embodiment of the present invention, the resistance values of the second resistors 501c, 502c, and 503c for each of the battery cells are designed to be greater than the resistance values of the first resistors 501b, 502b, and 503b.

The parallel connection circuit of battery cells according to the embodiment of the present invention may further include a bidirectional converter 520 connected between the plurality of battery cells 501a, 502a, and 503a and a load 540, A second switch 530 is further included between the bidirectional converter 520 and the load 540 .

The controller 510 controls the second switch 530 to control the bidirectional converter 520 to be connected to the external power source 550 in the charging mode, and in the discharging mode, the bidirectional converter 520 to It is controlled to be connected to the load 540 .

The controller 510 controls a plurality of first switches 501d, 502d, and 503d by checking a state of charge (SOC) rate of each of the battery cells 501a, 502a, and 503a. can do.

According to an embodiment of the present invention, the controller 510, in the charging mode, turns off the first switch corresponding to the battery cell having the largest SOC ratio among the plurality of first switches 501d, 502d, and 503d. state to be controlled. According to an embodiment of the present invention, in the discharging mode, the controller 510 controls a first switch corresponding to a battery cell having the smallest SOC ratio among the plurality of first switches to be in an off state.

When cell equalization is completed in at least two of the plurality of battery cells 501a, 502a, and 503a, the controller 510 includes first switches 501d corresponding to the battery cells for which the cell equalization has been completed; 502d and 503d) are controlled to alternately turn on or off.

The controller 510 controls all of the plurality of first switches 501d, 502d, and 503d to be in an ON state when cell equalization of all of the plurality of battery cells 501a, 502a, and 503a is completed. .

5, the cell equalization circuit according to the embodiment of the present invention includes two resistors (ie, a first resistor and a second resistor) connected in series with each battery cell 501a, 502a, and 503a and one switch. constitute including. The controller 510 may estimate the SOC of each of the battery cells 501a, 502a, and 503a. For example, the controller 510 may estimate the SOC of each battery cell 501a , 502a , and 503a by a Coulomb counting method. The controller 510 determines the switching order of the first switches 501d, 502d, and 503d based on the estimated SOC of each of the battery cells 501a, 502a, and 503a.

The bidirectional converter 520 charges each battery cell 501a, 502a, 503a from an external power source 550 by controlling the second switch 530 under the control of the controller 510, or each battery cell 501a, Discharge energy from 502a and 503a to load 540 . The controller 510 controls the first switches 501d, 502d, and 503d to adjust the current flow of each branch according to the impedance of each of the second resistors 501c, 502c, and 503c arranged in parallel.

According to an embodiment of the present invention, the cell equalization process may be divided into three sections. During the first period, the controller 510 controls all of the first switches 501d, 502d, and 503d to be in an on state, and among the plurality of battery cells 501a, 502a, and 503a, the highest SOC and lowest SOC of A battery cell is identified. Next, in the charging mode, only the first switch corresponding to the battery cell corresponding to the highest SOC is controlled to be in the OFF state, and in the discharging mode, only the first switch corresponding to the battery cell corresponding to the lowest SOC is in the OFF state control to be In the branching of the battery cell in which the first switch is turned off, the first resistor and the second resistor are in the current path at the same time, thereby providing a high impedance path. _{Currents I 1} , I ₂ , and I ₃ branched from each of the battery cells during the first period may be respectively expressed by Equation 4, Equation 5, and Equation 6 below.

Here, the branch impedance Z _i may be expressed by the following <Equation 7> when the switch is in an on state, and may be expressed by <Equation 8> when the switch is in an off state.

When equalization is achieved in two or more battery cells according to the control in the first period, the second period begins. The controller 510 controls the first switches corresponding to the battery cells for which the cell equalization has been completed to be alternately turned on or off in the second period.

When the SOCs of all cells are equalized according to the control in the second period, the controller 510 controls all the first switches to be in the on state during the third period, thereby allowing only the first resistor to be in the current path and the branching provide a low impedance path to the _{Currents I 1} , I ₂ , and I ₃ branched from each of the battery cells during the third period may be approximately expressed by Equation 9 below. where N represents the number of branches connected in parallel.

Although an example in which three battery cells are connected in parallel has been described in FIG. 5 , the present invention is not limited to the three battery cells, and the same may be applied to a case in which four or more battery cells are connected in parallel.

In order to test the performance of the circuit of FIG. 5 according to an embodiment of the present invention, simulations for four 18650 battery cells (3.7V / 2.6Ah) connected in parallel were implemented in Matlab / Simulink. In the above experiment, the first resistance R ₁ = 25mΩ, and the second resistance R ₂ = 1Ω. Simulation results are obtained separately for the charging and discharging processes as described below.

First, the experimental results in the charging process will be described with reference to FIGS. 6 and 7 , and then, the experimental results in the discharging process will be described with reference to FIGS. 8 and 9 .

In the charging process, it is assumed that all cells have the same capacity of 2600 mA, but the initial SOC ratio is different for each battery cell. For example, it is assumed that the SOC of the first battery cell is 5%, the SOC of the second battery cell is 15%, the SOC of the third battery cell is 10%, and the SOC of the fourth battery cell is 30%. The battery system is charged in a constant current-constant voltage (CC-CV) method of 4A / 4.2V.

When the SOC of one of the plurality of battery cells reaches 100%, the charging process is stopped. The simulation results are shown in FIGS. 6 and 7 in comparison with the conventional methods. 6 is a graph comparing the SOC change during the charging operation of the dynamic resistance battery cell equalization circuit according to the embodiment of the present invention with the conventional method, and FIG. 7 is the charging of the dynamic resistance battery cell equalization circuit according to the embodiment of the present invention. It is a graph comparing the battery current change during operation with the conventional method.

The SOC profile in Fig. 6 shows that the charging process is forcibly stopped before all cells are charged in SOC-based sequencing (Fig. 6(a)) and fixed resistor balancing (Fig. 6(b)). On the other hand, in the method proposed according to the embodiment of the present invention, as shown in (c) of FIG. 6 , when the SOC of all cells is equalized and all cells are fully charged at the same time, the charging process is stopped. Therefore, the capacity of the system is fully utilized.

The current profile of Figure 7 further illustrates this situation. Due to the cell non-uniformity among gigabyte battery cells, the charging current is unevenly contributed by individual cells in the SOC-based sequencing method as in FIG. 7(a). Therefore, after cell #4 is fully charged first, the charging process is forcibly stopped. In the fixed resistance balancing method shown in (b) of FIG. 7 , the branch current is maintained almost the same during the charging process. However, due to the non-uniformity of the initial cell-to-cell SOC ratio, cell #2 is fully charged first and the remaining capacity of the remaining cells is wasted. In addition, the power dissipation in the resistor is too high, which reduces the system efficiency.

On the other hand, the current profile in the circuit according to the embodiment of the present invention includes advantages of the two conventional methods (FIG. 7(a) and (b)) as shown in FIG. 7(c). Referring to FIG. 7C , the branch currents are distributed according to the SOC level, and once equalization is achieved, the individual branches provide the same branch current.

Next, an experimental result in the discharge process will be described with reference to FIGS. 8 and 9 .

During the discharging process, the battery system is discharged with a constant current of 4A, and the initial SOC is set to 80%, 100%, 90%, and 70% for each battery cell. When each of the battery cells is completely discharged, the discharging process is stopped. Simulation results are shown in FIGS. 8 and 9 .

Referring to (b) of FIG. 8 , in the fixed resistance balancing method, the initial SOC ratio does not match, so the discharging process is forcibly stopped. Cell #4 is fully discharged, but the remaining energy (10% capacity of cell #2, 20% of cell #3 and 30% of cell #1) is unused. This is because only an excellent discharge current is allowed in each branch as shown in FIG. 9(b).

Referring to FIGS. 8A and 9A , even if all cells are completely discharged at the same time in the SOC-based sequencing method, the currents of the parallel branches are not the same. Also, current spikes occur at each switching time, increasing power dissipation. On the other hand, in the method according to the embodiment of the present invention, referring to FIG. 8C , the battery capacity can be fully utilized while the discharge current is maintained within a range that does not exceed the battery current capacity.

In addition, the circuit according to the embodiment of the present invention is represented by a current profile as shown in Fig. 9 (c). Referring to FIG. 9C , initially, battery cell #4 is easily discharged with the lowest current (first section). At 2000 seconds, when the SOC of cell #2 is the same as that of cell #4, the controller 510 alternately discharges cell #2 and cell #4 according to the SOC comparison algorithm, thereby balancing with the lowest current (second period) ) is maintained. In a similar manner, the lowest current is continuously assigned to cells #2, #3 and #4. When the SOCs of all cells are equalized to each other, the controller 510 controls all the first switches to be in an on state in the third period to evenly distribute the discharge current while minimizing power loss. As a result, the cell non-uniformity problem is completely eliminated and the battery capacity is fully utilized.

Hereinafter, the power loss of the fixed resistance balancing method and the proposed method is calculated and compared based on the simulation result. In the conventional method, the root mean square (RMS) current of each branch is calculated to calculate the switch loss and the resistance loss. The power loss of the equalization resistor may be calculated by Equation 10 below.

In <Equation 10>, R is the first resistor, i _i (t) represents the current of the i-th individual branch, N represents the number of branches connected in parallel, and T represents the time taken for balancing.

In the circuit according to the embodiment of the present invention, since the individual branch impedance according to the switching decision changes with time, it is recorded and used for power calculation. The average power loss in the cell equalization circuit is calculated by Equation 11 below.

In <Equation 11>, i _i (t) is the measured current of each branch; Z _i (t) is the time-dependent impedance of each shunt resistor; T represents the time taken for balancing.

The power loss calculated according to <Equation 10> and <Equation 11> may be expressed as in Table 1 below.

process P _loss (unit: W) Fixed resistance method the present invention charge P ₁ 1.0451 0.0312 P ₂ 0.9959 0.0237 P ₃ 1.0164 0.0268 P ₄ 0.9447 0.0177 ΣP 4.0022 0.0994 Discharge P ₁ 0.9886 0.0676 P ₂ 1.0655 0.0340 P ₃ 1.0264 0.0384 P ₄ 0.9247 0.0627 ΣP 4.0052 0.2027

Referring to <Table 1>, it can be seen that the power loss of the method proposed according to the embodiment of the present invention is smaller than that of the conventional method by 1/19 in the discharging process and 1/40 in the charging process. have.

Equalization performance of the conventional method and the method according to an embodiment of the present invention in the charging and discharging process may be evaluated by the transition of the SOC difference between cells during the equalization process.

10 is a graph showing a time comparison of equalization performance according to an embodiment of the present invention with a conventional method. In the conventional SOC-based sequencing method, the battery cell SOC is not the same, and the SOC difference during operation in both the charging and discharging process is also large. In addition, since the conventional fixed resistor balancing method maintains only the same branch current, the SOC difference does not change during the process.

On the other hand, the method according to an embodiment of the present invention controls the equalization process so that the SOC difference decreases over time. For example, to obtain an SOC difference of 5%, the method according to an embodiment of the present invention takes about 2000 seconds (charging process) and 2800 seconds (discharging process). This means that the equalization speed of the method according to the embodiment of the present invention is faster than that of the existing method. In addition, the SOC difference of the proposed method approaches zero at the end of the charging and discharging process.

As described above, the cell equalization method for the parallel-connected battery configuration using the dynamic resistance technique according to the embodiment of the present invention is controlled to adjust the impedance of the parallel branch according to the SOC state of each battery cell. As confirmed from the above simulation results, the method according to the embodiment of the present invention shows that the battery capacity is maximally utilized in the discharging process and all cells are fully charged in the charging process at the same time. As a result, cell non-uniformity is eliminated, ensuring battery stability and extending lifespan.

Accordingly, the method according to an embodiment of the present invention may improve equalization performance, optimize battery usable capacity, and reduce energy loss. From the estimated state of charge (SOC) ratio of the battery cell and the charge/discharge current, the switch in the equalization circuit is controlled to change the equivalent series impedance of the individual branches, which modulates the current flow to maximize SOC utilization. For example, as shown in FIGS. 6 to 10 , the method according to an embodiment of the present invention can be verified by simulation of a parallel-connected configuration of four 18650 Li-ion battery cells each having 3.7V/2.6Ah, and the The results show that the SOC is balanced within 1% difference, all cells are fully charged or discharged simultaneously, and the branch current is controlled within a limited safe range with less power consumption compared to conventional methods.

The invention has been described above for the purpose of method steps representing the performance of specific functions and their relationships. The boundaries and order of these functional components and method steps have been arbitrarily defined herein for convenience of description. Alternative boundaries and orders may be defined as long as the specific functions and relationships are properly performed. Any such alternative boundaries and orders are therefore within the scope and spirit of the claimed invention. In addition, the boundaries of these functional components have been arbitrarily defined for convenience of description. Alternative boundaries can be defined as long as any important functions are properly performed. Likewise, flowchart blocks may also be arbitrarily defined herein to represent any significant functionality. For extended use, the flowchart block boundaries and order may have been defined and still perform some important function. Alternative definitions of both functional components and flowchart blocks and sequences are therefore within the scope and spirit of the claimed invention.

The invention may also have been described, at least in part, in terms of one or more embodiments. Embodiments of the present invention are used herein to represent the present invention, aspects thereof, features thereof, concepts thereof, and/or examples thereof. A physical embodiment of an apparatus, an article of manufacture, a machine, and/or a process embodying the present invention may embody one or more aspects, features, concepts, examples, etc. described with reference to one or more embodiments described herein. may include Moreover, throughout the drawings, embodiments may incorporate the same or similarly named functions, steps, modules, etc., which may use the same or different reference numbers, as such, the functions, Steps, modules, etc. may be the same or similar functions, steps, modules, etc. or others.

As described above, the present invention has been described with specific matters such as specific components and limited embodiments and drawings, but these are provided to help a more general understanding of the present invention, and the present invention is not limited to the above embodiments. , various modifications and variations are possible from these descriptions by those of ordinary skill in the art to which the present invention pertains.

Therefore, the spirit of the present invention should not be limited to the described embodiments, and not only the claims to be described later, but also all those with equivalent or equivalent modifications to the claims will be said to belong to the scope of the spirit of the present invention. .

101: first battery cell 102: second battery cell
103: third battery cell 110: DC/DC converter
201: first battery cell 201a: first voltage source
201b: first equivalent resistance 202: second battery cell
202a: second voltage source 202b: second equivalent resistance
203: third battery cell 203a: third voltage source
203b: third equivalent resistance 210: current source
301: first battery cell 302: second battery cell
303: third battery cell 310: switch unit
311: first cell switch 312: second cell switch
313: third cell switch 320: controller
330: external charging unit 340: voltage source
350: DC/DC converter 360: load
401: first external resistor 402: second external resistor
403: third external resistor 410: DC/DC converter
501a: first battery cell 501b: 1-1 resistance
501c: 1-2-th resistor 501d: 1-1 switch
502a: second battery cell 502b: 2-1 resistance
502c: 2-2 resistance 502d: 2-1 switch
503a: third battery cell 503b: 3-1 resistance
503c: 3-2 resistance 503d: 3-1 switch
510: controller (BMS) 520: bidirectional converter
530: second switch 540: load
550: external power

Claims (14)

a plurality of battery cells;
a plurality of first resistors, each of which is connected in series with each of the plurality of battery cells;
a plurality of second resistors, each of which is connected in series with the respective battery cell and the first resistor;
a plurality of first switches, each of which is connected in parallel to each of the second resistors among the plurality of second resistors;
a bidirectional converter connected between the plurality of battery cells and a load;
a second switch connected between the bidirectional converter and the load; and
and a controller controlling the current flow of each of the battery cells by controlling the plurality of first switches. According to claim 1, wherein the controller,
A battery cell equalization device comprising a battery management system (BMS). The battery cell equalization device according to claim 1, wherein a resistance value of the second resistor is greater than a resistance value of the first resistor. delete delete The method of claim 1, wherein the controller
By controlling the second switch,
In the charging mode, the battery cell equalization device for controlling the bidirectional converter to be connected to an external power source. The method of claim 1, wherein the controller
By controlling the second switch,
In a discharging mode, controlling the bidirectional converter to be connected to the load, a battery cell equalization device. According to claim 1, wherein the controller,
A battery cell equalization device, characterized in that for checking a state of charge (SOC) rate of each of the battery cells. The method of claim 8, wherein the controller,
In the charging mode, the battery cell equalization apparatus for controlling a first switch corresponding to a battery cell having the largest SOC ratio among the plurality of first switches to be in an off state. The method of claim 9, wherein the controller,
In the charging mode, when cell equalization is completed in at least two of the plurality of battery cells, first switches corresponding to the battery cells for which the cell equalization is completed are alternately turned on or off. Device. The method of claim 10, wherein the controller,
When cell equalization of all of the plurality of battery cells is completed in the charging mode, the battery cell equalization apparatus controls all of the plurality of first switches to be in an on state. The method of claim 8, wherein the controller,
In the discharging mode, the battery cell equalization apparatus for controlling a first switch corresponding to a battery cell having the smallest SOC ratio among the plurality of first switches to be in an off state. The method of claim 12, wherein the controller,
In the discharging mode, when cell equalization is completed in at least two of the plurality of battery cells, first switches corresponding to the battery cells for which the cell equalization is completed are alternately turned on or off. Device. The method of claim 13, wherein the controller,
When cell equalization of all of the plurality of battery cells is completed in the discharging mode, the battery cell equalization apparatus controls all of the plurality of first switches to be in an on state.

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