KR102260300B1 - Control device of synchronous rectifier and power supply - Google Patents

Abstract

The present invention relates to a synchronous rectifier control device and a power supply device.
A power supply device according to the present invention, which has a primary side and a secondary side electrically insulated, the power supply unit for switching the power input to the primary side and transferring it to the secondary side; and performing a rectification switching operation synchronized with the switching of the power supply by using the power formed on the secondary side and transferred to the secondary, rectifying switching at a point in time before the switching switching time of the power supply by a preset time It includes; a synchronous rectifier for switching the operation.

Description

CONTROL DEVICE OF SYNCHRONOUS RECTIFIER AND POWER SUPPLY

The present invention relates to a synchronous rectifier control device and a power supply device.

In recent years, various types of electronic devices, such as computers, display devices, and various control devices, are used in various spaces such as homes, offices, and factories to meet the various needs of users.

In these electronic devices, a power supply for supplying driving power necessary inside or outside to perform various operations that meet the various needs of the user is essentially employed.

In general, a power supply device may employ a switching mode power supply (SMPS) method due to advantages such as power conversion efficiency and miniaturization.

The above-described switching mode power supply type power supply switches the power input to the primary side, transfers the switched power to the secondary side through a transformer, and the secondary side rectifies the received power to direct current suitable for use Power can be output.

On the other hand, in the case of the above-described power supply, a synchronous rectification type power supply that minimizes conduction loss by using a synchronous rectifier (SR) of a switching method synchronized with primary side switching at the secondary side rectifier may be adopted.

In the case of such a synchronous rectification type power supply, the synchronous rectifier is switched on in synchronization with switching off the primary side, and the synchronous rectifier should be switched off in synchronization with the switching on of the primary side. However, as the switching of the synchronous rectifier is delayed, the primary side is switched on During this time the synchronous rectifier is switched on, a so-called overlap phenomenon may occur, which may cause the output power to become unstable and collapse the insulation of the synchronous rectifier or other elements.

In order to prevent such overlapping, a dead-time control technology can be used, but due to various reasons (for example, a change in the primary-side switching frequency, etc.), the dead time (the time between the synchronous rectifier off time and the primary-side switching on time) time interval) tends to fluctuate, and accordingly, there is a case where it cannot be fixedly controlled with an optimal dead time in terms of power system stability and its efficiency.

It is an object of the present invention to provide a synchronous rectifier control device and a power supply device capable of predicting a primary side switching-on time and switching off a secondary-side synchronous rectifier in advance, and controlling the synchronous rectifier with a fixed dead time.

The above object of the present invention is achieved by providing a synchronous rectifier control device and a power supply for controlling the switching operation of the synchronous rectifier on the secondary side to be switched at a point in time that is earlier than the switching switching time of the primary side by a preset time.

In addition, the above object of the present invention is to provide a synchronous rectifier control device and a power supply for determining the switching switching time of the synchronous rectifier using a dual signal waveform (a signal waveform reflecting primary side switching information and a signal waveform reflecting fixed dead time) is achieved by

According to the present invention as described above, it is possible to prevent the stabilization of the output power and the insulation collapse of the device, as well as to significantly prevent a decrease in the power conversion efficiency.

In addition, according to the present invention as described above, it is possible to stabilize the output power without an additional circuit not only in the discontinuous conduction mode (DCM) but also in the continuous conduction mode (CCM).

However, the scope of the present invention is not limited by the above-described effects.

1 is a schematic circuit diagram of a power supply device according to an embodiment of the present invention;
2 is a schematic block diagram of a synchronous rectifier control unit according to an embodiment of the present invention;
3 is a graph showing a signal waveform for a clock generator according to an embodiment of the present invention;
4 is a schematic circuit diagram of a clock generator according to an embodiment of the present invention;
5 is a schematic circuit diagram of an off-time determination unit according to an embodiment of the present invention;
6 is a graph showing signal waveforms for main parts of a synchronous rectifier control unit according to an embodiment of the present invention;
7 is a graph comparing the dead time of the power supply device according to the embodiment of the present invention with the dead time of the existing power supply device.

The operational effects including the technical configuration for the above purpose of the synchronous rectifier control device and the power supply according to the present invention will be clearly understood by the following detailed description with reference to the drawings in which preferred embodiments of the present invention are shown.

In addition, in describing the present invention, if it is determined that a detailed description of a related known technology may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted. In this specification, terms such as first, second, etc. are used to distinguish one component from another component, and the component is not limited by the terms.

1 shows a schematic circuit diagram of a power supply device 100 according to the present embodiment.

As shown in FIG. 1 , the power supply device 100 according to this embodiment may include a power supply unit 120 and a synchronous rectification unit 130 , and may include a primary side and a secondary side electrically insulated from each other. can

In this case, in the power supply device 100 according to the present embodiment, as shown in FIG. 1 , the power supply unit 120 may be formed on the primary side and the secondary side, and the synchronous rectification unit 130 is located on the secondary side. can be formed.

Meanwhile, as shown in FIG. 1 , the power supply device 100 according to the present embodiment may also include a rectifying unit 110 and a signal feedback unit 140 . In this case, the rectifying unit 110 is formed on the primary side. and the signal feedback unit 140 may be formed on the primary side and the secondary side.

The rectifier 110 may rectify the input AC power and deliver it to the power supply 120, and a link capacitor (Clink) is provided at the front end of the power supply 120 to stabilize the rectified power to the power supply ( 120) can be forwarded.

The power supply unit 120 switches power input to the primary side and transmits it to the secondary side, and may include a PWM control unit 121, a snubber circuit 122, a transformer T1, and a power switch SW. have.

The PWM control unit 121 may control switching on/off of the power switch SW according to feedback information from the signal feedback unit 140 .

The snubber circuit 122 may include a capacitor (C), a resistor (R), and a diode (D). Through this configuration, the surplus power generated by the switching on/off of the power switch (SW) is removed. By consuming it, it is possible to suppress the spike voltage generated during switching.

The transformer T1 is magnetically coupled to the primary winding P formed on the primary side and the primary winding P to form a preset turns ratio, and is input to the primary winding P according to the turns ratio. It may include a secondary winding (S) for supplying the secondary side by varying the voltage level of the power supply.

The power switch SW may be connected to one end of the primary winding P, and may convert power by switching on/off the power input to the primary winding P under the control of the PWM control unit 121 .

The synchronous rectifier 130 may rectify the power from the secondary winding S, stabilize it through the capacitor Cout, and then output the output power VOUT.

Prior to this, the synchronous rectifier 130 may include a synchronous rectifier controller 131 capable of controlling switching on/off of the synchronous rectifier SR in synchronization with the switching of the power switch SW.

The synchronous rectifier control unit 131 is a driving signal GSR synchronized with the switching of the power switch SW based on the detection voltage Vsen detected by the detection resistor SRsen of the power transferred to the secondary winding S ) can be provided to the synchronous rectifier (SR). In this case, the synchronous rectifier control unit 131 may operate by receiving the bias power Vbias.

The synchronous rectifier control unit 131 controls the switching on/off of the synchronous rectifier SR based on the voltage Vsen detected by the detection resistor SRsen, and presets the switching on/off of the power switch SW in advance. The synchronous rectification switch SR may be driven in advance in consideration of the prediction and the turn-off time of the synchronous rectifier SR.

In this case, the synchronous rectifier control unit 131, in driving the synchronous rectifier SR, may generate a signal waveform reflecting the fixed dead time together with a signal waveform reflecting the primary side switching information, and a dual signal generated together Using the waveform, it is possible to determine the switching switching time of the synchronous rectifier SR (the switching-off time in the present embodiment). Through this, the synchronous rectifier control unit 131 can control the synchronous rectifier SR with a fixed dead time, which will be described later.

2 is a schematic block diagram of the synchronous rectifier control unit 131 according to an embodiment of the present invention.

As shown in FIG. 2 , the synchronous rectifier control unit 131 according to the present embodiment may include a clock generation unit 131a , an off-time determination unit 131b , and a driving unit 131c .

In this case, the clock generator 131a may include a first clock generator 131a-1 and a second clock generator 131a-2, as shown in FIG. 2 .

3 may show a signal waveform for the clock generator 131a according to an embodiment of the present invention. Referring to FIGS. 1 to 3 , the first clock generator 131a-1 includes a secondary winding. By monitoring the detection voltage Vsen for detecting the power output from S, it is possible to recognize a time point at which the power switch SW of the power supply unit 120 is switched from switching off to switching on.

Accordingly, the first clock generator 131a-1 may generate the first clock signal VDCH1 according to the recognized transition time, and accordingly, as shown in FIG. 3 , the first clock signal VDCH1 ) can reflect the primary side switching information.

Also, the second clock generator 131a - 2 may generate a second clock signal VDCH2 as shown in FIG. 2 .

At this time, as shown in FIG. 3 , the second clock signal VDCH2 may be a clock signal in which a high section of the first clock signal VDCH1 is delayed by a preset time Td.

At this time, the delay time Td may be set to the same length of time as the minimum dead time required for stabilization of the power system (that is, to prevent an overlap phenomenon), and eventually the dead time is fixed according to the setting of the delay time Td. can be determined

Meanwhile, the off-time determiner 131b may determine the switching-off time ΦCE of the synchronous rectifier SR according to the first and second clock signals VDCH1 and VDCH2 from the clock generator 131a.

Also, the driving unit 131c may provide a driving signal GSR for driving the switching operation of the synchronous rectifier SR according to the switching-off time ΦCE output from the off-time determining unit 131b.

4 is a schematic circuit diagram of a clock generator 131a according to an embodiment of the present invention.

The clock generator 131a may include a first clock generator 131a-1 and a second clock generator 131a-2, as shown in FIG. 4 .

First, as shown in FIG. 4 , the first clock generator 131a-1 may include a detector 131a-1-1 and a first clock signal generator 131a-1-2.

The detection unit 131a-1-1 may detect the voltage level of the power output from the secondary winding S.

In this case, the detection voltage Vsen may have a positive voltage level and a negative voltage level according to the switching of the power switch SW.

In addition, as shown in FIG. 4 , the detection unit 131a-1-1 according to the present embodiment detects a point in time when the voltage level of the detection voltage Vsen is a preset reference voltage VREF1 by employing a comparator, for example. can be detected.

In this case, the reference voltage VREF1 may be a time when switching of the power switch SW is switched from on to off or from off to on, that is, a switching switching time of the power switch SW.

In addition, although 4V is exemplified as the level of the reference voltage VREF1 in this embodiment, the present invention is not limited thereto, and any voltage level can be set to the level of the reference voltage VREF1 as long as it is a voltage level that does not generate ground noise. ) can be used as the level of

Meanwhile, the first clock signal generator 131a-1-2 may generate the first clock signal VDCH1 based on the signal output from the detector 131a-1-1, as shown in FIG. 4 . .

At this time, the first clock signal generator 131a-1-2 of the present embodiment, as shown in FIGS. 3 and 4 , the first at the rising edge time point when the power switch SW is switched from switched off to switched on. A clock signal VDCH1 may be generated, and the generated first clock signal VDCH1 may be provided to the off-time determining unit 131b.

Next, the second clock generation unit 131a-2 may include a time delay unit 131a-2-1 and a second clock signal generation unit 131a-2-2 as shown in FIG. 4 . have.

3 and 4 , the time delay unit 131a-2-1 includes a high period in the first clock signal VDCH1 output from the first clock signal generator 131a-1-2. may be delayed by a preset time Td.

At this time, the delay time (Td), as described above, can be set to the same length of time as the minimum dead time required for stabilization of the power system. In the end, depending on the setting of the delay time (Td), the dead time is It can be fixed and determined.

Meanwhile, as shown in FIG. 4 , the second clock signal generating unit 131a-2-2 generates a high section in the first clock signal VDCH1 through the time delay unit 131a-2-1. The second clock signal VDCH1 delayed by the dead time (that is, the delay time Td) may be generated, and the generated second clock signal VDCH2 may also be provided to the off-time determiner 131b.

5 is a schematic circuit diagram of an off-time determination unit 131b according to an embodiment of the present invention, and FIG. 6 is a graph showing signal waveforms for a main part of the synchronous rectification control unit 131 according to an embodiment of the present invention .

As shown in FIG. 5 , the off-time determining unit 131b includes a voltage-current converter 131b-1, a first ramp wave signal generator 131b-2, and a second ramp wave signal generator. It may include a unit 131b-3, a voltage-voltage converter 131b-4, a hold voltage generator 131b-5, and a comparator 131b-6.

First, the voltage-current converter 131b - 1 may convert a preset reference voltage VREF2 into a current.

Next, referring to FIGS. 5 and 6 , the first ramp wave signal generator 131b-2 charges and discharges the current from the voltage-current converter 131b-1 according to the first clock signal VDCH1. Thus, the first ramp wave signal VOSC1 may be generated.

To this end, the first ramp wave signal generating unit 131b - 2 may include a first current mirror mir1 and a first charging/discharging unit CD1 as shown in FIG. 5 .

In this case, the first current mirror mir1 may mirror the current from the voltage-current converter 131b-1.

In addition, the first charging/discharging unit CD1 switches the current mirrored by the first current mirror mir1 according to the first clock signal VDCH1 reflecting the primary-side switching information to charge the first capacitor CR1. discharge, and based on this, it is possible to generate the first ramp wave signal VOSC1.

Accordingly, the first ramp wave signal VOSC output from the first ramp wave signal generator 131b - 2 is a ramp waveform reflecting primary-side switching information, for example, information such as a primary-side switching frequency or period. can be

Next, the second ramp wave signal generator 131b - 3 charges and discharges the current from the voltage-current converter 131b - 1 according to the second clock signal VDCH2 to generate the second ramp wave signal VOSC2 . can create

To this end, the second ramp wave signal generating unit 131b - 3 may include a second current mirror mir2 and a second charging/discharging unit CD2 .

In this case, the second current mirror mir2 may mirror the current from the voltage-current converter 131b-1.

In addition, the second charging/discharging unit CD2 switches the current mirrored by the second current mirror mir2 according to the second clock signal VDCH2 reflecting the delay time Td, that is, the fixed dead time, The capacitor CR2 may be charged and discharged, and the second ramp wave signal VOSC2 may be generated based on this.

In this case, referring to FIG. 6 , the second capacitor CR2 may be completely discharged with the same period Tc as the first capacitor CR1 of the first ramp wave signal generator 131b - 2 . Accordingly, the ramp waveform is generated in the second ramp wave signal VOSC2 later than the first ramp wave signal VOSC1 by the delay time Td.

Accordingly, as shown in FIG. 6 , the second ramp wave signal VOSC2 has a peak voltage proportional to the delay time Td (ie, fixed dead time) rather than the peak voltage Vp of the first ramp wave signal VOSC1 . to make it lower

Next, the voltage-voltage converter 131b - 4 may convert the voltage level of the second ramp wave signal VOSC2 from the second ramp wave signal generator 131b - 3 .

Next, the hold voltage generator 131b - 5 may generate the hold voltage VHOLD based on the ramp wave signal whose voltage level is converted by the voltage-voltage converter 131b - 4 .

At this time, the hold voltage generator 131b-5 is configured to convert the voltages of the ramp wave signals VSAM1 and VSAM2 having voltage levels converted by the plurality of switches S1 and S2 switched on/off according to the switching control signal. Capacitors C1 and C2 can be charged.

The switching control signal may be generated according to the second clock signal VDCH2 to which a fixed dead time (ie, delay time Td) is reflected, and the second clock signal VDCH2 is divided by 1/2 and the phase is reversed to each switch The switching control signal for controlling switching of (S1, S2) may be generated.

In addition, the hold voltage generator 131b-5 may set the voltage of the ramp wave signals VSAM1 and VSAM2 having the converted voltage level as the hold voltage VHOLD and output it to the comparator 131b-6. .

Next, when comparing the voltage level of the hold voltage VHOLD and the first ramp wave signal VOSC1 , the comparator 131b-6 is configured to, for example, the first ramp wave signal VOSC1 as in the present embodiment. When comparing the voltage level of the first ramp wave signal VOSC1 with the hold voltage VHOLD generated from the second ramp wave signal VOSC2 having a lower peak voltage, as shown in FIG. 6 , the power switch ( SW) is switched off from switching off to switching on (a rising edge point of the first clock signal VDCH1) with a preset delay time Td, that is, a point ahead of the fixed dead time by the switching off of the synchronous rectifier. It can be determined as a time point (a rising edge time point in ΦCE of FIG. 6 ).

As a result, the driving unit 131c of the synchronous rectifier control unit 130 generates the driving signal GSR based on the switching-off time ΦCE of the synchronous rectifier as described above, thereby generating the driving signal GSR with a fixed dead time of the synchronous rectifier SR. Switching can be controlled.

As described above, the synchronous rectifier control unit 131 having the above configuration may generate a so-called dual signal waveform that generates a signal waveform in which the fixed dead time is reflected together with the signal waveform in which the primary side switching information is reflected. By using the dual signal waveform, the switching switching time of the synchronous rectifier SR (the switching-off timing in this embodiment) may be determined.

Therefore, the synchronous rectifier control unit 131 of the present embodiment can control the synchronous rectifier SR with a fixed dead time, which is compared with the dead time in the present embodiment with the dead time in the conventional power supply. It can also be clearly seen through

That is, in the case of the conventional power supply device A, referring to FIG. 7 , it can be seen that the dead time is greatly changed as the primary side switching frequency and the like are changed.

On the other hand, in the case of the power supply device B according to the present embodiment, as shown in FIG. 7 , it can be clearly seen that the dead time is maintained almost constant even if the primary side switching frequency is changed.

Therefore, according to the present embodiment, since the minimum dead time necessary for stabilizing the power system can be fixed and set, it is possible to significantly prevent a decrease in power conversion efficiency due to an unnecessarily long dead time.

In addition, since the synchronous rectifier control unit 131 of this embodiment having the above-described configuration can set the dead time required for stabilizing the power system to be fixed, the synchronous rectifier SR is switched off before the power switch SW is switched on to continuously When the power conversion operation is performed in the conduction mode, a situation in which the power switch SW and the synchronous rectifier SR are switched on at the same time, a so-called overlap phenomenon can be prevented.

In addition, in the discontinuous conduction mode, the synchronous rectifier SR may be switched off by selecting a signal at a time point at which a negative voltage is detected in the detection resistor SRsen or a signal at the earliest of the determined switching off time to prevent malfunction.

Therefore, according to the present embodiment, it is possible to stabilize the output power, prevent insulation collapse of the device, and also predict the primary side switching on time to switch off the secondary side synchronous rectifier in advance, so that not only in the discontinuous conduction mode, but also in the discontinuous conduction mode. Even in continuous conduction mode, the output supply can be stabilized without additional circuitry.

The functions of the various elements shown in the drawings of the present invention may be provided through the use of dedicated hardware as well as hardware capable of executing software in association with appropriate software. When provided by a processor, such functionality may be provided by a single dedicated processor, a single shared processor, or a plurality of separate processors, some of which may be shared.

Further, explicit use of the term "controller" should not be construed as referring exclusively to hardware capable of executing software, without limitation, microprocessor (MCU), digital signal processor (DSP) hardware, for storing software. may implicitly include read only memory (ROM), random access memory (RAM), and non-volatile storage.

In the claims of this specification, an element expressed as a means for performing a particular function encompasses any manner of performing the particular function, and such an element is a combination of circuit elements that perform the particular function, or a method for performing the particular function. It may include any form of software, including firmware, microcode, and the like, combined with suitable circuitry to implement the software for the purpose.

References herein to 'one embodiment' of the principles of the invention, etc., and various variations of such expressions, in connection with this embodiment, indicate that a particular feature, structure, characteristic, etc., is included in at least one embodiment of the principles of the present invention. it means.

Thus, the expression 'in one embodiment' and any other variations disclosed throughout this specification are not necessarily all referring to the same embodiment.

In this specification, references to 'connected' or 'connecting' and various variations of these expressions are used in the meaning including being directly connected to another element or indirectly connected through another element.

Also, in this specification, the singular includes the plural unless specifically stated otherwise in the text. In addition, as used herein, a component, step, operation, and element referred to as 'comprises' or 'comprising' refers to the presence or addition of one or more other components, steps, operations, elements, and devices.

So far, with respect to the present invention, the preferred embodiments have been looked at. All embodiments and conditional examples disclosed throughout this specification have been described with the intention of helping those skilled in the art to understand the principles and concepts of the present invention, those skilled in the art. It will be understood that the present invention may be implemented in a modified form without departing from the essential characteristics of the present invention. Therefore, the disclosed embodiments should be considered in an illustrative rather than a restrictive view. The scope of the present invention is indicated in the claims rather than the foregoing description, and all differences within the scope equivalent thereto should be construed as being included in the present invention.

100: power supply 110: rectifying unit
120: power supply 121: PWM control unit
122: snubber circuit 130: synchronous rectification unit
131: synchronous rectifier control unit 131a: clock generation unit
131b: off-time determining unit 131c: driving unit
140: signal feedback unit

Claims (40)

It is formed on the secondary side of a power supply device having an electrically insulated primary side and a secondary side, and controls a rectification switching operation synchronized with the switching of the primary side by using the power transferred to the secondary side, the primary side switching Control to switch the rectification switching operation at a point in time ahead of a preset time than the switching point,
a clock generator for generating a clock signal according to the switching switching time of the primary side and the preset time;
an off-time determining unit configured to determine a switching-off time of the rectification switching operation according to the clock signal from the clock generating unit; and
a driving unit outputting a driving signal for driving the rectification switching operation according to a switching-off time of the off-time determining unit;
A synchronous rectifier control device comprising a.
According to claim 1,
A synchronous rectifier control device for controlling the switching of the rectification switching operation from switching-on to switching-off at a point in time that is earlier than a point in time when the primary side is switched from switching-off to switching-on by the preset time.
delete According to claim 1,
The clock generator,
a first clock generator detecting a voltage level of the power transmitted to the secondary side and generating a first clock signal according to a time point at which the primary side is switched from switching off to switching on; and
a second clock generator configured to generate a second clock signal by delaying the high section of the first clock signal by the preset time;
A synchronous rectifier control device comprising a.
5. The method of claim 4,
The first clock generator,
a detection unit detecting a voltage level of the power transmitted to the secondary side; and
A first clock that generates the first clock signal when the primary side is switched from switched-off to switched-on based on the detection result from the detector, and outputs the generated first clock signal to the off-time determiner signal generator;
A synchronous rectifier control device comprising a.
5. The method of claim 4,
The second clock generator,
a time delay unit delaying the high section of the first clock signal by the preset time; and
a second clock signal generation unit for generating the second clock signal based on the signal output from the time delay unit and outputting the generated second clock signal to the off-time determining unit;
A synchronous rectifier control device comprising a.
5. The method of claim 4,
The off-time determining unit,
a voltage-current converter for converting a preset reference voltage into a current;
a first ramp wave signal generator configured to generate a first ramp wave signal by charging and discharging a current from the voltage-current converter according to the first clock signal;
a second ramp wave signal generator configured to generate a second ramp wave signal by charging and discharging a current from the voltage-current converter according to the second clock signal;
a voltage-voltage converter configured to convert a voltage level of the second ramp wave signal from the second ramp wave signal generator;
a hold voltage generator configured to generate a hold voltage based on the second ramp wave signal whose voltage level is converted by the voltage-voltage converter; and
a comparator that compares the hold voltage from the hold voltage generator with a voltage level of the first ramp wave signal to determine a switching-off time;
A synchronous rectifier control device comprising a.
8. The method of claim 7,
The first ramp wave signal generator,
a first current mirror for mirroring the current from the voltage-current converter; and
a first charging/discharging unit for charging and discharging the current mirrored by the first current mirror in a first capacitor according to the first clock signal to generate the first ramp wave signal;
A synchronous rectifier control device comprising a.
9. The method of claim 8,
The second ramp wave signal generator,
a second current mirror for mirroring the current from the voltage-current converter; and
a second charging/discharging unit charging and discharging the current mirrored by the second current mirror in a second capacitor according to the second clock signal to generate the second ramp wave signal;
A synchronous rectifier control device comprising a.
10. The method of claim 9,
The second capacitor is completely discharged in the same period as the first capacitor.
It is formed on the secondary side of the power supply device having an electrically insulated primary side and secondary side, and detects the switching switching time of the primary side to control the rectification switching operation, but a preset time from the detected switching switching time of the primary side Controls to switch the rectification switching operation at a point in time ahead of time, and determines the switching time of the rectification switching operation based on the dual signal waveform,
a clock generator for generating a clock signal according to the switching switching time of the primary side and the preset time;
an off-time determining unit configured to determine a switching-off time of the rectification switching operation according to the clock signal from the clock generating unit; and
a driving unit outputting a driving signal for driving the rectification switching operation according to a switching-off time of the off-time determining unit;
A synchronous rectifier control device comprising a.
12. The method of claim 11,
A synchronous rectifier control device for controlling the switching of the rectification switching operation from switching-on to switching-off at a point in time that is earlier than a point in time when the primary side is switched from switching-off to switching-on by the preset time.
delete 12. The method of claim 11,
The clock generator,
a first clock generator detecting a voltage level of the power transmitted to the secondary side and generating a first clock signal according to a time point at which the primary side is switched from switching off to switching on; and
a second clock generator configured to generate a second clock signal by delaying the high section of the first clock signal by the preset time;
A synchronous rectifier control device comprising a.
15. The method of claim 14,
The first clock generator,
a detection unit detecting a voltage level of the power transmitted to the secondary side; and
A first clock that generates the first clock signal when the primary side is switched from switched-off to switched-on based on the detection result from the detector, and outputs the generated first clock signal to the off-time determiner signal generator;
A synchronous rectifier control device comprising a.
15. The method of claim 14,
The second clock generator,
a time delay unit delaying the high section of the first clock signal by the preset time; and
a second clock signal generation unit for generating the second clock signal based on the signal output from the time delay unit and outputting the generated second clock signal to the off-time determining unit;
A synchronous rectifier control device comprising a.
15. The method of claim 14,
The off-time determining unit,
a voltage-current converter for converting a preset reference voltage into a current;
a first ramp wave signal generator configured to generate a first ramp wave signal by charging and discharging a current from the voltage-current converter according to the first clock signal;
a second ramp wave signal generator configured to generate a second ramp wave signal by charging and discharging a current from the voltage-current converter according to the second clock signal;
a voltage-voltage converter configured to convert a voltage level of the second ramp wave signal from the second ramp wave signal generator;
a hold voltage generator configured to generate a hold voltage based on the second ramp wave signal whose voltage level is converted by the voltage-voltage converter; and
a comparator that compares the hold voltage from the hold voltage generator with a voltage level of the first ramp wave signal to determine a switching-off time;
A synchronous rectifier control device comprising a.
18. The method of claim 17,
The first ramp wave signal generator,
a first current mirror for mirroring the current from the voltage-current converter; and
a first charging/discharging unit for charging and discharging the current mirrored by the first current mirror in a first capacitor according to the first clock signal to generate the first ramp wave signal;
A synchronous rectifier control device comprising a.
19. The method of claim 18,
The second ramp wave signal generator,
a second current mirror for mirroring the current from the voltage-current converter; and
a second charging/discharging unit charging and discharging the current mirrored by the second current mirror in a second capacitor according to the second clock signal to generate the second ramp wave signal;
A synchronous rectifier control device comprising a.
20. The method of claim 19,
The second capacitor is completely discharged in the same period as the first capacitor.
A power supply having an electrically insulated primary side and a secondary side,
a power supply unit that switches the power input to the primary side and transfers it to the secondary side; and
A rectification switching operation is performed in synchronization with the switching of the power supply unit by using the power formed on the secondary side and transferred to the secondary side, but the rectification switching operation is performed at a time earlier than the switching switching time of the power supply unit by a preset time synchronous rectifier to switch;
including,
The synchronous rectification unit,
a clock generator for generating a clock signal according to a switching switching time of the power supply and the preset time;
an off-time determining unit configured to determine a switching-off time of the rectification switching operation according to the clock signal from the clock generating unit; and
a driving unit outputting a driving signal for driving the rectification switching operation according to a switching-off time of the off-time determining unit;
power supply including
22. The method of claim 21,
The synchronous rectification unit,
A power supply device for switching the rectification switching operation from switching-on to switching-off at a point in time that is earlier than a point in time when the power supply unit is switched from switching-off to switching-on by the preset time.
delete 22. The method of claim 21,
The clock generator,
a first clock generator detecting a voltage level of the power transmitted to the secondary side and generating a first clock signal according to a time point at which the power supply is switched from switching off to switching on; and
a second clock generator configured to generate a second clock signal by delaying the high section of the first clock signal by the preset time;
power supply including
25. The method of claim 24,
The first clock generator,
a detection unit detecting a voltage level of the power transmitted to the secondary side; and
A first clock that generates the first clock signal when the power supply unit is switched from switching-off to switching-on based on the detection result from the detector, and outputs the generated first clock signal to the off-time determiner signal generator;
power supply including
25. The method of claim 24,
The second clock generator,
a time delay unit delaying the high section of the first clock signal by the preset time; and
a second clock signal generation unit for generating the second clock signal based on the signal output from the time delay unit and outputting the generated second clock signal to the off-time determining unit;
power supply including
25. The method of claim 24,
The off-time determining unit,
a voltage-current converter for converting a preset reference voltage into a current;
a first ramp wave signal generator configured to generate a first ramp wave signal by charging and discharging a current from the voltage-current converter according to the first clock signal;
a second ramp wave signal generator configured to generate a second ramp wave signal by charging and discharging a current from the voltage-current converter according to the second clock signal;
a voltage-voltage converter configured to convert a voltage level of the second ramp wave signal from the second ramp wave signal generator;
a hold voltage generator configured to generate a hold voltage based on the second ramp wave signal whose voltage level is converted by the voltage-voltage converter; and
a comparator that compares the hold voltage from the hold voltage generator with a voltage level of the first ramp wave signal to determine a switching-off time;
power supply including
28. The method of claim 27,
The first ramp wave signal generator,
a first current mirror for mirroring the current from the voltage-current converter; and
a first charging/discharging unit for charging and discharging the current mirrored by the first current mirror in a first capacitor according to the first clock signal to generate the first ramp wave signal;
power supply including
29. The method of claim 28,
The second ramp wave signal generator,
a second current mirror for mirroring the current from the voltage-current converter; and
a second charging/discharging unit charging and discharging the current mirrored by the second current mirror in a second capacitor according to the second clock signal to generate the second ramp wave signal;
power supply including
30. The method of claim 29,
The second capacitor is completely discharged in the same period as the first capacitor.
A power supply having an electrically insulated primary side and a secondary side,
a power supply unit that switches the power input to the primary side and transfers it to the secondary side; and
Formed on the secondary side, the rectification switching operation is performed by detecting the switching switching time of the power supply unit, and switching the rectification switching operation at a time prior to the detected switching switching time of the power supply by a preset time, a dual signal a synchronous rectifier for determining a switching time of the rectification switching operation based on a waveform;
including,
The synchronous rectifier
a clock generator for generating a clock signal according to a switching switching time of the power supply and the preset time;
an off-time determining unit configured to determine a switching-off time of the rectification switching operation according to the clock signal from the clock generating unit; and
a driving unit outputting a driving signal for driving the rectification switching operation according to a switching-off time of the off-time determining unit;
power supply including
32. The method of claim 31,
The synchronous rectification unit,
A power supply device for switching the rectification switching operation from switching-on to switching-off at a point in time that is earlier than a point in time when the power supply unit is switched from switching-off to switching-on by the preset time.
delete 32. The method of claim 31,
The clock generator,
a first clock generator detecting a voltage level of the power transmitted to the secondary side and generating a first clock signal according to a time point at which the power supply is switched from switching off to switching on; and
a second clock generator configured to generate a second clock signal by delaying the high section of the first clock signal by the preset time;
power supply including
35. The method of claim 34,
The first clock generator,
a detection unit detecting a voltage level of the power transmitted to the secondary side; and
A first clock that generates the first clock signal when the power supply unit is switched from switching-off to switching-on based on the detection result from the detector, and outputs the generated first clock signal to the off-time determiner signal generator;
power supply including
35. The method of claim 34,
The second clock generator,
a time delay unit delaying the high section of the first clock signal by the preset time; and
a second clock signal generation unit for generating the second clock signal based on the signal output from the time delay unit and outputting the generated second clock signal to the off-time determining unit;
power supply including
35. The method of claim 34,
The off-time determining unit,
a voltage-current converter for converting a preset reference voltage into a current;
a first ramp wave signal generator configured to generate a first ramp wave signal by charging and discharging a current from the voltage-current converter according to the first clock signal;
a second ramp wave signal generator configured to generate a second ramp wave signal by charging and discharging a current from the voltage-current converter according to the second clock signal;
a voltage-voltage converter configured to convert a voltage level of the second ramp wave signal from the second ramp wave signal generator;
a hold voltage generator configured to generate a hold voltage based on the second ramp wave signal whose voltage level is converted by the voltage-voltage converter; and
a comparator that compares the hold voltage from the hold voltage generator with a voltage level of the first ramp wave signal to determine a switching-off time;
power supply including
38. The method of claim 37,
The first ramp wave signal generator,
a first current mirror for mirroring the current from the voltage-current converter; and
a first charging/discharging unit for charging and discharging the current mirrored by the first current mirror in a first capacitor according to the first clock signal to generate the first ramp wave signal;
power supply including
39. The method of claim 38,
The second ramp wave signal generator,
a second current mirror for mirroring the current from the voltage-current converter; and
a second charging/discharging unit charging and discharging the current mirrored by the second current mirror in a second capacitor according to the second clock signal to generate the second ramp wave signal;
power supply including
40. The method of claim 39,
The second capacitor is completely discharged in the same period as the first capacitor.

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