KR102215822B1 - Unit pixel of image sensor, image sensor including the same and method of manufacturing image sensor - Google Patents

Abstract

The unit pixel of the image sensor includes a photoelectric conversion region, a first floating diffusion region, a transfer gate, a second floating diffusion region, and a double conversion gain gate. The photoelectric conversion region is formed in the semiconductor substrate and collects photocharges based on incident light. The first floating diffusion region is formed in the semiconductor substrate to be spaced apart from the photoelectric conversion region. The transfer gate is formed on the semiconductor substrate and transfers photocharges to the first floating diffusion region based on the transfer control signal. The second floating diffusion region is formed in the semiconductor substrate to be spaced apart from the first floating diffusion region. The double conversion gain gate is formed vertically from the first surface of the semiconductor substrate to be adjacent to the first and second floating diffusion regions, and selectively transfers photocharges to the second floating diffusion region based on the double conversion gain control signal. .

Description

A unit pixel of an image sensor, an image sensor including the same, and a method of manufacturing an image sensor {UNIT PIXEL OF IMAGE SENSOR, IMAGE SENSOR INCLUDING THE SAME AND METHOD OF MANUFACTURING IMAGE SENSOR}

The present invention relates to an image sensor, and more particularly, to a unit pixel of an image sensor, an image sensor including at least one unit pixel, and a method of manufacturing the image sensor.

An image sensor is a semiconductor device that converts incident light incident from the outside into an electric signal, and provides image information corresponding to the incident light. In general, a unit pixel of an image sensor includes a photoelectric conversion region for converting the incident light into the electric signal. Among various parameters representing the performance of an image sensor, a conversion gain indicates the efficiency of converting charges collected in the photoelectric conversion region into an output voltage. The conversion gain of the image sensor may be determined by a capacitance related to a floating diffusion region included in a unit pixel of the image sensor.

One object of the present invention is to provide a unit pixel of an image sensor capable of effectively adjusting a conversion gain.

Another object of the present invention is to provide an image sensor including the unit pixel.

Another object of the present invention is to provide a method of manufacturing the image sensor.

To achieve the above object, a unit pixel of an image sensor according to embodiments of the present invention includes a photoelectric conversion region, a first floating diffusion region, a transfer gate, a second floating diffusion region, and a double conversion gain gate. The photoelectric conversion region is formed in a semiconductor substrate and collects photocharges based on incident light. The first floating diffusion region is formed in the semiconductor substrate to be spaced apart from the photoelectric conversion region. The transfer gate is formed on the semiconductor substrate between the photoelectric conversion region and the first floating diffusion region, and transfers the photocharges to the first floating diffusion region based on a transmission control signal. The second floating diffusion region is formed in the semiconductor substrate to be spaced apart from the photoelectric conversion region and the first floating diffusion region. The double conversion gain gate is formed vertically from the first surface of the semiconductor substrate to be adjacent to the first and second floating diffusion regions, and the photocharges are transferred to the second floating diffusion region based on a double conversion gain control signal. Selectively send to.

The double conversion gain gate may include at least one lower region and an upper region. The at least one lower region may be formed inside the semiconductor substrate, and at least a portion may be included in the semiconductor substrate and surrounded by the semiconductor substrate. The upper region may be formed on the first surface of the semiconductor substrate to be connected to the at least one lower region.

The depth of the at least one lower region of the double conversion gain gate may be smaller than that of the first and second floating diffusion regions.

In an embodiment, as the depth of the at least one lower region of the double conversion gain gate increases, the conversion gain of the unit pixel may decrease.

In an embodiment, as the number of the at least one lower region of the double conversion gain gate increases, the conversion gain of the unit pixel may decrease and decrease.

In an embodiment, a lower surface of the at least one lower region of the double conversion gain gate may be flat, and a lower edge of the at least one lower region of the double conversion gain gate may be round.

A radius of curvature of a lower edge of the at least one lower region of the double conversion gain gate may have a value between 10 nm and 100 nm.

The unit pixel may further include a reset gate. The reset gate is formed on the semiconductor substrate and may reset the first and second floating diffusion regions based on a reset signal.

In one embodiment, the first floating diffusion region is formed in the semiconductor substrate between the transfer gate and the double conversion gain gate, and the second floating diffusion region is the semiconductor between the double conversion gain gate and the reset gate. It can be formed in the substrate.

In an embodiment, the first floating diffusion region may be formed in the semiconductor substrate between the transfer gate and the double conversion gain gate and between the transfer gate and the reset gate.

In an embodiment, the double conversion gain control signal may be selectively activated according to the illuminance of the incident light.

In an embodiment, the double conversion gain control signal may be selectively activated based on an externally applied user setting signal.

The unit pixel may further include an output unit. The output unit is connected to the first floating diffusion region and may generate a pixel signal corresponding to the incident light based on the photocharges.

The output unit may include a drive transistor and a selection transistor. The drive transistor may include a first terminal connected to a power voltage, a control terminal connected to the first floating diffusion region, and a second terminal. The selection transistor may include a first terminal connected to a second terminal of the driving transistor, a control terminal to which a selection signal is applied, and a second terminal to output the pixel signal.

In order to achieve the above other object, an image sensor according to embodiments of the present invention includes a pixel array and a signal processing unit. The pixel array includes a plurality of unit pixels, and generates a plurality of pixel signals based on incident light. The signal processor generates image data based on the plurality of pixel signals. Each of the plurality of unit pixels includes a photoelectric conversion region, a first floating diffusion region, a transfer gate, a second floating diffusion region, and a double conversion gain gate. The photoelectric conversion region is formed in a semiconductor substrate and collects photocharges based on the incident light. The first floating diffusion region is formed in the semiconductor substrate to be spaced apart from the photoelectric conversion region. The transfer gate is formed on the semiconductor substrate between the photoelectric conversion region and the first floating diffusion region, and transfers the photocharges to the first floating diffusion region based on a transmission control signal. The second floating diffusion region is formed in the semiconductor substrate to be spaced apart from the photoelectric conversion region and the first floating diffusion region. The double conversion gain gate is formed vertically from the first surface of the semiconductor substrate to be adjacent to the first and second floating diffusion regions, and the photocharges are transferred to the second floating diffusion region based on a double conversion gain control signal. Selectively send to.

In an embodiment, the signal processing unit may include an operation mode detection unit that automatically determines an operation mode of the image sensor based on an illuminance of the incident light and a reference illuminance. When the illuminance of the incident light is higher than the reference illuminance, the signal processor activates the double conversion gain control signal, and when the illuminance of the incident light is lower than or equal to the reference illuminance, the signal processor Can be disabled.

In an embodiment, the signal processor may receive a user setting signal for setting an operation mode of the image sensor. When the user-set signal corresponds to a high-illuminance operation mode, the signal processing unit activates the double conversion gain control signal, and when the user-set signal corresponds to a low-illuminance operation mode, the signal processing unit controls the double conversion gain. You can disable the signal.

In order to achieve the another object, in the method of manufacturing an image sensor according to embodiments of the present invention, a photoelectric conversion region in a semiconductor substrate, a first floating diffusion region spaced apart from the photoelectric conversion region, and the photoelectric conversion region, and A second floating diffusion region spaced apart from the first floating diffusion region is formed. A recess is formed by removing a portion of the semiconductor substrate between the first floating diffusion region and the second floating diffusion region. A transfer gate is formed on the semiconductor substrate between the photoelectric conversion region and the first floating diffusion region. A double conversion gain gate is formed vertically from the first surface of the semiconductor substrate by filling the recess and adjacent to the first and second floating diffusion regions.

In one embodiment, a lower surface of the recess may be flat, and a lower edge of the recess may be round.

The radius of curvature of the lower edge of the recess may have a value between 10 nm and 100 nm.

In an embodiment, a first insulating layer may be further formed on the first surface of the semiconductor substrate.

In an embodiment, a unit pixel region may be defined by further forming a device isolation region perpendicular to the first surface of the semiconductor substrate. The photoelectric conversion region, the first and second floating diffusion regions, the transfer gate, and the double conversion gain gate may be formed in the unit pixel region.

The device isolation region may be formed from a first surface of the semiconductor substrate to a second surface opposite to the first surface of the semiconductor substrate.

In an embodiment, a color filter may be further formed on the second surface of the semiconductor substrate opposite to the first surface. A micro lens may be further formed on the color filter.

In an embodiment, a first insulating layer may be further formed between the second surface of the semiconductor substrate and the color filter.

In an embodiment, a color filter may be further formed on the first surface of the semiconductor substrate. A micro lens may be further formed on the color filter.

The unit pixel of the image sensor according to the embodiments of the present invention as described above is formed vertically from the first surface of the semiconductor substrate so as to be adjacent to the first and second floating diffusion regions (ie, having a vertical structure). Including a conversion gain gate, by selectively activating a double conversion gain control signal applied to the double conversion gain gate according to an operation mode or a use environment, the unit pixel and the image sensor including the same without loss of area of the photoelectric conversion region The conversion gain can be effectively adjusted.

1 is a cross-sectional view illustrating a unit pixel of an image sensor according to embodiments of the present invention.
2 and 3 are cross-sectional views illustrating a unit pixel of an image sensor according to example embodiments.
4 is a circuit diagram illustrating an example of a unit pixel of FIG. 1.
5 is a cross-sectional view illustrating a structure of a unit pixel of FIG. 4.
6A and 6B are diagrams for describing an operation of the unit pixel of FIG. 5.
7 is a circuit diagram illustrating another example of the unit pixel of FIG. 1.
8 and 9 are cross-sectional views illustrating a structure of a unit pixel of FIG. 7.
10A and 10B are diagrams for describing an operation of a unit pixel according to embodiments of the present invention.
11 is a cross-sectional view illustrating a unit pixel of an image sensor according to example embodiments.
12A, 12B, 12C, 12D, 12E and 12F are cross-sectional views illustrating an example of a method of manufacturing the unit pixel of FIG. 11 and an image sensor including the same.
13 is a cross-sectional view illustrating a unit pixel of an image sensor according to example embodiments.
14 is a cross-sectional view showing an enlarged portion A of FIG. 13.
15A, 15B, 15C, and 15D are cross-sectional views illustrating an example of a method of manufacturing the unit pixel of FIG. 13 and an image sensor including the same.
16, 17, 18, 19, 20, and 21 are cross-sectional views illustrating a unit pixel of an image sensor according to embodiments of the present invention.
22 is a block diagram illustrating an image sensor including a unit pixel according to embodiments of the present invention.
23 is a flowchart illustrating an operation of the image sensor of FIG. 22.
24 is a block diagram illustrating an image sensor including a unit pixel according to example embodiments.
25 is a flowchart illustrating an operation of the image sensor of FIG. 24.
26 is a block diagram illustrating a computing system including an image sensor according to embodiments of the present invention.
27 is a block diagram illustrating an example of an interface used in the computing system of FIG. 26.

With respect to the embodiments of the present invention disclosed in the text, specific structural or functional descriptions have been exemplified only for the purpose of describing the embodiments of the present invention, and the embodiments of the present invention may be implemented in various forms. It should not be construed as being limited to the embodiments described in.

Since the present invention can apply various changes and have various forms, specific embodiments will be illustrated in the drawings and described in detail in the text. However, this is not intended to limit the present invention to a specific form of disclosure, it is to be understood as including all changes, equivalents, or substitutes included in the spirit and scope of the present invention.

Terms such as first and second may be used to describe various elements, but the elements should not be limited by the terms. The terms may be used for the purpose of distinguishing one component from another component. For example, without departing from the scope of the present invention, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component.

When a component is referred to as being "connected" or "connected" to another component, it is understood that it may be directly connected or connected to the other component, but other components may exist in the middle. Should be. On the other hand, when a component is referred to as being "directly connected" or "directly connected" to another component, it should be understood that there is no other component in the middle. Other expressions describing the relationship between components, such as "between" and "just between" or "adjacent to" and "directly adjacent to" should be interpreted as well.

The terms used in the present application are only used to describe specific embodiments, and are not intended to limit the present invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In the present application, terms such as "comprise" or "have" are intended to designate the presence of a set feature, number, step, action, component, part, or combination thereof, and one or more other features or numbers It is to be understood that the possibility of addition or presence of, steps, actions, components, parts, or combinations thereof is not preliminarily excluded.

Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which the present invention belongs. Terms as defined in a commonly used dictionary should be interpreted as having a meaning consistent with the meaning of the context of the related technology, and should not be interpreted as an ideal or excessively formal meaning unless explicitly defined in this application. .

Meanwhile, when a certain embodiment can be implemented differently, a function or operation specified in a specific block may occur differently from the order specified in the flowchart. For example, two consecutive blocks may actually be executed at the same time, or the blocks may be executed in reverse depending on a related function or operation.

Hereinafter, preferred embodiments of the present invention will be described in more detail with reference to the accompanying drawings. The same reference numerals are used for the same elements in the drawings, and duplicate descriptions for the same elements are omitted.

The image sensor is a semiconductor device that converts light incident from the outside (hereinafter, incident light) into an electric signal, and may be classified into a charge coupled device (CCD) image sensor, a complementary metal oxide semiconductor (CMOS) image sensor, and the like. Hereinafter, embodiments of the present invention will be described centering on a CMOS image sensor, but embodiments of the present invention can be equally applied to any image sensor such as a CCD image sensor.

1 is a cross-sectional view illustrating a unit pixel of an image sensor according to embodiments of the present invention.

Referring to FIG. 1, a unit pixel 100 of an image sensor includes a photoelectric conversion region PD, a first floating diffusion region FD1, a transfer gate TG, and a second floating diffusion region formed on a semiconductor substrate 101. (FD2) and a double conversion gain gate (DG). The unit pixel 100 may further include an output unit 170.

The semiconductor substrate 101 may include a first surface 101a and a second surface 101b facing the first surface 101a. For example, the semiconductor substrate 101 may include a semiconductor layer formed through an epitaxial process.

The photoelectric conversion region PD is formed in the semiconductor substrate 101 and collects photocharges generated based on incident light. For example, electron-hole pairs corresponding to the incident light are generated, and the photoelectric conversion region PD may collect these electrons or holes.

For convenience of explanation, in FIG. 1, the photoelectric conversion region PD is illustrated as a photo diode, but the photoelectric conversion region PD is a photodiode, a photo transistor, a photo gate, and a pinned photo. A diode (pinned photo diode; PPD), or a combination thereof may be included.

The first floating diffusion region FD1 is formed in the semiconductor substrate 101 to be spaced apart from the photoelectric conversion region PD. The transfer gate TG is formed on the semiconductor substrate 101 between the photoelectric conversion region PD and the first floating diffusion region FD1.

The photocharges collected in the photoelectric conversion region PD based on the transmission control signal TX applied to the transmission gate TG are transmitted to the first floating diffusion region FD1. In other words, the transfer gate TG has a structure for transferring the photocharges from the photoelectric conversion region PD to the first floating diffusion region FD1. Specifically, the photoelectric conversion region PD and the first floating diffusion region FD1 may be electrically connected in response to the transmission control signal TX. Such an electrical connection may be a channel formed in the semiconductor substrate 101 between the two regions PD and FD1. Depending on the embodiment, the channel may be a surface channel or a buried channel.

The second floating diffusion region FD2 is formed in the semiconductor substrate 101 to be spaced apart from the photoelectric conversion region PD and the first floating diffusion region FD1. The double conversion gain gate DG is vertically formed from the first surface 101a of the semiconductor substrate 101 so as to be adjacent to the first and second floating diffusion regions FD1 and FD2. In other words, the double conversion gain gate DG may have a vertical gate structure formed between the first floating diffusion region FD1 and the second floating diffusion region FD2.

The photocharges are selectively transmitted to the second floating diffusion region FD2 based on the double conversion gain control signal DX applied to the double conversion gain gate DG. In other words, the double conversion gain gate DG has a structure for transferring the photocharges from the photoelectric conversion region PD through the first floating diffusion region FD1 to the second floating diffusion region FD2. Specifically, as described above, the photoelectric conversion region PD and the first floating diffusion region FD1 are electrically connected in response to the transmission control signal TX, and the first The floating diffusion region FD1 and the second floating diffusion region FD2 may be electrically connected. Such an electrical connection may be a channel formed in the semiconductor substrate 101 between the two regions FD1 and FD2.

The output unit 170 is connected to the first floating diffusion region FD1 and may generate a pixel signal VPIX corresponding to the incident light based on the photocharges. As described above, the first floating diffusion region FD1 receives the photocharges through the transfer gate TG, and the second floating diffusion region FD2 includes the transfer gate TG and the double conversion gain gate DG. Through the photoelectric charge can be received. The output unit 170 corresponds to image data based on the electric charge of the photocharges transferred to the first floating diffusion region FD1 or the electric charge of the photocharges transferred to the first and second floating diffusion regions FD1 and FD2. A pixel signal VPIX may be generated.

Although not shown, the unit pixel 100 includes an insulating capping layer (not shown) covering the upper surfaces of the gate structures TG and DG and/or an insulating spacer (not shown) covering the sidewalls of the gate structures TG and DG. ) May be further included.

According to an embodiment, the double conversion gain control signal DX may be selectively activated according to the illuminance of the incident light or a user setting signal applied from the outside. When the unit pixel operates in the read mode, when the double conversion gain control signal DX is deactivated, only the first floating diffusion region FD1 is used as a storage region of the photocharges, and the double conversion gain control signal DX When is activated, both the first and second floating diffusion regions FD1 and FD2 may be used as storage regions of the photocharges. Depending on whether the double conversion gain control signal DX is activated or not, the capacitance of the storage area (for example, the floating diffusion area) of the photocharges in the read mode is adjusted, and thus the photocharges are converted into pixels in a unit pixel. A conversion gain representing the efficiency of conversion to the signal VPIX can be effectively adjusted. The operation of the unit pixel depending on whether the double conversion gain control signal DX is activated will be described in more detail later with reference to FIGS. 6A, 6B, 10A, and 10B.

In one embodiment, the double conversion gain gate DG may be divided into at least one bottom portion (BP) and a top portion (TP) as illustrated by a dotted line in FIG. 1. At least one lower region BP may be a portion formed in the semiconductor substrate 101 and surrounded by the semiconductor substrate 101. In other words, at least a portion of at least one lower region BP may be included in the semiconductor substrate 101. The upper region TP may be a portion formed on the first surface 101a of the semiconductor substrate 101 and connected to at least one lower region BP. The at least one lower region BP and the upper region TP may be formed substantially simultaneously using the same process (eg, deposition and/or patterning process). The structure of at least one lower region BP may be variously changed according to exemplary embodiments, and this will be described in more detail later with reference to FIGS. 2 and 3.

In an embodiment, a depth of at least one lower region BP of the double conversion gain gate DG may be smaller than a depth of the first and second floating diffusion regions FD1 and FD2. Specifically, the depth D1 representing the distance from the first surface 101a of the semiconductor substrate 101 to the end surface of the at least one lower region BP is the first surface of the semiconductor substrate 101 ( It may be smaller than the depth D2 representing a distance from 101a) to the longitudinal sections of the first and second floating diffusion regions FD1 and FD2. In this case, in response to the double conversion gain control signal DX, the lower portion of the at least one lower region BP of the semiconductor substrate 101 and the region between the first and second floating diffusion regions FD1 and FD2 Channels can be formed.

The unit pixel 100 of the image sensor according to the embodiments of the present invention is vertically from the first surface 101a of the semiconductor substrate 101 so as to be adjacent to the first and second floating diffusion regions FD1 and FD2. And a double conversion gain gate DG formed. Since the double conversion gain gate DG has a vertical gate structure, a surface area of the double conversion gain gate DG and the semiconductor substrate 101 in contact with each other increases. Therefore, compared to the case where the double conversion gain gate has a planar gate structure, when the double conversion gain control signal DX is activated, the storage area of the photocharges in the read mode (for example, the unit The capacitance for the floating diffusion region of the pixel 100 may increase further. As a result, the conversion gain of the unit pixel 100 can be effectively adjusted based on the double conversion gain control signal DX without loss of the area of the photoelectric conversion region PD (that is, without reducing the fill factor). have.

2 and 3 are cross-sectional views illustrating a unit pixel of an image sensor according to example embodiments.

Referring to FIG. 2, the unit pixel 100a of the image sensor is a photoelectric conversion region PD, a first floating diffusion region FD1, a transfer gate TG, and a second floating diffusion region formed on the semiconductor substrate 101. It includes (FD2) and a double conversion gain gate (DG'), and may further include an output unit 170.

The photoelectric conversion region PD, first and second floating diffusion regions FD1 and FD2, the transfer gate TG, and the output unit 170 of FIG. 2 are the photoelectric conversion region PD of FIG. The second floating diffusion regions FD1 and FD2, the transfer gate TG, and the output unit 170 may be substantially the same, respectively.

The double conversion gain gate DG' is vertically formed from the first surface 101a of the semiconductor substrate 101 so as to be adjacent to the first and second floating diffusion regions FD1 and FD2. The double conversion gain gate DG' is divided into at least one lower region BP' and an upper region TP, and at least one lower region BP' may be formed relatively deeply. In other words, the depth of at least one lower region BP' of the double conversion gain gate DG' of FIG. 2 is greater than the depth of at least one lower region BP of the double conversion gain gate DG of FIG. 1. I can.

In an embodiment, as the depth of at least one lower region of the double conversion gain gate increases, the conversion gain of the unit pixel according to the embodiments of the present invention may decrease. For example, the depth D1' representing the distance from the first surface 101a of the semiconductor substrate 101 to the longitudinal surface of the at least one lower region BP' of FIG. 2 is the first surface of the semiconductor substrate 101 It may be deeper than the depth D1 representing a distance from the surface 101a to the longitudinal section of the at least one lower region BP of FIG. 1. In this case, the surface area in contact between the double conversion gain gate DG' of FIG. 2 and the semiconductor substrate 101 is larger than the surface area in contact with the double conversion gain gate DG and the semiconductor substrate 101 of FIG. When the double conversion gain control signal DX is activated, the capacitance for the floating diffusion region of the unit pixel 100a of FIG. 2 may increase more than the capacitance for the floating diffusion region of the unit pixel 100 of FIG. 1. have. As will be described later with reference to FIGS. 6A and 6B, since the conversion gain of the unit pixel is inversely proportional to the capacitance of the floating diffusion region of the unit pixel, the unit pixel of FIG. 2 when the double conversion gain control signal DX is activated. The conversion gain of (100a) may be smaller than the conversion gain of the unit pixel 100 of FIG. 1.

As described above with reference to FIGS. 1 and 2, the depth of the vertical double conversion gain gate DG' included in the unit pixel according to the exemplary embodiment of the present invention is the first and second floating diffusion regions FD1 and FD2. It can be changed variously in a range shallower than the depth of ). In one embodiment, the depth of at least one lower region BP' of the double conversion gain gate DG' may be smaller than half of the depth of the first and second floating diffusion regions FD1 and FD2. have. In other words, the depth D1' may be greater than 0 and less than half of the depth D2, that is, less than D2/2. In another embodiment, the depth of at least one lower region BP' of the double conversion gain gate DG' is greater than or equal to half of the depth of the first and second floating diffusion regions FD1 and FD2, and It may be shallower than the depth of the first and second floating diffusion regions FD1 and FD2. In other words, the depth D1 ′ may be half the depth D2, that is, greater than or equal to D2/2 and less than the depth D2. Depending on the embodiment, the depth of the first floating diffusion region FD1 and the depth of the second floating diffusion region FD2 may be different. In this case, at least one lower region of the double conversion gain gate DG′ ( The depth of BP′) may be shallower than a shallow depth among the depths of the first and second floating diffusion regions FD1 and FD2.

Meanwhile, although not shown, the depth of at least one lower region of the double conversion gain gate may be implemented to be greater than or equal to the depth of the first and second floating diffusion regions FD1 and FD2.

Referring to FIG. 3, the unit pixel 100b of the image sensor includes a photoelectric conversion region PD, a first floating diffusion region FD1, a transfer gate TG, and a second floating diffusion region formed on the semiconductor substrate 101. It includes (FD2) and a double conversion gain gate (DG"), and may further include an output unit 170.

The photoelectric conversion region PD, first and second floating diffusion regions FD1 and FD2, the transfer gate TG, and the output unit 170 of FIG. 3 are the photoelectric conversion region PD of FIG. The second floating diffusion regions FD1 and FD2, the transfer gate TG, and the output unit 170 may be substantially the same, respectively.

The double conversion gain gate DG" is formed vertically from the first surface 101a of the semiconductor substrate 101 so as to be adjacent to the first and second floating diffusion regions FD1 and FD2. ") may be divided into a plurality of lower regions BP1 and BP2 and an upper region TP.

In an embodiment, as the number of lower regions of the double conversion gain gate increases, the conversion gain of the unit pixel according to the embodiments of the present invention may decrease. For example, the double conversion gain gate DG" of FIG. 3 includes two lower regions BP1 and BP2, and the double conversion gain gate DG of FIG. 1 includes one lower region BP. In this case, the surface area of contact between the double conversion gain gate DG" of FIG. 3 and the semiconductor substrate 101 is greater than the surface area of the contact between the double conversion gain gate DG and the semiconductor substrate 101 of FIG. Therefore, when the double conversion gain control signal DX is activated, the capacitance with respect to the floating diffusion region of the unit pixel 100b of FIG. 3 is greater than the capacitance with respect to the floating diffusion region of the unit pixel 100 of FIG. 1. It can increase a lot. As will be described later with reference to FIGS. 6A and 6B, since the conversion gain of the unit pixel is inversely proportional to the capacitance of the floating diffusion region of the unit pixel, the unit pixel of FIG. 3 when the double conversion gain control signal DX is activated. The conversion gain of (100b) may be smaller than the conversion gain of the unit pixel 100 of FIG. 1.

As described above with reference to FIGS. 1 and 3, the number of lower regions of the vertical double conversion gain gate DG" included in a unit pixel according to embodiments of the present invention may be variously changed. Accordingly, the double conversion gain gate DG" may be implemented to include three or more lower regions. Depending on the embodiment, the depth of the lower region BP1 and the depth of the lower region BP2 may be different. Also, the depth of the lower regions BP1 and BP2 may be smaller than the depth of the first and second floating diffusion regions FD1 and FD2. Meanwhile, although not shown, the depths of the lower regions BP1 and BP2 may be greater than or equal to the depths of the first and second floating diffusion regions FD1 and FD2.

In the unit pixel 100 of the image sensor according to embodiments of the present invention, impurities included in the semiconductor substrate 101 are in the photoelectric conversion region PD and the first and second floating diffusion regions FD1 and FD2. It may have a conductivity type different from the included impurities. For example, the semiconductor substrate 101 may be a semiconductor substrate doped with p-type impurities. The photoelectric conversion region PD doped with n-type impurities and the first and second floating diffusion regions FD1 and FD2 may be provided through an ion implantation process. In this case, the photoelectric conversion region PD may collect electrons among electron-hole pairs.

Although not shown, the unit pixel 100 of the image sensor according to embodiments of the present invention may further include an insulating layer (not shown) formed between the semiconductor substrate 101 and the gate structures TG and DG. have. In this case, the transfer gate TG and the double conversion gain gate DG may be formed by depositing a gate conductive film on the insulating layer and then patterning the stacked gate conductive film. The gate conductive layer may be formed of polysilicon, a metal and/or a metal compound. Depending on the embodiment, the transfer gate TG and the double conversion gain gate DG may be formed simultaneously (ie, using the same process) or may be formed sequentially (ie, using different processes). Depending on the embodiment, the double conversion gain gate DG may have a pillar shape or a cup shape. Depending on the embodiment, the transfer gate TG may also have a vertical gate structure.

The unit pixel 100 of the image sensor according to embodiments of the present invention may be included in a frontside illuminated image sensor (FIS) or a backside illuminated image sensor (BIS) of a front light receiving method. . Specifically, the first surface 101a of the semiconductor substrate 101 on which the gate structures TG and DG are formed is the front surface of the semiconductor substrate 101, and the second surface 101b facing the first surface 101a ) May be the rear surface of the semiconductor substrate 101. For example, as illustrated in FIG. 1, when the pixel signal VPIX is generated based on incident light incident through the front surface of the semiconductor substrate 101, the unit pixel may be included in the FIS. In another example, although not shown, when the pixel signal VPIX is generated based on incident light incident through the rear surface of the semiconductor substrate 101, the unit pixel may be included in the BIS.

Although not shown, the unit pixel 100 of the image sensor according to the embodiments of the present invention further includes a color filter (not shown) and a micro lens (not shown) for providing incident light to the photoelectric conversion region PD. I can. When the unit pixel is included in the FIS, the color filter and the microlens are formed on the entire surface of the semiconductor substrate 101, and when the unit pixel is included in the BIS, the color filter and the microlens May be formed on the rear surface of the semiconductor substrate 101. In addition, the unit pixel 100 of the image sensor according to the embodiments of the present invention is a device isolation region (not shown) formed vertically from the first surface 101a of the semiconductor substrate 101 so as to surround the unit pixel 100. ) (For example, a shallow trench isolation (STI) region or a deep trench isolation (DTI) region) may be further included.

Meanwhile, the unit pixel 100 of the image sensor according to the embodiments of the present invention may have a five-transistor structure including a reset transistor, a transfer transistor, a floating diffusion node, a double conversion gain transistor, and the like. Adjacent unit pixels may have a structure in which some transistors are shared. The circuit structure of the unit pixel and a specific embodiment according thereto will be described in more detail later with reference to FIGS. 4 and 7.

4 is a circuit diagram illustrating an example of a unit pixel of FIG. 1.

Referring to FIG. 4, a unit pixel 200 of the image sensor may include a photoelectric conversion unit 210 and a signal generation circuit 212.

The photoelectric conversion unit 210 may perform photoelectric conversion based on incident light. The signal generation circuit 212 may generate a pixel signal VPIX based on photocharges generated by the photoelectric conversion. The signal generation circuit 212 includes a transfer transistor 220, a first floating diffusion node 230, a double conversion gain transistor 240, a second floating diffusion node 250, a reset transistor 260, and an output unit 270. It may include.

The transfer transistor 220 may include a first terminal connected to the photoelectric conversion unit 210, a second terminal connected to the first floating diffusion node 230, and a gate to which the transmission control signal TX is applied. The double conversion gain transistor 240 includes a first terminal connected to the first floating diffusion node 230, a second terminal connected to the second floating diffusion node 250, and a gate to which the double conversion gain control signal DX is applied. can do. The reset transistor 260 may include a first terminal to which the power voltage VDD is applied, a second terminal connected to the second floating diffusion node 250, and a gate to which the reset signal RST is applied. The output unit 270 is connected to the first floating diffusion node 230, generates a pixel signal VPIX based on the photocharges, and generates a drive transistor 280 (for example, a source follower). Transistor) and a selection transistor 290. The drive transistor 280 may include a first terminal to which the power voltage VDD is applied, a gate connected to the first floating diffusion node 230, and a second terminal. The selection transistor 290 may include a first terminal connected to the second terminal of the drive transistor 280, a gate to which the selection signal SEL is applied, and a second terminal for outputting the pixel signal VPIX.

5 is a cross-sectional view illustrating a structure of a unit pixel of FIG. 4.

4 and 5, the unit pixel 200 of the image sensor is a photoelectric conversion region PD formed on a semiconductor substrate 201, a first floating diffusion region FD1, a transfer gate TG, and a second floating. A diffusion region FD2, a double conversion gain gate DG, a reset drain region RD, a reset gate RG, and an output unit 270 may be included.

Photoelectric conversion region PD, transfer gate TG, first floating diffusion region FD1, double conversion gain gate DG, second floating diffusion region FD2, reset gate RG, and output unit of FIG. 5 270 denotes the photoelectric conversion unit 210, the transfer transistor 220, the first floating diffusion node 230, the double conversion gain transistor 240, the second floating diffusion node 250, and a reset transistor of FIG. 4, respectively. It may have a structure corresponding to the 260 and the output unit 270. The photoelectric conversion region PD, first and second floating diffusion regions FD1 and FD2, the transfer gate TG, the double conversion gain gate DG, and the output unit 270 of FIG. The region PD, the first and second floating diffusion regions FD1 and FD2, the transfer gate TG, the double conversion gain gate DG, and the output unit 170 may be substantially the same, respectively.

The reset drain region RD may be formed in the semiconductor substrate 201 to be spaced apart from the photoelectric conversion region PD and the first and second floating diffusion regions FD1 and FD2. The power voltage VDD may be applied to the reset drain region RD.

The reset gate RG is formed on the semiconductor substrate 201 between the second floating diffusion region FD2 and the reset drain region RD. The first and second floating diffusion regions FD1 and FD2 may be reset based on the reset signal RST applied to the reset gate RG. For example, by discharging the charges accumulated in the first and second floating diffusion regions FD1 and FD2 in response to the reset signal RST, the first and second floating diffusion regions FD1 and FD2 are powered. It can be initialized to the level of the voltage VDD.

4 and 5, the first floating diffusion node 230, the double conversion gain transistor 240, and the second floating diffusion node 250 are formed between the transfer transistor 220 and the reset transistor 260. I can. In other words, in the unit pixel 200, the first floating diffusion region FD1 is formed in the semiconductor substrate 201 between the transfer gate TG and the double conversion gain gate DG, and the second floating diffusion region FD2 ) May be formed in the semiconductor substrate 201 between the double conversion gain gate DG and the reset gate RG.

6A and 6B are diagrams for describing an operation of the unit pixel of FIG. 5. 6A is a cross-sectional view illustrating the conversion gain of the unit pixel 200 of FIG. 5 when the double conversion gain control signal DX is inactive, and FIG. 6A is a case where the double conversion gain control signal DX is activated. A cross-sectional view illustrating a conversion gain of the unit pixel 200 of FIG. 5. For convenience of explanation, illustration of the selection transistor (290 of FIG. 5) included in the output unit (270 of FIG. 5) in FIGS. 6A and 6B is omitted.

In the unit pixel of the image sensor according to embodiments of the present invention, the double conversion gain control signal DX may be selectively activated according to the illuminance of incident light or a user setting signal applied from the outside. Regarding the configuration in which whether or not to activate the double conversion gain control signal DX is automatically determined according to the illuminance of the incident light and the configuration in which whether or not to activate the double conversion gain control signal DX is manually determined based on the user-set signal, It will be described later in more detail with reference to FIGS. 22, 23, 24 and 25.

Referring to FIG. 6A, for example, when the illuminance of the incident light is lower than or equal to the reference illuminance, or when the image sensor is set to drive in a low illuminance operation mode based on the user setting signal, a double conversion gain control signal ( DX) can be disabled. In this case, when the unit pixel 200 operates in a read mode after the optical integration mode, only the first floating diffusion area FD1 may be used as a storage area for photocharges. In the example of FIG. 6A, the capacitance CFD for the first floating diffusion region FD1, which is a storage region of the photocharges in the read mode, is obtained as Equation 1 below, and the unit pixel 200 The first conversion gain CG1 of may be obtained as shown in [Equation 2] below.

[Equation 1]

[Equation 2]

In the above [Equation 1], Cj denotes a capacitance existing between the first floating diffusion region FD1 and the semiconductor substrate 201, and CT denotes between the transfer gate TG and the first floating diffusion region FD1. Represents the capacitance existing in the double conversion gain gate DG, CDG1 represents the capacitance existing between the upper region TP of the double conversion gain gate DG and the first floating diffusion region FD1, and CDG2 represents the lower portion of the double conversion gain gate DG The capacitance existing between the region BP and the first floating diffusion region FD1 is represented, CD represents the capacitance existing between the first terminal and the gate of the drive transistor 280, and CS represents the capacitance of the drive transistor 280. It represents the capacitance existing between the gate and the second terminal. Gsf represents the gain of the drive transistor 280 and is based on the ratio of the output signal (i.e., the pixel signal VPIX) to the input signal of the drive transistor 280 (i.e., the voltage of the first floating diffusion region FD1). May correspond. In the above [Equation 2], Q may correspond to an amount of charge of photocharges collected in the photoelectric conversion region PD in the optical integration mode and transferred to the first floating diffusion region FD1 in the read mode.

Referring to FIG. 6B, for example, when the illuminance of the incident light is higher than the reference illuminance or when the image sensor is set to drive in a high illuminance operation mode based on the user setting signal, a double conversion gain control signal ( DX) can be activated. In this case, when the unit pixel 200 operates in a read mode after the optical integration mode, the first and second floating diffusion regions FD1 and FD2 may be used as storage areas for photocharges. In the example of FIG. 6B, the capacitance CFD' for the first and second floating diffusion regions FD1 and FD2, which are storage regions of the photocharges in the read mode, is obtained as Equation 3 below. In addition, the second conversion gain CG2 of the unit pixel 200 may be obtained as shown in [Equation 4] below.

[Equation 3]

[Equation 4]

In the above [Equation 3], CDG3 denotes a capacitance existing between the upper region TP of the double conversion gain gate DG and the second floating diffusion region FD2, and CDG4 denotes the double conversion gain gate DG Denotes a capacitance existing between the lower region BP and the second floating diffusion region FD2 of, and CR denotes a capacitance existing between the second floating diffusion region FD2 and the reset gate RG. In the above [Equation 2], Q'is the amount of charge of photocharges collected in the photoelectric conversion region PD in the optical integration mode and transferred to the first and second floating diffusion regions FD1 and FD2 in the read mode. May correspond.

The unit pixel of the image sensor according to the embodiments of the present invention additionally includes a double conversion gain gate DG and selectively activates a double conversion gain control signal DX applied to the double conversion gain gate DG, The conversion gain of the unit pixel can be effectively adjusted according to the operation mode or the use environment of the image sensor. In addition, when the double conversion gain gate DG is formed in a vertical gate structure so that the surface area in contact between the double conversion gain gate DG and the semiconductor substrate 201 is increased, the double conversion gain control signal DX is activated. The capacitance of the unit pixel to the floating diffusion region can be increased relatively much (for example, as much as CDG2 and CDG4 in FIG. 6B), and thus the conversion gain of the unit pixel can be effectively adjusted.

7 is a circuit diagram illustrating another example of the unit pixel of FIG. 1.

Referring to FIG. 7, the unit pixel 300 of the image sensor may include a photoelectric conversion unit 310 and a signal generation circuit 312.

The photoelectric conversion unit 310 may perform photoelectric conversion based on incident light. The signal generation circuit 312 may generate a pixel signal VPIX based on photocharges generated by the photoelectric conversion. The signal generation circuit 312 includes a transfer transistor 320, a first floating diffusion node 330, a double conversion gain transistor 340, a second floating diffusion node 350, a reset transistor 360, and an output unit 370. It may include.

The transfer transistor 320 may include a first terminal connected to the photoelectric conversion unit 310, a second terminal connected to the first floating diffusion node 330, and a gate to which the transmission control signal TX is applied. The double conversion gain transistor 340 includes a first terminal connected to the first floating diffusion node 330, a second terminal connected to the second floating diffusion node 350, and a gate to which the double conversion gain control signal DX is applied. can do. The reset transistor 360 may include a first terminal to which the power voltage VDD is applied, a second terminal connected to the first floating diffusion node 330, and a gate to which the reset signal RST is applied. The output unit 370 is connected to the first floating diffusion node 330, generates a pixel signal VPIX based on the photocharges, and may include a drive transistor 380 and a selection transistor 390. . The drive transistor 380 may include a first terminal to which the power voltage VDD is applied, a gate connected to the first floating diffusion node 330, and a second terminal. The selection transistor 390 may include a first terminal connected to the second terminal of the drive transistor 380, a gate to which the selection signal SEL is applied, and a second terminal for outputting the pixel signal VPIX.

8 and 9 are cross-sectional views illustrating a structure of a unit pixel of FIG. 7.

7, 8, and 9, the unit pixel 300 of the image sensor includes a photoelectric conversion region PD, a first floating diffusion region FD1, a transfer gate TG, and a second unit pixel 300 formed on the semiconductor substrate 301. 2 A floating diffusion region FD2, a double conversion gain gate DG, a reset drain region RD, a reset gate RG, and an output unit 370 may be included.

The photoelectric conversion region PD, the transfer gate TG, the first floating diffusion region FD1, the double conversion gain gate DG, the second floating diffusion region FD2, and the reset gate RG of FIGS. 8 and 9 The output unit 370 is a photoelectric conversion unit 310 of FIG. 7, a transfer transistor 320, a first floating diffusion node 330, a double conversion gain transistor 340, a second floating diffusion node 350, and a reset. It may have a structure corresponding to the transistor 360 and the output unit 370. The photoelectric conversion region PD, the first and second floating diffusion regions FD1 and FD2, the transfer gate TG, the double conversion gain gate DG, and the output unit 370 of FIGS. 8 and 9 are shown in FIG. The photoelectric conversion region PD, the first and second floating diffusion regions FD1 and FD2, the transfer gate TG, the double conversion gain gate DG, and the output unit 170 may be substantially the same, respectively.

The reset drain region RD may be formed in the semiconductor substrate 301 to be spaced apart from the photoelectric conversion region PD and the first and second floating diffusion regions FD1 and FD2. The power voltage VDD may be applied to the reset drain region RD. The reset gate RG is formed on the semiconductor substrate 301 between the first floating diffusion region FD1 and the reset drain region RD. The first and second floating diffusion regions FD1 and FD2 may be reset based on the reset signal RST applied to the reset gate RG.

In the embodiment of FIGS. 7, 8 and 9, the first floating diffusion node 330 is formed between the transfer transistor 320 and the reset transistor 360, and also between the transfer transistor 320 and the double conversion gain transistor 340. Can be formed in In other words, in the unit pixel 300, the first floating diffusion region FD1 is formed in the semiconductor substrate 301 between the transfer gate TG and the double conversion gain gate DG, and the transfer gate TG and It may be formed in the semiconductor substrate 301 between the reset gates RG.

The unit pixel 300 of FIGS. 7, 8 and 9 may operate substantially the same as the unit pixel 200 of FIGS. 4 and 5. Accordingly, as described above with reference to FIGS. 6A and 6B, the conversion gain of the unit pixel can be effectively adjusted by selectively activating the double conversion gain control signal DX applied to the double conversion gain gate DG. In addition, the conversion gain of the unit pixel can be effectively adjusted by forming the double conversion gain gate DG in a vertical gate structure such that a surface area in contact between the double conversion gain gate DG and the semiconductor substrate 301 is increased.

10A and 10B are diagrams for describing an operation of a unit pixel according to embodiments of the present invention. FIG. 10A is a timing diagram illustrating an operation of a unit pixel when the illuminance of incident light is lower than or equal to a reference illuminance or when it is set to drive in a low illuminance operation mode based on a user setting signal. 10B is a timing diagram illustrating an operation of a unit pixel when the illuminance of the incident light is higher than the reference illuminance or is set to be driven in a high illuminance operation mode based on the user setting signal.

Referring to FIG. 10A, the optical integration mode TINT starts at time t1. The reset signal RST is activated at time t1 and the transmission control signal TX is activated at a time period t1 to t2 to reset the photoelectric conversion region PD and the first floating diffusion region FD1. The reset signal RST maintains an active state in the optical integration mode TINT.

Photoelectric conversion is performed based on incident light in the light integration mode TINT after time t2. When the image sensor including the unit pixel is a CMOS image sensor, the shutter of the CMOS image sensor is opened during the light integration mode (TINT), and charge carriers such as electron-hole pairs are generated and collected by the incident light to image the subject. Information is collected.

At time t3, the optical integration mode TINT ends and the read mode TRD starts. At time t3, the selection signal SEL is activated to select a unit pixel for outputting a pixel signal. The reset signal RST, which was in the active state, is deactivated at time t4. In a period TA after time t4, a reset component of the pixel signal VPIX corresponding to the voltage of the first floating diffusion region FD1 reset by activation of the sampling signal SMPL is sampled.

In the period TB after the period TA, the transmission control signal TX is activated so that photocharges are transmitted from the photoelectric conversion area PD to the first floating diffusion area FD1. In the period TC after the period TB, the sampling signal SMPL is activated so that the image component of the pixel signal VPIX corresponding to the voltage of the first floating diffusion region FD1 is sampled. An effective image component of the pixel signal VPIX may be generated based on the reset component of the pixel signal VPIX and the image component of the pixel signal VPIX.

In the period TD after the period TC, the reset signal RST is activated to reset the first floating diffusion region FD1. At time t5 after the period TD, the selection signal SEL is deactivated and the read mode TRD is terminated.

In the embodiment of FIG. 10A, the double conversion gain control signal DX maintains an inactive state during the optical integration mode TINT and the read mode TRD. In other words, during the read mode TRD, only the first floating diffusion area FD1 is used as the storage area of the photocharges, and the second floating diffusion area FD2 is not used. Accordingly, the unit pixel may have a relatively large conversion gain. However, as shown in FIGS. 4 and 5, when the second floating diffusion region FD2 and the double conversion gain gate DG are disposed between the reset gate RG and the first floating diffusion region FD1, the first In order to reset the floating diffusion region FD1, the double conversion gain control signal DX may be activated during the same period as the period in which the reset signal RST is activated (eg, times t1 to t4 and period TD).

Referring to FIG. 10B, the optical integration mode TINT starts at time t6. The reset signal (RST) and the double conversion gain control signal (DX) are activated at time t6, and the transmission control signal (TX) is activated in the period of time t6 to t7, and the photoelectric conversion region (PD) and the first and second floating diffusions The regions FD1 and FD2 are reset. The reset signal RST and the double conversion gain control signal DX remain active in the optical integration mode TINT. Photoelectric conversion is performed based on the incident light in the light integration mode TINT after time t7.

At time t8, the optical integration mode TINT is ended and the read mode TRD is started. At time t8, the selection signal SEL is activated to select a unit pixel for outputting a pixel signal. The reset signal RST that has been in the active state is deactivated at time t9. The double conversion gain control signal DX remains active even in the read mode TRD. In a period TE after time t9, a reset component of the pixel signal VPIX corresponding to the voltages of the first and second floating diffusion regions FD1 and FD2 that are activated and reset by the sampling signal SMPL is sampled.

In the period TF after the period TE, the transmission control signal TX is activated so that photocharges are transmitted from the photoelectric conversion area PD to the first and second floating diffusion areas FD1 and FD2. In the period TH after the period TF, the sampling signal SMPL is activated so that the image component of the pixel signal VPIX corresponding to the voltages of the first and second floating diffusion regions FD1 and FD2 is sampled.

In the period TI after the period TH, the reset signal RST is activated to reset the first and second floating diffusion regions FD1 and FD2. At time t10 after the period TI, the selection signal SEL and the double conversion gain control signal DX are deactivated, and the read mode TRD is terminated.

In the embodiment of FIG. 10B, the double conversion gain control signal DX maintains an active state during the optical integration mode TINT and the read mode TRD. In other words, during the read mode TRD, all of the first and second floating diffusion regions FD1 and FD2 are used as storage regions of the photocharges. Accordingly, the unit pixel may have a relatively small conversion gain.

Meanwhile, in FIGS. 10A and 10B, it is shown that the reset signal RST is activated when the optical integration mode TINT is started and maintains the active state in the optical integration mode TINT. However, according to an embodiment, the reset signal RST ) Is the initial operation period of the optical integration mode TINT (for example, the period of time t1 to t2 of FIG. 10A or the period of time t6 to t7 of FIG. 10B) and the initial operation period of the read mode TRD (for example, For example, it may be activated only in a period of time t3 to t4 of FIG. 10A or a period of time t8 to t9 of FIG.

Hereinafter, various embodiments of a unit pixel and a method of manufacturing a unit pixel and an image sensor including the same will be described in more detail with reference to FIGS. 11 to 21.

11 is a cross-sectional view illustrating a unit pixel of an image sensor according to example embodiments.

Referring to FIG. 11, the unit pixel 400 of the image sensor includes a photoelectric conversion region PD, a first floating diffusion region FD1, a transfer gate TG, and a second floating diffusion region formed on a semiconductor substrate 401. (FD2) and a double conversion gain gate (DG). The unit pixel 400 may further include a device isolation region 410, a first insulating layer 420, a second insulating layer 430, a color filter CF, and a micro lens ML. For example, the unit pixel 400 of FIG. 11 may be included in the BIS.

The semiconductor substrate 401 may include a first surface 401a and a second surface 401b facing the first surface 401a. For example, the first surface 401a of the semiconductor substrate 401 may be a front surface of the semiconductor substrate 401, and the second surface 401b of the semiconductor substrate 401 may be a rear surface of the semiconductor substrate 401.

The photoelectric conversion region PD of FIG. 11, the first and second floating diffusion regions FD1 and FD2, the transfer gate TG, and the double conversion gain gate DG of FIG. The first and second floating diffusion regions FD1 and FD2, the transfer gate TG, and the double conversion gain gate DG may be substantially the same, respectively.

The device isolation region 410 may be formed vertically from the first surface 401a of the semiconductor substrate 401. As will be described later with reference to FIG. 12A, a unit pixel region may be defined based on the device isolation region 410. The photoelectric conversion region PD, the first and second floating diffusion regions FD1 and FD2, the transfer gate TG, and the double conversion gain gate DG may be formed in the unit pixel region. The device isolation region 410 may include an insulating material.

Depending on the embodiment, the unit pixel 400 further includes a polysilicon region (not shown) formed inside the device isolation region 410 or a surface doped film (not shown) formed on the surface of the device isolation region 410. Poetry) may be further included. The polysilicon region is surrounded by the device isolation region 410, and may include polysilicon, a metal, and/or a metal compound. To reduce dark current by forming an impurity region (eg, p-type region) to surround the surface of the device isolation region 410 using an ion implantation process such as plasma doping (PLAD). The surface doping layer for the can be provided. For example, the surface doped layer is doped with an impurity of the same type as the impurity included in the semiconductor substrate 401 at a higher concentration than the semiconductor substrate 401, or an impurity of a type different from that included in the photoelectric conversion region PD It may be formed by doping with a higher concentration than the photoelectric conversion region PD.

The first insulating layer 420 may be formed on the first surface 401a of the semiconductor substrate 401. For example, the first insulating layer 420 may electrically insulate the gate structures TG and DG from the semiconductor substrate 401 and may be referred to as a gate insulating layer.

The second insulating layer 430 may be formed on the first surface 401a of the semiconductor substrate 401, for example, on the transfer gate TG and the double conversion gain gate DG. The second insulating layer 430 may include a plurality of metal wires WL. The plurality of metal wires WL may be electrically connected to the gate structures TG and DG through a contact or a plug, or may be electrically connected to each other. For example, the plurality of metal wires WL may be formed through a method of laminating and patterning a conductive material including a metal such as copper, tungsten, titanium, and aluminum. Although not shown, the second insulating layer 430 may be formed in a multi-layer structure in which a plurality of insulating layers are stacked.

Depending on the embodiment, the second insulating layer 430 may further include additional gate structures (not shown), and according to the connection and arrangement of the additional gate structures and the plurality of metal lines WL, FIG. 4 The signal generation circuit 212 of FIG. 7 and the signal generation circuit 312 of FIG. 7 may be implemented.

The color filter CF may be formed on the second surface 401b of the semiconductor substrate 401. The color filter CF may be included in a color filter array arranged in a matrix form. In one embodiment, the color filter array may have a Bayer pattern including a red filter, a green filter, and a blue filter. In another embodiment, the color filter array may include a yellow filter, a magenta filter, and a cyan filter. In addition, the color filter array may additionally include a white filter.

The micro lens ML may be formed on the color filter CF. The micro lens ML may adjust the path of the incident light so that the incident light incident on the micro lens ML is condensed onto the photoelectric conversion region PD. In addition, the micro lenses ML may be included in the micro lens array arranged in a matrix form.

According to an exemplary embodiment, an antireflection layer (not shown) may be further formed between the second surface 401b of the semiconductor substrate 401 and the color filter CF. The antireflection layer may prevent the incident light from being reflected. Depending on the embodiment, the antireflection layer may be formed by alternately stacking materials having different refractive indices. In this case, the transmittance of the antireflection layer may be improved as more materials having different refractive indices are alternately stacked.

12A, 12B, 12C, 12D, 12E and 12F are cross-sectional views illustrating an example of a method of manufacturing the unit pixel of FIG. 11 and an image sensor including the same.

Referring to FIG. 12A, a device isolation region 410 is formed vertically from the first surface 401a of the semiconductor substrate 401 to define a unit pixel region UPA among the entire region UPT. For example, the semiconductor substrate 401 may be a p-type epitaxial layer. The semiconductor substrate 401 is formed by forming the p-type epitaxial layer on a p-type bulk silicon substrate (not shown) and grinding the p-type bulk silicon substrate in a mechanical method and/or a chemical method. Can be prepared. In addition, the semiconductor substrate 401 may be etched to form a trench, and the trench may be filled with an insulating material to provide an isolation region 410.

Although not shown, the insulating material may be injected a plurality of times with different energies to form the device isolation region 410. As the implantation is performed several times as described above, the device isolation region 410 has a surface It can have a convex structure.

Referring to FIG. 12B, a photoelectric conversion region PD, a first floating diffusion region FD1, and a second floating diffusion region FD2 are formed in the semiconductor substrate 401. For example, by doping n-type impurities into the semiconductor substrate 401 using an ion implantation process, the photoelectric conversion region PD and the first and second floating diffusion regions FD1 and FD2 are prepared. can do.

Although not shown, the photoelectric conversion region PD may be formed in a form in which a plurality of doped regions are stacked.

Depending on the embodiment, the photoelectric conversion region PD and the first and second floating diffusion regions FD1 and FD2 may be formed sequentially or may be formed substantially simultaneously. In addition, in FIGS. 12A and 12B, regions PD, FD1, and FD2 are formed after the device isolation region 410 is formed, but after the regions PD, FD1 and FD2 are formed, The device isolation region 410 may be formed.

Referring to FIG. 12C, a part of the semiconductor substrate 401 between the first floating diffusion region FD1 and the second floating diffusion region FD2 is removed, and the first surface 401a of the semiconductor substrate 401 is removed. A recess 405 is formed. For example, by using a dry and/or wet etching process, a portion of the semiconductor substrate 401 on which the double conversion gain gate (DG in FIG. 12D) is to be formed may be etched to a predetermined depth to form the recess 405. have. The shape and depth of the recess 405 may be variously changed.

Although not shown, a channel impurity region (not shown) may be formed by doping p-type impurities on the sidewalls and lower surfaces of the recess 405.

Referring to FIG. 12D, a first insulating layer 420 is formed on a first surface 401a of a semiconductor substrate 401, and a transfer gate TG and a double conversion gain gate are formed on the first insulating layer 420. (DG) is formed. For example, the first insulating layer 420 is silicon oxide (SiOx), silicon oxynitride (SiOxNy), silicon nitride (SiNx), germanium oxynitride (GeOxNy), germanium silicon oxide (GeSixOy), or a material having a high dielectric constant It may be formed by using or may be formed in a multi-layered structure made of two or more selected materials among the aforementioned materials. In addition, gate structures TG and DG may be prepared by depositing a gate conductive film on the first insulating layer 420 and then patterning the stacked gate conductive film. The transfer gate TG is formed on the semiconductor substrate 401 between the photoelectric conversion region PD and the first floating diffusion region FD1, and the first and second floating diffusions are filled by filling the recesses 405 in FIG. 12C. A double conversion gain gate DG may be formed vertically from the first surface 401a of the semiconductor substrate 401 so as to be adjacent to the regions FD1 and FD2. For example, a vertical double conversion gain gate DG may be provided by forming a conductive layer to fill the inside of the recess (405 in FIG. 12C), and the conductive layer may be doped polysilicon, metal, metal nitride, or It may be made of at least one material selected from metal silicides.

Depending on the embodiment, the transfer gate TG and the double conversion gain gate DG may be formed sequentially or may be formed substantially simultaneously.

Referring to FIG. 12E, a second insulating layer 430 including a plurality of metal lines WL is formed on the transfer gate TG and the double conversion gain gate DG. Referring to FIG. 12F, a color filter CF is formed on the second surface 401b of the semiconductor substrate 401, and a micro lens ML is formed on the color filter CF.

For example, the color filter CF may be formed using a dyeing process, a pigment dispersion process, a printing process, or the like. The color filter CF may be formed by applying a photosensitive material such as a dyed photoresist, and performing exposure and development processes. Further, patterns may be formed using a light-transmitting photoresist, and the pattern may be reflowed to form a microlens ML having a certain curvature and a convex shape toward a direction in which the incident light is provided. In an embodiment, when the microlens ML includes a photoresist, a baking process may be performed so that the microlens ML maintains its shape.

Although not shown, a planarization layer (not shown) such as an over-coating layer (OCL) may be formed between the color filter CF and the micro lens ML.

13 is a cross-sectional view illustrating a unit pixel of an image sensor according to example embodiments. 14 is a cross-sectional view showing an enlarged portion A of FIG. 13.

13 and 14, the unit pixel 400a of the image sensor is a photoelectric conversion region PD formed on a semiconductor substrate 401, a first floating diffusion region FD1, a transfer gate TG, and a second floating. A diffusion region FD2 and a double conversion gain gate DGR are included. The unit pixel 400a may further include a device isolation region 410, a first insulating layer 420, a second insulating layer 430, a color filter CF, and a micro lens ML.

Photoelectric conversion region PD, first and second floating diffusion regions FD1 and FD2, transfer gate TG, device isolation region 410, first insulating layer 420, and second insulating layer of FIG. 13 The photoelectric conversion region PD, first and second floating diffusion regions FD1 and FD2, a transfer gate TG, and a device isolation region of FIG. 410, the first insulating layer 420, the second insulating layer 430, the color filter CF, and the micro lens ML may be substantially the same.

The double conversion gain gate DGR is vertically formed from the first surface 401a of the semiconductor substrate 401 so as to be adjacent to the first and second floating diffusion regions FD1 and FD2, and at least one lower region BPR ) And the upper region TP.

In one embodiment, as shown in FIG. 14, the lower surface S1 of the at least one lower region BPR is flat, and the lower edge where the lower surface S1 and the side surface of the at least one lower region BPR meet ( S2) can be round. In this case, when the double conversion gain control signal (DX in FIG. 1) applied to the double conversion gain gate DGR is activated, the first point P1 in the semiconductor substrate 401 adjacent to the lower surface S1 and Electric field distribution may be evenly formed at both the lower edge S2 and the second point P2 in the semiconductor substrate 401 adjacent to the lower edge S2. Accordingly, a channel between the first and second floating diffusion regions FD1 and FD2 is easily formed, and charge transfer between the first and second floating diffusion regions FD1 and FD2 can be performed smoothly. In addition, the first width W1 of the upper end of the at least one lower region BPR may be larger than the second width W2 of the lower surface S1, for example, the second width W2 is the first width It may be about 1/2 of (W1).

In an embodiment, in order to evenly form the electric field distribution at the second point P2 in the semiconductor substrate 401, the radius of curvature R of the lower edge S2 of at least one lower region BPR ) Can have a certain range. For example, the radius of curvature R of the lower edge S2 may have a value between about 10 nm and 100 nm, and preferably between about 60 nm and 100 nm. Here, the radius of curvature R of the lower edge S2 may represent a radius of a circle (eg, the dotted line in FIG. 14) sharing the lower edge S2. When the radius of curvature (R) of the lower edge (S2) is less than 10 nm, the charge transfer characteristics may be deteriorated by the electric field barrier, and when the radius of curvature (R) of the lower edge (S2) is larger than 100 nm, Problems in the manufacturing process may be caused.

15A, 15B, 15C, and 15D are cross-sectional views illustrating an example of a method of manufacturing the unit pixel of FIG. 13 and an image sensor including the same.

In manufacturing the unit pixel of FIG. 13 and the image sensor including the same, the steps of forming the device isolation region, and the steps of forming the photoelectric conversion region and the floating diffusion region are substantially the same as those described with reference to FIGS. 12A and 12B, respectively. Do. In addition, the embodiment of manufacturing the unit pixel of FIG. 13 and the image sensor including the same is the embodiment of manufacturing the unit pixel of FIG. 11 and an image sensor including the same, except that the structure of the double conversion gain gate (DGR) is different. Since they are substantially the same, duplicate descriptions will be omitted.

Referring to FIG. 15A, a recess 406 is formed by removing a portion of the semiconductor substrate 401 between the first floating diffusion region FD1 and the second floating diffusion region FD2. For example, a portion of the semiconductor substrate 401 on which the double conversion gain gate (DGR in FIG. 15B) is to be formed may be etched to a predetermined depth to form the recess 406. The bottom surface C1 of the recess 406 may be flat, and the lower edge C2 may be rounded.

Depending on the embodiment, after forming a recess having an angled corner by an anisotropic etching process, an isotropic etching process is performed, or after forming a recess having an angled corner by an anisotropic etching process, a thermal oxidation process is performed to perform a thermal oxide film ( By forming (not shown) and removing the thermal oxide layer, a recess 406 having a flat bottom surface C1 and a rounded corner C2 may be formed.

In one embodiment, the radius of curvature of the lower edge C2 of the recess 406 may have a certain range. For example, the radius of curvature of the lower edge C2 may have a value between about 10 nm and 100 nm, and preferably between about 60 nm and 100 nm.

Referring to FIG. 15B, a first insulating layer 420 is formed on a first surface 401a of a semiconductor substrate 401, and a transfer gate TG and a double conversion gain gate are formed on the first insulating layer 420. (DGR) is formed. Referring to FIG. 15C, a second insulating layer 430 including a plurality of metal lines WL is formed on the transfer gate TG and the double conversion gain gate DGR. Referring to FIG. 15D, a color filter CF is formed on the second surface 401b of the semiconductor substrate 401 and a micro lens ML is formed on the color filter CF.

16, 17, 18, 19, 20, and 21 are cross-sectional views illustrating a unit pixel of an image sensor according to embodiments of the present invention.

Referring to FIG. 16, the unit pixel 400b of the image sensor is a photoelectric conversion region PD, a first floating diffusion region FD1, a transfer gate TG, and a second floating diffusion region formed on a semiconductor substrate 401. (FD2) and a double conversion gain gate (DG). The unit pixel 400b may further include a device isolation region 410a, a first insulating layer 420, a second insulating layer 430, a color filter CF, and a micro lens ML.

The photoelectric conversion region PD, first and second floating diffusion regions FD1 and FD2 of FIG. 16, a transfer gate TG, a double conversion gain gate DG, a first insulating layer 420, and a second insulation The layer 430, the color filter CF, and the micro lens ML include the photoelectric conversion region PD, the first and second floating diffusion regions FD1 and FD2, the transfer gate TG, and the double conversion of FIG. They may be substantially the same as the gain gate DG, the first insulating layer 420, the second insulating layer 430, the color filter CF, and the micro lens ML, respectively.

The device isolation region 410a of FIG. 16 may be formed vertically deeper than the photoelectric conversion region PD from the first surface 401a of the semiconductor substrate 401. For example, the device isolation region 410a may be a DTI region formed from the first surface 401a to the second surface 401b of the semiconductor substrate 401, and the longitudinal section of the device isolation region 410a is a semiconductor substrate It may be in contact with the second surface 401b of 401.

In one embodiment, the device isolation region 410a may be formed of an insulating material having a smaller refractive index for incident light than the semiconductor substrate 401. In this case, the leakage component L1 of the incident light generated by the microlens ML is totally reflected on the surface of the device isolation region 410a, and the leakage component L1 reaches adjacent unit pixels (not shown). Is blocked, and the reflection component L2 in which the leakage component L1 is reflected by the device isolation region 410a may reach the photoelectric conversion region PD. Also, as the device isolation region 410a is formed of the insulating material, charge carriers generated by the incident light may be blocked from reaching the adjacent unit pixels by diffusion. Accordingly, crosstalk between adjacent unit pixels may be reduced, and a signal-to-noise ratio (SNR) characteristic of an image sensor including the unit pixel 400b may be improved.

Referring to FIG. 17, the unit pixel 400c of the image sensor is a photoelectric conversion region PD' formed on a semiconductor substrate 401, a first floating diffusion region FD1, a transfer gate TG, and a second floating diffusion. A region FD2 and a double conversion gain gate DG are included. The unit pixel 400c may further include a device isolation region 410a, a first insulating layer 420, a second insulating layer 430, a color filter CF, and a micro lens ML.

First and second floating diffusion regions FD1 and FD2 of FIG. 17, a transfer gate TG, a double conversion gain gate DG, a first insulating layer 420, a second insulating layer 430, and a color filter The CF and the micro lens ML include the first and second floating diffusion regions FD1 and FD2 of FIG. 11, a transfer gate TG, a double conversion gain gate DG, and a first insulating layer 420, The second insulating layer 430, the color filter CF, and the micro lens ML may be substantially the same. The device isolation region 410a of FIG. 17 may be substantially the same as the device isolation region 410a of FIG. 16.

The photoelectric conversion region PD' of FIG. 17 may be formed in the semiconductor substrate 401 and may be formed to contact the second surface 401b of the semiconductor substrate 401, for example. In other words, the photoelectric conversion region PD of FIG. 16 contacts only the first surface 401a of the semiconductor substrate 401, but the photoelectric conversion region PD′ of FIG. 17 is the first surface ( 401a) and the second surface 401b may all be in contact. Although not shown, the photoelectric conversion region may be formed to contact only the second surface 401b of the semiconductor substrate 401.

Meanwhile, according to an exemplary embodiment, the double conversion gain gate DG of FIGS. 16 and 17 may be formed such that the lower surface of at least one lower region is flat and the lower edge is round as described above with reference to FIGS. 13 and 14. have.

Referring to FIG. 18, the unit pixel 400d of the image sensor is a photoelectric conversion region PD, a first floating diffusion region FD1, a transfer gate TG, and a second floating diffusion region formed on a semiconductor substrate 401. (FD2) and a double conversion gain gate (DG). The unit pixel 400d further includes a device isolation region 410, a first insulating layer 420, a second insulating layer 430, a third insulating layer 440, a color filter CF, and a micro lens ML. Can include.

Photoelectric conversion region PD, first and second floating diffusion regions FD1 and FD2, transfer gate TG, double conversion gain gate DG, device isolation region 410, and first insulating layer of FIG. 18 The photoelectric conversion region PD, first and second floating diffusion regions FD1 and FD2 of FIG. 11, and transmission of the second insulating layer 430, the color filter CF, and the micro lens ML The gate TG, the double conversion gain gate DG, the device isolation region 410, the first insulating layer 420, the second insulating layer 430, the color filter CF, and the micro lens ML, respectively Can be the same as

The third insulating layer 440 of FIG. 18 may be formed between the second surface 401b of the semiconductor substrate 401 and the color filter CF. In one embodiment, the third insulating layer 440 may have a negative fixed charge. For example, in the third insulating layer 440, metal elements such as hafnium (Hf), zirconium (Zr), aluminum (Al), tantalum (Ta), titanium (Ti), yttrium (Y), and lanthanoids are oxidized. It may be formed using a metal oxide (metal oxide), it may have a region at least partially crystallized in the film.

When the third insulating layer 440 has a negative fixed charge, hole accumulation may occur in a lower region of the semiconductor substrate 401. In the image sensor of the rear light receiving method, noise may be generated due to a surface defect present on the rear surface 401b of the semiconductor substrate 401 during the manufacturing process, and as described above, the third insulating layer 440 The surface defects described above may be passivated using the accumulated holes. For example, by combining electrons (ie, dark current) generated in a dark state with the accumulated holes, the occurrence of dark current may be reduced.

In one embodiment, the third insulating layer 440 is an optical shielding layer for preventing light from entering into an optical black area (not shown) in the semiconductor substrate 401 where photoelectric conversion does not occur. , Not shown).

Meanwhile, according to an embodiment, the double conversion gain gate DG of FIG. 18 may be formed such that the lower surface of at least one lower region is flat and the lower edge is round, as described above with reference to FIGS. 13 and 14, and FIG. The device isolation region 410 of 18 may be formed from the first surface 401a to the second surface 401b of the semiconductor substrate 401 as described above with reference to FIG. 16, and the photoelectric conversion region PD of FIG. ) May be formed to contact the second surface 401b of the semiconductor substrate 401 as described above with reference to FIG. 17.

Referring to FIG. 19, a unit pixel 400e of the image sensor includes a photoelectric conversion region PD, a first floating diffusion region FD1, a transfer gate TG′, and a second floating diffusion formed on the semiconductor substrate 401. A region FD2 and a double conversion gain gate DG are included. The unit pixel 400e may further include a device isolation region 410, a first insulating layer 420, a second insulating layer 430, a color filter CF, and a micro lens ML.

Photoelectric conversion region PD, first and second floating diffusion regions FD1 and FD2, double conversion gain gate DG, device isolation region 410, first insulating layer 420, and second The insulating layer 430, the color filter CF, and the micro lens ML include the photoelectric conversion region PD, first and second floating diffusion regions FD1 and FD2, and a double conversion gain gate DG of FIG. 11. , The device isolation region 410, the first insulating layer 420, the second insulating layer 430, the color filter CF, and the micro lens ML may be substantially the same.

The transfer gate TG' of FIG. 19 may be formed vertically from the first surface 401a of the semiconductor substrate 401 to be adjacent to the photoelectric conversion region PD and the first floating diffusion region FD1. In other words, both the transfer gate TG' and the double conversion gain gate DG may have a vertical gate structure. For example, the transfer gate TG' is formed inside the semiconductor substrate 401 and is formed on the lower region surrounded by the semiconductor substrate 401 and on the first surface 401a of the semiconductor substrate 401 to It may include an upper region connected to the lower region.

Meanwhile, according to an exemplary embodiment, the double conversion gain gate DG and/or the transfer gate TG′ of FIG. 19 has a flat lower surface of at least one lower region and a lower edge thereof as described above with reference to FIGS. 13 and 14. May be formed to be round, and the device isolation region 410 of FIG. 19 may be formed from the first surface 401a to the second surface 401b of the semiconductor substrate 401 as described above with reference to FIG. 16. , The photoelectric conversion region PD of FIG. 19 may be formed to contact the second surface 401b of the semiconductor substrate 401 as described above with reference to FIG. 17. Further, the unit pixel 400e of FIG. 19 may further include a third insulating layer 440 as described above with reference to FIG. 18.

Referring to FIG. 20, the unit pixel 400f of the image sensor includes a photoelectric conversion region PD" formed on a semiconductor substrate 401, a first floating diffusion region FD1, a transfer gate TG", and a second floating. It includes a diffusion region FD2 and a double conversion gain gate DG. The unit pixel 400f may further include a device isolation region 410a, a first insulating layer 420, a second insulating layer 430, a color filter CF, and a micro lens ML.

First and second floating diffusion regions FD1 and FD2 of FIG. 20, a double conversion gain gate DG, a first insulating layer 420, a second insulating layer 430, a color filter CF, and a microlens (ML) is the first and second floating diffusion regions FD1 and FD2 of FIG. 11, a double conversion gain gate DG, a first insulating layer 420, a second insulating layer 430, and a color filter CF. ) And the micro lens ML may be substantially the same. The device isolation region 410a of FIG. 20 may be substantially the same as the device isolation region 410a of FIG. 16.

The photoelectric conversion region PD" of FIG. 20 may be formed in a region farther from the first surface 401a of the semiconductor substrate 401 (that is, relatively deeper) than the photoelectric conversion region PD of FIG. 11, It may be formed entirely in the unit pixel area to have a relatively large area. The transfer gate TG" of FIG. 20 has a photoelectric conversion region PD" and a first floating diffusion similar to the transfer gate TG' of FIG. It may be formed vertically from the first surface 401a of the semiconductor substrate 401 so as to be adjacent to the region FD1. In FIG. 20, a part of the first insulating layer 420 under the transfer gate TG" and photoelectric conversion Although the region PD" is shown to be in contact with each other, a part of the first insulating layer 420 under the transfer gate TG" and the photoelectric conversion region PD" may be spaced apart from each other according to embodiments.

Meanwhile, according to an exemplary embodiment, the double conversion gain gate DG and/or the transfer gate TG" of FIG. 20 has a flat lower surface of at least one lower region and a lower edge thereof as described above with reference to FIGS. 13 and 14 The unit pixel 400f of FIG. 20 may further include a third insulating layer 440 as described above with reference to FIG. 18.

Referring to FIG. 21, a unit pixel 400g of the image sensor is a photoelectric conversion region PD, a first floating diffusion region FD1, a transfer gate TG, and a second floating diffusion region formed on a semiconductor substrate 401. (FD2) and a double conversion gain gate (DG). The unit pixel 400g may further include a device isolation region 410, a first insulating layer 420, a second insulating layer 430, a color filter CF', and a micro lens ML'. For example, the unit pixel 400g may be included in the FIS.

Photoelectric conversion region PD, first and second floating diffusion regions FD1 and FD2, transfer gate TG, double conversion gain gate DG, device isolation region 410, and first insulating layer of FIG. 21 The photoelectric conversion region PD, the first and second floating diffusion regions FD1 and FD2 of FIG. 11, the transfer gate TG, and the double conversion gain gate DG of the 420 and the second insulating layer 430 , The device isolation region 410, the first insulating layer 420, and the second insulating layer 430 may be substantially the same.

The color filter CF' of FIG. 21 may be formed on the first surface 401b of the semiconductor substrate 401. For example, the color filter CF' may be formed on the transfer gate TG and the double conversion gain gate DG, or on the second insulating layer 430. The micro lens ML' may be formed on the color filter CF'.

Meanwhile, according to an embodiment, the double conversion gain gate DG of FIG. 21 may be formed such that the lower surface of at least one lower region is flat and the lower edge is round, as described above with reference to FIGS. 13 and 14, and FIG. The device isolation region 410 of 21 may be formed from the first surface 401a to the second surface 401b of the semiconductor substrate 401 as described above with reference to FIG. 16, or the photoelectric conversion region PD ) May be formed to contact the second surface 401b of the semiconductor substrate 401 as described above with reference to FIG. 17, and the transfer gate TG of FIG. 21 is vertical as described above with reference to FIGS. 19 and 20 It may have a type gate structure. In addition, the unit pixel 400G of FIG. 21 may further include a third insulating layer 440 as described above with reference to FIG. 18.

22 is a block diagram illustrating an image sensor including a unit pixel according to embodiments of the present invention.

Referring to FIG. 22, the image sensor 500 includes a pixel array 510 and a signal processing unit 520.

The pixel array 510 generates a plurality of pixel signals (eg, analog pixel signals) based on incident light. The pixel array 510 may include a plurality of unit pixels arranged in a matrix form including a plurality of rows and a plurality of columns. Each of the plurality of unit pixels may be the unit pixel 100 of FIG. 1, and FIGS. 2, 3, 4, 5, 7, 8, 9, 11, 13, 16, 17, 18, 19, 20, and 21 It may have the structure described above with reference to. That is, each of the plurality of unit pixels includes a double conversion gain gate having a vertical gate structure to increase a surface area in contact with the semiconductor substrate, and a double conversion gain control signal applied to the double conversion gain gate is selectively activated. Accordingly, the conversion gain of the plurality of unit pixels and the image sensor 500 including the same can be effectively adjusted without reducing the fill factor.

The signal processing unit 520 generates image data (eg, digital valid image data) based on the plurality of pixel signals. The signal processing unit 520 includes a row driver 530, an analog-to-digital conversion (ADC) unit 540, a digital signal processing (DSP) unit 550 and a control unit 560 It may include.

The row driver 530 may be connected to each row of the pixel array 510 and may generate a driving signal for driving each row. For example, the row driver 530 may drive the plurality of unit pixels included in the pixel array 510 in a row unit.

The ADC unit 540 is connected to each column of the pixel array 510 and may convert an analog signal output from the pixel array 510 into a digital signal. In one embodiment, the ADC unit 540 includes a plurality of analog-to-digital converters, and may perform a column ADC that converts analog signals output for each column line into digital signals in parallel (ie, at the same time). . In another embodiment, the ADC unit 540 includes a single analog-to-digital converter, and may perform a single ADC that sequentially converts the analog signals into digital signals.

According to an embodiment, the ADC unit 540 may include at least one Correlated Double Sampling (CDS) unit (not shown) for extracting an effective signal component. In an embodiment, the CDS unit may perform analog double sampling for extracting the effective image component based on a difference between an analog reset signal representing a reset component and an analog image signal representing an image component. In another embodiment, the CDS unit converts the analog reset signal and the analog image signal into digital signals, respectively, and then performs digital double sampling to extract the difference between the two digital signals as the effective image components. can do. In another embodiment, the CDS unit may perform dual correlation double sampling, which performs both the analog double sampling and the digital double sampling.

The DSP unit 550 may receive a digital signal output from the ADC unit 540 and may perform image data processing on the digital signal. For example, the DSP unit 550 may perform image interpolation, color correction, white balance, gamma correction, color conversion, and the like. .

The control unit 560 may control the row driving unit 530, the ADC unit 540 and the DSP unit 550. The control unit 560 may supply control signals such as a clock signal and a timing control signal required to operate the row driver 530, the ADC unit 540, and the DSP unit 550. In one embodiment, the controller 560 may include a logic control circuit, a phase lock loop (PLL) circuit, a timing control circuit, a communication interface circuit, and the like.

In an embodiment, the controller 560 may receive a user setting signal USS for setting an operation mode of the image sensor 500. The user setting signal USS represents a signal input from the user, and a double conversion gain control signal (DX in FIG. 1) applied to the unit pixel of the pixel array 510 is selectively applied based on the user setting signal USS. Can be activated. For example, when the user setting signal USS has a first value corresponding to a high illuminance operation mode, the controller 560 may activate the double conversion gain control signal, and the unit pixel and image sensor ( 500) may operate as in the example shown in FIG. 10B based on the activated double conversion gain control signal. When the user setting signal USS has a second value corresponding to the low-illuminance operation mode, the controller 560 may deactivate the double conversion gain control signal, and the unit pixel and image sensor 500 deactivate the signal. Based on the obtained double conversion gain control signal, it may operate as in the example shown in FIG. 10A. In the image sensor 500, whether to activate the double conversion gain control signal may be manually determined based on a user setting signal USS input from the user.

23 is a flow chart for explaining an operation of the image sensor of FIG. 22.

22 and 23, the control unit 560 included in the signal processing unit 520 determines whether the user setting signal USS has the first value or the second value (step S110).

When the user setting signal USS has the first value (S110: Yes), the control unit 560 included in the signal processing unit 520 determines that the image sensor 500 is set to the high illuminance operation mode, and The double conversion gain control signal is activated (step S130). The image sensor 500 operates in an optical integration mode (TINT) and a read mode (TRD) as shown in FIG. 10B based on the activated double conversion gain control signal (step S170).

When the user setting signal USS has the second value (S110: No), the control unit 560 included in the signal processing unit 520 determines that the image sensor 500 is set to the low-light operation mode, and the The double conversion gain control signal is deactivated (step S150). The image sensor 500 operates in an optical integration mode (TINT) and a read mode (TRD) as shown in FIG. 10A based on the deactivated double conversion gain control signal (step S170).

24 is a block diagram illustrating an image sensor including a unit pixel according to example embodiments.

Referring to FIG. 24, the image sensor 600 includes a pixel array 610 and a signal processing unit 620.

The pixel array 610 includes a plurality of unit pixels, and generates a plurality of pixel signals based on incident light. The signal processing unit 620 generates image data based on the plurality of pixel signals. The signal processing unit 620 may include a row driver 630, an ADC unit 640, a DSP unit 650, a control unit 660, and an operation mode detection unit 670. The pixel array 610, row driver 630, ADC unit 640 and DSP unit 650 of FIG. 24 are the pixel array 510, row driver 530, ADC unit 540, and DSP unit of FIG. Each of 550 may be substantially the same.

The operation mode detector 670 may automatically determine the operation mode of the image sensor based on the illuminance of the incident light and the reference illuminance. For example, when the illuminance of the incident light is higher than the reference illuminance, the operation mode detector 670 may generate a mode signal MS having a first value corresponding to the high illuminance operation mode. When the illuminance of the incident light is lower than or equal to the reference illuminance, the operation mode detector 670 may generate a mode signal MS having a second value corresponding to the low illuminance operation mode.

The control unit 660 may control the row driving unit 630, the ADC unit 640, and the DSP unit 650. In one embodiment, the controller 660 receives a mode signal MS, and a double conversion gain control signal (DX in FIG. 1) applied to a unit pixel of the pixel array 610 based on the mode signal MS Can be selectively activated. For example, when the user setting signal USS has the first value, the control unit 660 may activate the double conversion gain control signal, and the unit pixel and image sensor 600 may be the activated Based on the double conversion gain control signal, it may operate like the example shown in FIG. 10B. When the user setting signal USS has the second value, the controller 660 may deactivate the double conversion gain control signal, and the unit pixel and image sensor 600 control the deactivated double conversion gain. Based on the signal, it may operate as in the example shown in FIG. 10A. The image sensor 600 may automatically determine whether to activate the double conversion gain control signal based on the illuminance of the incident light.

25 is a flowchart for explaining an operation of the image sensor of FIG. 24.

Referring to FIGS. 24 and 25, the operation mode detection unit 670 included in the signal processing unit 620 determines whether the illuminance of the incident light is higher, lower, or equal to the reference illuminance (step S210).

When the illuminance of the incident light is higher than the reference illuminance (S210: Yes), the operation mode detection unit 670 included in the signal processing unit 620 is a mode signal having the first value corresponding to the high illuminance operation mode ( MS), and the control unit 660 included in the signal processing unit 620 activates the double conversion gain control signal based on the mode signal MS (step S230). The image sensor 600 operates in an optical integration mode (TINT) and a read mode (TRD) as shown in FIG. 10B based on the activated double conversion gain control signal (step S270).

When the illuminance of the incident light is lower than or equal to the reference illuminance (S210: No), the operation mode detection unit 670 included in the signal processing unit 620 is a mode signal having the second value corresponding to the low illuminance operation mode. (MS) is generated, and the control unit 660 included in the signal processing unit 620 deactivates the double conversion gain control signal based on the mode signal MS (step S250). The image sensor 600 operates in an optical integration mode (TINT) and a read mode (TRD) as shown in FIG. 10A based on the deactivated double conversion gain control signal (step S270).

26 is a block diagram illustrating a computing system including an image sensor according to embodiments of the present invention.

Referring to FIG. 26, the computing system 900 may include a processor 910, a memory device 920, a storage device 930, an image sensor 940, an input/output device 950, and a power device 960. have. Meanwhile, although not shown in FIG. 26, the computing system 900 may further include ports capable of communicating with a video card, a sound card, a memory card, a USB device, or the like, or with other electronic systems. .

The processor 910 may perform specific calculations or tasks. Depending on the embodiment, the processor 910 may be a micro-processor or a central processing unit (CPU). The processor 910 is connected to the memory device 920, the storage device 930, and the input/output device 950 through an address bus, a control bus, and a data bus to perform communication. Can be done. Depending on the embodiment, the processor 910 may also be connected to an expansion bus such as a Peripheral Component Interconnect (PCI) bus.

The memory device 920 may store data necessary for the operation of the computing system 900. For example, the memory device 920 includes a volatile memory device such as a dynamic random access memory (DRAM), a static random access memory (SRAM), and the like, and an Erasable Programmable Read-Only Memory. ; EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), flash memory, phase change random access memory (PRAM), ferroelectric random access memory; Nonvolatile memory devices such as FRAM), resistive random access memory (RRAM), and magnetic random access memory (MRAM) may be included.

The storage device 930 may include a solid state drive, a hard disk drive, and a CD-ROM. The input/output device 950 may include an input means such as a keyboard, a keypad, and a mouse, and an output means such as a printer and a display. The power supply device 960 may supply an operating voltage required for the operation of the computing system 900.

The image sensor 940 may be connected to the processor 910 through the buses or other communication links to perform communication. The image sensor 940 may be one of the image sensors 500 and 600 of FIGS. 22 and 24, and may be 1, 2, 3, 4, 5, 7, 8, 9, 11, 13, 16, 17, The unit pixel described above with reference to 18, 19, 20, and 21 may be included. That is, the unit pixel includes a double conversion gain gate having a vertical gate structure such that a surface area in contact with the semiconductor substrate is increased, and a double conversion gain control signal applied to the double conversion gain gate is selectively activated, so that the fill factor The conversion gain of the unit pixel and the image sensor 940 including the unit pixel may be effectively adjusted without a decrease in.

The image sensor 940 may be implemented in various types of packages. For example, at least some components of the image sensor 940 are PoP (Package on Package), Ball grid arrays (BGAs), Chip scale packages (CSPs), Plastic Leaded Chip Carrier (PLCC), Plastic Dual In-Line Package. (PDIP), Die in Waffle Pack, Die in Wafer Form, Chip On Board(COB), Ceramic Dual In-Line Package(CERDIP), Plastic Metric Quad Flat Pack(MQFP), Thin Quad Flatpack(TQFP), Small Outline( SOIC), Shrink Small Outline Package(SSOP), Thin Small Outline(TSOP), Thin Quad Flatpack(TQFP), System In Package(SIP), Multi Chip Package(MCP), Wafer-level Fabricated Package(WFP), Wafer- It can be implemented using packages such as Level Processed Stack Package (WSP).

Depending on the embodiment, the image sensor 940 may be integrated on one chip together with the processor 910 or may be integrated on different chips. Meanwhile, the computing system 900 should be interpreted as an arbitrary computing system using an image sensor. For example, the computing system 900 may include a digital camera, a mobile phone, a personal digital assistant (PDA), a portable multimedia player (PMP), a smart phone, and the like.

27 is a block diagram illustrating an example of an interface used in the computing system of FIG. 26.

Referring to FIG. 27, the computing system 1000 may be implemented as a data processing device (eg, mobile phone, PDA, PMP, smart phone, etc.) that can use or support an MIPI interface, and an application processor 1110 , A stacked image sensor 1140 and a display 1150 may be included.

The CSI host 1112 of the application processor 1110 may perform serial communication with the CSI device 1141 of the stacked image sensor 1140 through a camera serial interface (CSI). In one embodiment, the CSI host 1112 may include an optical deserializer (DES), and the CSI device 1141 may include an optical serializer (SER). The DSI host 1111 of the application processor 1110 may perform serial communication with the DSI device 1151 of the display 1150 through a Display Serial Interface (DSI). In one embodiment, the DSI host 1111 may include an optical serializer (SER), and the DSI device 1151 may include an optical deserializer (DES).

In addition, the computing system 1000 may further include a Radio Frequency (RF) chip 1160 capable of communicating with the application processor 1110. The PHY 1113 of the computing system 1000 and the PHY 1161 of the RF chip 1160 may transmit and receive data according to a Mobile Industry Processor Interface (MIPI) DigRF. In addition, the application processor 1110 may further include a DigRF MASTER 1114 that controls data transmission and reception according to the MIPI DigRF of the PHY 1161, and the RF chip 1160 is a DigRF controlled through the DigRF MASTER 1114. It may further include SLAVE 1162.

Meanwhile, the computing system 1000 includes a Global Positioning System (GPS) 1120, a storage 1170, a microphone 1180, a dynamic random access memory (DRAM) 1185, and a speaker 1190. I can. In addition, the computing system 1000 uses an Ultra WideBand (UWB) 1210, a Wireless Local Area Network (WLAN) 1220, and a Worldwide Interoperability for Microwave Access (WIMAX) 1230. Communication can be performed. However, the structure and interface of the computing system 1000 are only examples and are not limited thereto.

The present invention can be applied to an image sensor and any device and electronic device including the same. In particular, the present invention can be applied to computers, digital cameras, 3D cameras, mobile phones, PDAs, scanners, vehicle navigation, video phones, surveillance systems, auto focus systems, tracking systems, motion detection systems, image stabilization systems, and the like.

Although described above with reference to the preferred embodiments of the present invention, those skilled in the art will be able to variously modify and change the present invention within the scope not departing from the spirit and scope of the present invention described in the following claims. You will understand that you can.

Claims (20)

A photoelectric conversion region formed in the semiconductor substrate and collecting photocharges based on incident light;
A first floating diffusion region formed in the semiconductor substrate to be spaced apart from the photoelectric conversion region;
A transfer gate formed on the semiconductor substrate between the photoelectric conversion region and the first floating diffusion region and transferring the photocharges to the first floating diffusion region based on a transmission control signal;
A second floating diffusion region formed in the semiconductor substrate to be spaced apart from the photoelectric conversion region and the first floating diffusion region; And
A double formed vertically from the first surface of the semiconductor substrate so as to be adjacent to the first and second floating diffusion regions, and selectively transmits the photocharges to the second floating diffusion region based on a double conversion gain control signal Including a conversion gain gate,
The double conversion gain gate,
At least one lower region formed inside the semiconductor substrate, at least a portion of which is included in the semiconductor substrate and surrounded by the semiconductor substrate; And
And an upper region formed on the first surface of the semiconductor substrate and connected to the at least one lower region,
A unit pixel of an image sensor, wherein a lower surface of the at least one lower region of the double conversion gain gate is flat, and a lower edge of the at least one lower region of the double conversion gain gate is round. delete The method of claim 1,
A unit pixel of an image sensor, wherein a depth of the at least one lower region of the double conversion gain gate is shallower than a depth of the first and second floating diffusion regions. A photoelectric conversion region formed in the semiconductor substrate and collecting photocharges based on incident light;
A first floating diffusion region formed in the semiconductor substrate to be spaced apart from the photoelectric conversion region;
A transfer gate formed on the semiconductor substrate between the photoelectric conversion region and the first floating diffusion region and transferring the photocharges to the first floating diffusion region based on a transmission control signal;
A second floating diffusion region formed in the semiconductor substrate to be spaced apart from the photoelectric conversion region and the first floating diffusion region; And
A double formed vertically from the first surface of the semiconductor substrate so as to be adjacent to the first and second floating diffusion regions, and selectively transmits the photocharges to the second floating diffusion region based on a double conversion gain control signal Including a conversion gain gate,
The double conversion gain gate,
At least one lower region formed inside the semiconductor substrate, at least a portion of which is included in the semiconductor substrate and surrounded by the semiconductor substrate; And
And an upper region formed on the first surface of the semiconductor substrate and connected to the at least one lower region,
A unit pixel of an image sensor, characterized in that as the depth of the at least one lower region of the double conversion gain gate increases, the conversion gain of the unit pixel decreases. A photoelectric conversion region formed in the semiconductor substrate and collecting photocharges based on incident light;
A first floating diffusion region formed in the semiconductor substrate to be spaced apart from the photoelectric conversion region;
A transfer gate formed on the semiconductor substrate between the photoelectric conversion region and the first floating diffusion region and transferring the photocharges to the first floating diffusion region based on a transmission control signal;
A second floating diffusion region formed in the semiconductor substrate to be spaced apart from the photoelectric conversion region and the first floating diffusion region; And
A double formed vertically from the first surface of the semiconductor substrate so as to be adjacent to the first and second floating diffusion regions, and selectively transmits the photocharges to the second floating diffusion region based on a double conversion gain control signal Including a conversion gain gate,
The double conversion gain gate,
At least one lower region formed inside the semiconductor substrate, at least a portion of which is included in the semiconductor substrate and surrounded by the semiconductor substrate; And
And an upper region formed on the first surface of the semiconductor substrate and connected to the at least one lower region,
A unit pixel of an image sensor, characterized in that as the number of the at least one lower region of the double conversion gain gate increases, the conversion gain of the unit pixel decreases. delete The method of claim 1,
A unit pixel of an image sensor, wherein a radius of curvature of a lower edge of the at least one lower region of the double conversion gain gate has a value between 10 nm and 100 nm. The method of claim 1,
And a reset gate formed on the semiconductor substrate and configured to reset the first and second floating diffusion regions based on a reset signal. The method of claim 8,
The first floating diffusion region is formed in the semiconductor substrate between the transfer gate and the double conversion gain gate, and the second floating diffusion region is formed in the semiconductor substrate between the double conversion gain gate and the reset gate. A unit pixel of an image sensor characterized by. The method of claim 8,
The first floating diffusion region is a unit pixel of an image sensor, wherein the first floating diffusion region is formed in the semiconductor substrate between the transfer gate and the double conversion gain gate and between the transfer gate and the reset gate. The method of claim 1,
The unit pixel of an image sensor, wherein the double conversion gain control signal is selectively activated according to the illuminance of the incident light. The method of claim 1,
The unit pixel of an image sensor, wherein the double conversion gain control signal is selectively activated based on an externally applied user setting signal. The method of claim 1,
And an output unit connected to the first floating diffusion region and generating a pixel signal corresponding to the incident light based on the photocharges. A pixel array including a plurality of unit pixels and generating a plurality of pixel signals based on incident light; And
And a signal processor that generates image data based on the plurality of pixel signals,
Each of the plurality of unit pixels,
A photoelectric conversion region formed in a semiconductor substrate and collecting photocharges based on the incident light;
A first floating diffusion region formed in the semiconductor substrate to be spaced apart from the photoelectric conversion region;
A transfer gate formed on the semiconductor substrate between the photoelectric conversion region and the first floating diffusion region and transferring the photocharges to the first floating diffusion region based on a transmission control signal;
A second floating diffusion region formed in the semiconductor substrate to be spaced apart from the photoelectric conversion region and the first floating diffusion region; And
A double formed vertically from the first surface of the semiconductor substrate so as to be adjacent to the first and second floating diffusion regions, and selectively transmits the photocharges to the second floating diffusion region based on a double conversion gain control signal Including a conversion gain gate,
The double conversion gain gate,
At least one lower region formed inside the semiconductor substrate, at least a portion of which is included in the semiconductor substrate and surrounded by the semiconductor substrate; And
And an upper region formed on the first surface of the semiconductor substrate and connected to the at least one lower region,
A lower surface of the at least one lower region of the double conversion gain gate is flat, and a lower edge of the at least one lower region of the double conversion gain gate is rounded. The method of claim 14,
The signal processing unit includes an operation mode detection unit that automatically determines an operation mode of the image sensor based on an illuminance and a reference illuminance of the incident light,
When the illuminance of the incident light is higher than the reference illuminance, the signal processor activates the double conversion gain control signal, and when the illuminance of the incident light is lower than or equal to the reference illuminance, the signal processor An image sensor, characterized in that to deactivate. The method of claim 14,
The signal processing unit receives a user setting signal for setting an operation mode of the image sensor,
When the user-set signal corresponds to a high-illuminance operation mode, the signal processor activates the double conversion gain control signal, and when the user-set signal corresponds to a low-light operation mode, the signal processor controls the double conversion gain An image sensor, characterized in that the signal is deactivated. Forming a photoelectric conversion region, a first floating diffusion region spaced apart from the photoelectric conversion region, and a second floating diffusion region spaced apart from the photoelectric conversion region and the first floating diffusion region in a semiconductor substrate;
Forming a recess by removing a portion of the semiconductor substrate between the first floating diffusion region and the second floating diffusion region;
Forming a transfer gate on the semiconductor substrate between the photoelectric conversion region and the first floating diffusion region; And
And forming a double conversion gain gate vertically from the first surface of the semiconductor substrate to fill the recess and to be adjacent to the first and second floating diffusion regions. The method of claim 17,
The method of manufacturing an image sensor, wherein a lower surface of the recess is flat and a lower edge of the recess is round. The method of claim 18,
The method of manufacturing an image sensor, characterized in that the radius of curvature of the lower edge of the recess has a value between 10 nm and 100 nm. The method of claim 17,
Forming a device isolation region perpendicular to the first surface of the semiconductor substrate to define a unit pixel region,
The photoelectric conversion region, the first and second floating diffusion regions, the transfer gate, and the double conversion gain gate are formed in the unit pixel region.

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