KR102182678B1 - Method and appratus for predicting fault pattern using multi-classifier based on feature selection method in semiconductor manufacturing process - Google Patents

Abstract

In a semiconductor manufacturing process according to various embodiments, a defect pattern prediction apparatus and method using a multi-classifier according to a feature selection technique collects a data set from a semiconductor to be manufactured, selects a plurality of features from the data set, and The classifiers may be used to predict whether the semiconductor is defective based on features, and may be configured to determine whether the semiconductor is defective by combining prediction results output from the classifiers.

Description

A device and method for predicting a defect pattern using a multi-classifier according to a feature selection technique in the semiconductor manufacturing process {METHOD AND APPRATUS FOR PREDICTING FAULT PATTERN USING MULTI-CLASSIFIER BASED ON FEATURE SELECTION METHOD IN SEMICONDUCTOR MANUFACTURING PROCESS}

Various embodiments relate to an apparatus and method for predicting a defect pattern using a multi classifier according to a feature selection technique in a semiconductor manufacturing process.

The semiconductor manufacturing process proceeds in the order of FAB (Wafer fabrication) process, probe test process, assembly process, and package test process. The FAB process is a process that combines layers on a wafer surface to form hundreds of chips. The wafer probe test process is a process of determining pass/fail by applying electrical stimulation to the chip in the wafer after the FAB process is completed to check for normal functioning. Currently, the semiconductor process focuses on the FAB process and the probe test process to predict the semiconductor yield.

However, with the development of semiconductor manufacturing technology and an increase in the number of chips constituting the wafer, there is a problem that it takes time and cost. Therefore, research is needed to reduce time and cost by predicting the final inspection yield in the semiconductor industry. Complex wafer fabrication processes may introduce some defects and result in failure to produce the final product. Therefore, it is necessary to detect and classify errors in the manufacturing process, and improve the quality and reliability of semiconductors through prediction of defective patterns before final production of the product.

In a semiconductor manufacturing process according to various embodiments, a defect pattern prediction apparatus using a multi-classifier according to a feature selection technique includes a data collection unit that collects a data set from a manufactured semiconductor, and a plurality of features that select a plurality of features from the data set. A plurality of feature selection units, a plurality of classifiers that predict whether the semiconductor is defective based on the characteristics, and a determination unit that determines whether the semiconductor is defective by combining prediction results output from the classifiers can do.

A method for predicting a defect pattern using a multi-classifier according to a feature selection technique in a semiconductor manufacturing process according to various embodiments includes: collecting a data set from a semiconductor to be manufactured, selecting a plurality of features from the data set, and The method may include predicting whether the semiconductor is defective based on the features, and determining whether the semiconductor is defective by combining prediction results output from the classifiers using the classifiers. .

According to various embodiments, the apparatus for predicting a defective pattern may predict a defective pattern more effectively by predicting a defective pattern of a semiconductor using a plurality of classifiers. That is, since the defective pattern prediction apparatus predicts whether a semiconductor is defective using a plurality of classifiers, and determines whether the semiconductor is defective by combining the prediction results output from the classifiers, accuracy and reliability in predicting a defective pattern This can be improved.

1 is a diagram illustrating an apparatus for predicting a defective pattern according to various embodiments.
2 is a diagram illustrating a method of predicting a defective pattern according to various embodiments.
3 is a diagram illustrating a data preprocessing step of FIG. 2.

Hereinafter, various embodiments of the present document will be described with reference to the accompanying drawings.

Various embodiments of the present document and terms used therein are not intended to limit the technology described in this document to a specific embodiment, and should be understood to include various modifications, equivalents, and/or substitutes of the corresponding embodiment. In connection with the description of the drawings, similar reference numerals may be used for similar elements. Singular expressions may include plural expressions unless the context clearly indicates otherwise. In this document, expressions such as "A or B", "at least one of A and/or B", "A, B or C" or "at least one of A, B and/or C" are all of the items listed together. It can include possible combinations. Expressions such as "first", "second", "first" or "second" can modify the corresponding elements regardless of their order or importance, and are only used to distinguish one element from another. The components are not limited. When it is mentioned that a certain (eg, first) component is “(functionally or communicatively) connected” or “connected” to another (eg, second) component, the certain component is It may be directly connected to the component, or may be connected through another component (eg, a third component).

The term "module" used in this document includes a unit composed of hardware, software, or firmware, and may be used interchangeably with terms such as, for example, logic, logic blocks, parts, or circuits. A module may be an integrally configured component or a minimum unit or a part of one or more functions. For example, the module may be configured as an application-specific integrated circuit (ASIC).

Defect pattern prediction in the semiconductor manufacturing process is very important because it can reduce time and cost by using classification techniques of machine learning and data mining in a complex manufacturing process. In such a semiconductor manufacturing process, many studies are being conducted to predict a defective pattern. A.M. Ison proposed a decision tree-based failure pattern prediction model. By analyzing the data input from five sensors, a defective pattern of the plasma etch device was detected. Optical emission data was acquired from plasma, converted into discrete data through data analysis, and a decision tree was applied to generate a classification prediction model. He proposed a method for predicting the defect pattern based on the k-nearest neighbor rule. In the semiconductor manufacturing process, since there are features that are unnecessary for fault detection, the KNN rule was used to remove them and acquire adjacent features to obtain the main features. Tafazzoli proposed a pattern verification process using SVM. The proposed method combines three different SVMs (SVM-Linear, SVM-RBF, and SVM-Poly) to create a combined SVM classifier. Because one classifier was created by combining different classifiers, it showed a low classification error rate. Kittisak proposed the MeanDiff method for feature selection for 590 features through sensors in the FAB process. By using the extracted features, a decision tree and a classifier using boosting were created to improve the performance of bad pattern prediction.

Defect pattern prediction has a large impact on cost and quality, and thus requires a classifier with high accuracy. Therefore, a method of selecting a feature and a method of combining several classifiers to predict a defective pattern is important. In various embodiments, a method of generating classifiers according to several feature selection techniques and combining output data according to the classifiers by using a density-shafer (DS) is proposed.

Feature selection techniques extract necessary features according to the characteristics of an algorithm, but there is a difference in how to select a pattern useful for classification. That is, there is a large difference in performance of the feature selection technique according to data input. Therefore, in order to predict a defective pattern, a combination of several feature selection techniques is required. This is because there are features that can be classified according to specific data. When several classifiers are trained according to the feature selection technique, predicted output data differ according to input data. Therefore, a combination method for this is required. There are several techniques for a final decision by combining the information of the output data. DS expresses the degree of confidence in intervals and combines information by establishing a hypothetical set that is beta to each other like probability theory. Through this, information that is finally predicted using data output from several classifiers may be provided.

DS (Dempster-Shafer Theory) is a mathematical theory that deals with uncertain and inaccurate problems proposed by Arthur Dempster and Glenn Shafer. DS provides an effective method, such as setting the evidence section, using belief values and probability values for data sets. DS expresses the degree of confidence in intervals and establishes a set of hypotheses that are mutually exclusive, such as probability. The set of objects is called the environment and is denoted by θ. θ can have several elements, such as θ = {θ ₁ , θ ₂ , θ ₃ , ..., θ _n }, and the number of subsets is 2 ^k . When θ has only one element, it is called an identification frame. What consists of ^2k subsets is called a power set and is denoted as Θ. The degree to which Θ is supported by a certain evidence is called the basic probability assignment function m, and can be expressed as [Equation 1] below. As shown in [Equation 2] below, m is mapped to a probability value of 0 for the empty set, and the sum of m becomes 1 for all subsets of Θ.

Given the evidence, Belief(H), which is a belief value for an arbitrary hypothesis H (Hypnosis), is as shown in [Equation 3] below.

As shown in [Equation 4] below, the degree of trust is determined according to the reliability of the given evidence and the influence of the overall environment, and the ratio of the degree is denoted by e.

이면, 두 증거들간의 융합의 믿음 값은 0이다.Here, r is a value between 0 and 1 (0≤r≤1), if r=0, it is true, and if r=1, it becomes false. DS calculates the value of a new belief through the process of fusion between different evidences. Therefore, the fusion between the evidence can be expressed as the following [Equation 5],

If so, the belief value of the fusion between the two evidences is zero.

DS is not expressed as a Bel(H) value for the confidence scale for H, but is expressed in the same interval as [Bel(H), Pls(H)]. This interval is called the Evidential Interval. Plausibility (Pls) refers to the range in which hypotheses are not negated based on evidence (empty intervals excluding the intervals between true and false), and refers to the possibility of being maximally trusted. Bel has a range from 0 to 1 (the range of true and false), and Pls can be defined as in [Equation 6] and has a value of [0,1]. Also, like the fusion of belief values, the likelihood value can express the process of fusion from a number of evidences.

1 is a diagram illustrating an apparatus for predicting a defective pattern according to various embodiments.

Referring to FIG. 1, the apparatus 100 for predicting a defective pattern according to various embodiments includes a data collection unit 110, a plurality of feature selection units 120, a plurality of classifiers 130, and a determination unit 140. ) Can be included.

The data collection unit 110 may collect a data set from a manufactured semiconductor.

The feature selection units 120 may select a plurality of features related to the defective pattern from the data set. In this case, the feature selection units 120 may respectively correspond to the plurality of classifiers 130 and extract features related to the defective pattern. Here, the feature selection units 120 may select features using a plurality of feature selection methods. Each feature selection unit 120 may use a respective feature selection method. For example, the feature selection methods may include at least one of Correlation-based Feature Selection (CFS), Symmetrical Uncertainty (SU), Information Gain (IG), or Combination Features (CF). CFS is a method of analyzing the correlation between two variables using Pearson's correlation coefficient, and extracting a feature with a high correlation. SU is a method of evaluating the value of a feature set attribute after measuring the uncertainty about symmetry in relation to another feature set. IG is a method of selecting features by comparing the average amount of information between the target class and input features, and is also used in Decision Tree C4.5. CF is a method of selecting a feature that is commonly entered from the result of other feature selection methods.

The classifiers 130 may classify a semiconductor based on features selected by the feature selectors 120. In this case, the classifiers 130 may predict probability values for pass and fail for the semiconductor. For example, the classifiers 130 may include at least one of Naive Bayesian (NB), Decision Tree C4.5, Support Vector Machine (SVM), Back Propagation Network (BPN), or Random Forest (RF).

The determination unit 140 may determine a semiconductor by combining the prediction results of the classifiers 130. In this case, the determination unit 140 may determine pass/fail of the semiconductor by combining the prediction results of the classifiers 130 based on a density-shafer (DS). For example, the determination unit 140 may determine a relatively high probability value by comparing probability values for pass and fail for the semiconductor.

2 is a diagram illustrating a method of predicting a defective pattern according to various embodiments.

Referring to FIG. 2, the apparatus 100 for predicting a defective pattern may collect a data set from a semiconductor manufactured in step 210. For example, the data set may be a semi-conductor manufacturing (SECOM) data set, as FAB data collected from a semiconductor through 590 sensors in a semiconductor manufacturing process, and may include 1567 records and 590 features. Here, among 1567 records, the number of fail (defect pattern) is 104 (encoded as 1), and the number of pass (quantitative pattern) may be composed of 1463 (encoded as -1).

The bad pattern prediction apparatus 100 may perform data preprocessing on the data set in step 220. In this case, the apparatus 100 for predicting a defective pattern may extract a plurality of features related to the defective pattern in response to the plurality of classifiers 130. For example, the bad pattern prediction apparatus 100 may extract features related to the bad pattern from 590 features from the SECOM data set. However, due to the imbalance of pass/fail, it is very difficult to accurately analyze the SECOM data set. Therefore, for accurate pass/fail classification, features related to a defective pattern should be extracted from among 590 features. To this end, the bad pattern prediction apparatus 100 may perform data pre-processing to analyze 1567 records and 590 features of the SECOM data set.

3 is a diagram illustrating a data preprocessing step of FIG. 2.

Referring to FIG. 3, the apparatus 100 for predicting a bad pattern may perform data cleaning on a data set in step 310. In this case, data cleaning is an operation to remove unnecessary data from the data set. For example, the apparatus 100 for predicting a defective pattern may perform data cleaning based on two rules. According to the first rule, the apparatus 100 for predicting a bad pattern may remove records including a missing value. According to the second rule, the apparatus 100 for predicting a bad pattern may remove data including a missing value, data that is'not available', and data composed of only one data (single value) among the features. As a result of data cleaning, 48 records may be removed, leaving a total of 1,519 records, and 281 features may be removed, leaving 309 features.

The apparatus 100 for predicting a bad pattern may select a plurality of features from the data set in step 320. In this case, the apparatus 100 for predicting a defective pattern may select features based on the data cleaning result. Here, the bad pattern prediction apparatus 100 may select features using a plurality of feature selection methods. For example, the bad pattern prediction apparatus 100 may extract features capable of distinguishing pass/fail from among 309 features remaining as a result of data cleaning. For example, the apparatus 100 for predicting a bad pattern may use four feature selection methods, and three commonly used feature selection methods. For example, the feature selection methods may include at least one of Correlation-based Feature Selection (CFS), Symmetrical Uncertainty (SU), Information Gain (IG), or Combination Features (CF). CFS is a method of analyzing the correlation between two variables using Pearson's correlation coefficient, and extracting a feature with a high correlation. SU is a method of evaluating the value of a feature set attribute after measuring the uncertainty about symmetry in relation to another feature set. IG is a method of selecting features by comparing the average amount of information between the target class and input features, and is also used in Decision Tree C4.5. CF is a method of selecting a common feature from the results of different feature selection methods. Through this, the bad pattern prediction apparatus 100 may select features as shown in [Table 1] from the 1519 records and 309 features remaining as a result of data cleaning. Here, the bad pattern prediction apparatus 100 selects the same features based on the SU and IG, and thus any one feature selection method of SU or IG may be used. In addition, the bad pattern prediction apparatus 100 may select 12 features in common in correspondence with CFS, SU, and IG based on CF.

The apparatus 100 for predicting a bad pattern may scale features in step 330. In this case, the bad pattern prediction apparatus 100 may scale features selected from the data set. Since the range of the data size corresponding to each feature is different, scaling for features may be required. Here, scaling is an operation of generalizing a data set to data up to [0, 1]. Through this, when learning through each classifier, bias for specific features can be reduced and execution speed can be improved. For example, the apparatus 100 for predicting a defective pattern may scale features based on Equation 7 below.

Here, x denotes input data, x'denotes generalized data, and Average(X), Min(X), and Max(X) denote the average, minimum, and maximum values of the input data X corresponding to the features. I can.

The bad pattern prediction apparatus 100 may perform oversampling in step 340. In general, in a semiconductor manufacturing process, the number of data on defective patterns is very small. Therefore, in the case of learning, since a situation occurs in which a large number of patterns (quantitative patterns) are predicted, a small number of classes (defective patterns) cannot be predicted. Therefore, oversampling for a small number of classes is required. For example, a 70% data set and a 30% data set could be used for experiments. 70% of the experimental data of the SECOM data set may include 1009 quantitative patterns and 42 defective patterns in a ratio of 24:1 out of a total of 1051 records. For this reason, the apparatus 100 for predicting a defective pattern may generate data for a defective pattern using a synthetic minority over-sampling technique (SMOTE). For example, the apparatus 100 for predicting a defective pattern may oversample the data so that the ratio of the quantitative patterns and the defective patterns is 5:5.

The apparatus 100 for predicting a defective pattern may classify a semiconductor to be manufactured using the plurality of classifiers 130 in step 230. At this time, the bad pattern prediction apparatus 100 is a DS (dempster-shafer)-based multi classifier, and performs learning to classify a semiconductor using a plurality of classifiers respectively corresponding to feature selection methods, and predicted by the classifiers. Results can be provided by fusion. For example, the classifiers may include at least one of Naive Bayesian (NB), Decision Tree C4.5, Support Vector Machine (SVM), Back Propagation Network (BPN), or Random Forest (RF). For example, the quantity pattern prediction apparatus 100 may combine prediction results of three classifiers 130 based on DS. When the prediction result of the first classifier 130 is m ₁ , the prediction result of the second classifier 130 is m _2, and the prediction result of the third classifier 130 is m ₃ as shown in [Equation 8] below. , The quantity pattern prediction apparatus 100 may combine prediction results of the classifiers 130 into m ₄ as shown in [Equation 9] below. In addition, the quantity pattern prediction apparatus 100 may determine a value having a high probability among m ₄ (Pass) and m ₄ (Fail) as a final output variable.

Experiments and evaluations of the apparatus 100 for predicting a defective pattern according to various embodiments were conducted. At this time, using the SECOM data set, the performance of the defective pattern prediction apparatus 100 was evaluated. A total of 1519 record sets were 5-fold cross-validated. The confusion matrix was used as the criterion for performance evaluation, and sensitivity, specificity, and accuracy were calculated for each model.

First, the performance of the classifier 130 was evaluated for each feature selection method. Classifiers 130 are Naive Bayesian (NB), Support Vector Machine (SVM), Logistics Regression (LR), Back Propagation Network (BPN), Random Forest (RF), decision tree C4.5 (C4.5) and Bayesian Network. (BN) was used. Here, the performance measurement results of each of the classifiers 130 according to CFS, SU and IG, and CF are shown in [Table 2], [Table 3], and [Table 4] below.

According to [Table 2], the classifier 130 according to the CFS had the best sensitivity and specificity of 17.20% and 89.97%, respectively. SVM is a classifier that determines the boundary line, so it is learned to match only the pass without creating a boundary line that can classify a few classes fail. And because LR uses cost function, it depends on accuracy. Therefore, even LR cannot predict fail, which is a small number of classes. In CFS, NB is higher than other models when calculated by combining sensitivity and specificity. According to [Table 3], the classifier 130 according to SU and IF has the highest BN, and according to Table 4, the classifier 130 according to CF has the highest NB. The classifier 130 according to SU and IF is not suitable for predicting a pass because NB has a very high sensitivity, but a very low specificity. Both NB and BN use Bayes theory and are methods of calculating with posterior probability. That is, in the semiconductor manufacturing process, it can be said that the probability-based classification using bayes is most suitable.

Next, by applying a DS (dempster-shafer), an experiment was conducted on the combination of a plurality of classifiers 130. CFS and CF were applied to NB and SU, respectively, and IF was applied to BN. The experimental results of the multi-classifier applying DS are shown in GKRL [Table 5].

According to [Table 5], the accuracy is lower as the plurality of classifiers 130 are used, rather than the result of using one classifier. However, as the plurality of classifiers 130 are used, the sensitivity is mostly high, which is useful for predicting a defective pattern. High accuracy but very low sensitivity can be interpreted as being difficult to predict a small number of classes. When the CFS, SU, and IF models were combined, the accuracy was the highest at 81.29%. In addition, the model combining SU, IF and CF showed the highest sensitivity at 48.54%, but the lowest accuracy at 36.59%. Here, deviations in sensitivity and specificity are considered in predicting a defective pattern capable of predicting a small number of classes. In other words, what is satisfactory for both is that the model that combines CFS, SU, IF, and CF has the best performance. That is, the more feature selection methods are combined, the better performance can be secured.

A defect pattern prediction apparatus 100 according to various embodiments includes a data collection unit 110 for collecting a data set from a semiconductor to be manufactured, and a plurality of feature selection units 120 for selecting a plurality of features from the data set. , Based on the features, a plurality of classifiers 130 for predicting whether the semiconductor is defective, and a plate for determining whether the semiconductor is defective by combining prediction results output from the classifiers 130 May include government 140.

According to various embodiments, the feature selection units 120 may select features related to a defective pattern by using a plurality of feature selection methods, respectively.

According to various embodiments, the classifiers 130 are generated corresponding to the feature selection units, respectively, and may predict whether the semiconductor is defective or not, based on the feature selection methods.

According to various embodiments, the feature selection methods may include at least one of Correlation-based Feature Selection (CFS), Symmetrical Uncertainty (SU), Information Gain (IG), and Combination Features (CF).

According to various embodiments, the determination unit may combine prediction results output from the classifiers based on a Dempster-shafer.

A method for predicting a defective pattern according to various embodiments includes: collecting a data set from a semiconductor to be manufactured, selecting a plurality of features from the data set, and using a plurality of classifiers 130, based on the features. , Predicting whether the semiconductor is defective, and combining prediction results output from the classifiers 130 to determine whether the semiconductor is defective.

According to various embodiments, the defective pattern prediction apparatus 100 may predict a defective pattern of a semiconductor using a plurality of classifiers 130, thereby more effectively predicting a defective pattern. That is, since the defective pattern prediction apparatus 100 predicts whether the semiconductor is defective using a plurality of classifiers 130 and combines the prediction results output from the classifiers 130 to determine whether the semiconductor is defective, Accuracy and reliability can be improved in predicting patterns.

Although various embodiments of the present document have been described, various modifications may be made without departing from the scope of the various embodiments of the present document. Therefore, the scope of the various embodiments of the present document is limited to the described embodiments and should not be defined, but should be defined by the scope of the claims as well as the equivalents of the claims to be described later.

Claims (5)

In a defect pattern prediction apparatus using a multi classifier according to a feature selection technique in a semiconductor manufacturing process,
A data collection unit collecting a data set from a manufactured semiconductor;
A plurality of feature selection units for selecting a plurality of features from the data set;
A plurality of classifiers for predicting whether the semiconductor is defective based on the characteristics; And
A determination unit that combines prediction results output from the classifiers to determine whether the semiconductor is defective,
The feature selection units,
Using each of a plurality of feature selection methods, each of the features related to the defective pattern is selected,
The classifiers,
It is generated corresponding to each of the feature selection units, and based on the feature selection methods, each predicts whether the semiconductor is defective or not,
The feature selection methods,
Including at least any one of Correlation-based Feature Selection (CFS), Combination Features (CF), and Symmetrical Uncertainty (SU) or Information Gain (IG),
To select each of the above features,
Any one of the feature selection units uses the CF,
The other one of the feature selection units uses the CFS,
Another one of the feature selection units uses either the SU or the IG,
The above features are:
For the data set, after data cleaning for removing unnecessary data is performed, it is selected from the data set,
To generalize the data size of each of the features, scaled,
The prediction result output from any one of the classifiers is,
M ₁ (Pass) representing the probability that the semiconductor is quantitative and m ₁ (Fail) representing the probability that the semiconductor is defective,
The prediction result output from the other one of the classifiers is,
M ₂ (Pass) representing the probability that the semiconductor is quantitative and m ₂ (Fail) representing the probability that the semiconductor is defective,
The prediction result output from another one of the classifiers is,
M ₃ (Pass) representing the probability that the semiconductor is quantitative and m ₃ (Fail) representing the probability that the semiconductor is defective,
The determination unit,
The prediction results output from the classifiers are combined into m ₄ (Pass) representing the probability that the semiconductor is quantitative and m ₄ (Fail) representing the probability that the semiconductor is defective, as shown in the following equation,

When the m ₄ (Pass) is higher than the m ₄ (Fail), the semiconductor is determined to be quantitative, and when the m ₄ (Fail) is higher than the m ₄ (Pass), the semiconductor is determined to be defective .
delete delete The method of claim 1, wherein the determination unit,
An apparatus for combining prediction results output from the classifiers based on the Dempster-shafer.
In a method for predicting a defect pattern using a multi classifier according to a feature selection technique in a semiconductor manufacturing process,
Collecting a data set from a semiconductor manufactured by a data collection unit;
Selecting a plurality of features from the data set by using a plurality of feature selection methods, respectively, by a plurality of feature selection units;
Predicting whether or not the semiconductor is defective based on the features by a plurality of classifiers; And
A step of determining whether the semiconductor is defective by combining prediction results output from the classifiers,
The classifiers,
It is generated corresponding to each of the feature selection units, and based on the feature selection methods, each predicts whether the semiconductor is defective or not,
The feature selection methods,
Including at least any one of Correlation-based Feature Selection (CFS), Combination Features (CF), and Symmetrical Uncertainty (SU) or Information Gain (IG),
To select each of the above features,
Any one of the feature selection units uses the CF,
The other one of the feature selection units uses the CFS,
Another one of the feature selection units uses either the SU or the IG,
The above features are:
For the data set, after data cleaning for removing unnecessary data is performed, it is selected from the data set,
To generalize the data size of each of the features, scaled,
The prediction result output from any one of the classifiers is,
M ₁ (Pass) representing the probability that the semiconductor is quantitative and m ₁ (Fail) representing the probability that the semiconductor is defective,
The prediction result output from the other one of the classifiers is,
M ₂ (Pass) representing the probability that the semiconductor is quantitative and m ₂ (Fail) representing the probability that the semiconductor is defective,
The prediction result output from another one of the classifiers is,
M ₃ (Pass) representing the probability that the semiconductor is quantitative and m ₃ (Fail) representing the probability that the semiconductor is defective,
The step of determining whether the semiconductor is defective or not,
Combining the prediction results output from the classifiers into m ₄ (Pass) representing the probability that the semiconductor is quantitative and m ₄ (Fail) representing the probability that the semiconductor is defective, as shown in the following equation;

If the m ₄ (Pass) is higher than the m ₄ (Fail), determining that the semiconductor is quantitative; And
If the m ₄ (Fail) is higher than the m ₄ (Pass), determining that the semiconductor is defective.

Images