KR102169276B1 - Circuit for preventing arm short - Google Patents

Abstract

An arm-short prevention circuit according to various embodiments of the present invention includes a gate driving signal generator including a plurality of gate drivers having a first terminal and a second terminal through which a predetermined signal is input/output, and a first among a plurality of gate drivers. Switching according to the output signal of the gate driver, one end switching according to the output signal of the first switching element to which the first reference voltage is input, the second gate driver among the plurality of gate drivers, and one end and the other end of the first switching element Second terminals of the plurality of gate drivers may be connected to a node connected to a second switching element and a resistance element connected to the other end of the second switching element, and to a node to which the second switching element and the resistance element are connected. Accordingly, it is possible to prevent the occurrence of the arm-short more quickly by controlling the signal output of the gate driver without considering whether the arm-short actually occurs. In addition, various embodiments are possible.

Description

Arm-short prevention circuit {CIRCUIT FOR PREVENTING ARM SHORT}

The present invention relates to an arm-short prevention circuit, and more particularly, to a circuit capable of preventing the occurrence of an arm-short by controlling the signal output of a gate driver that controls a switching element.

Micom is used in various electronic devices such as home appliances. Micom may runaway under abnormal conditions such as noise, static electricity, and application of an abnormal voltage, and in this case, the micom may output a signal abnormally. For example, the microcomputer may fall into a runaway state in which calculation is impossible due to an abnormal state of the internal clock. In the case of a runaway microcomputer, an arm-short may occur in which a plurality of switching elements provided in the same leg of the circuit are turned on at the same time, and the circuit element may be damaged by the occurrence of an arm-short. It can be damaged.

Prior Art 1 (Korean Patent Application Publication No. 2001-0084792) checks the current flowing through the shunt resistor connected to the inverter and controls the inverter based on whether an overcurrent is detected to prevent damage to circuit elements. A circuit that can be done is disclosed. However, in the prior art 1, since the inverter is controlled by detecting a case where an overcurrent flows through the shunt resistor, an arm-short has already occurred, and it is difficult to prevent damage to the circuit element.

KR 1020010084792 A1

An object of the present invention is a circuit capable of preventing the occurrence of an arm-short by rapidly controlling the signal output of the gate driver when a signal for simultaneously turning-on a plurality of switching elements provided in the same leg is output from a gate driver In providing.

Another object of the present invention is to provide a circuit capable of resetting the micom using an output signal of a gate driver in order to solve the problem of abnormally outputting a signal from the micom, which may cause the occurrence of an arm-short. have.

The arm-short prevention circuit according to an aspect of the present invention for achieving the above or other objects includes a plurality of gate drivers for controlling switching of a plurality of switching elements provided in the same leg, and output from a plurality of gate drivers, A circuit configuration capable of inputting a control signal to a plurality of gate drivers by detecting a signal for simultaneously turning on a plurality of switching elements provided in the same leg may be included.

In order to achieve the above or other objects, an arm-short prevention circuit according to an aspect of the present invention includes a gate driving signal generating unit including a plurality of gate drivers having a first terminal and a second terminal through which a predetermined signal is input/output, Switching according to the output signal of the first gate driver among the plurality of gate drivers, one end of which is switched according to the output signal of the first switching element to which the first reference voltage is input, the second gate driver of the plurality of gate drivers, and one end Including a second switching element connected to the other end of the first switching element and a resistance element connected to the other end of the second switching element, wherein the second terminals of the plurality of gate drivers are connected to a node connected to the second switching element and the resistance element. I can.

In order to achieve the above or other objects, an arm-short prevention circuit according to an aspect of the present invention includes a gate driving signal generating unit including a plurality of gate drivers having a first terminal and a second terminal through which a predetermined signal is input/output, Switching according to the output signal of the first gate driver among the plurality of gate drivers, one end of which is switched according to the output signal of the first switching element to which the first reference voltage is input, the second gate driver of the plurality of gate drivers, and one end A second switching element connected to the other end of the first switching element, a resistance element connected to the other end of the second switching element, and a reset circuit blocking input of an operating voltage of the micom to the micom, and a second switching element and a resistor The micom may be reset by connecting the second terminals of the plurality of gate drivers and the reset circuit to the node to which the device is connected.

According to at least one of the embodiments of the present invention, the occurrence of the arm-short can be prevented more quickly by controlling the signal output of the gate driver without considering whether or not the arm-short actually occurs in the circuit.

In addition, according to at least one of the embodiments of the present invention, by resetting the micom based on the signal output from the gate driver, the problem of abnormally outputting the signal from the micom, which may cause an arm-short, is reliably prevented. Can be solved.

In addition, according to at least one of the embodiments of the present invention, since relatively simple circuit elements such as resistors and transistors are used instead of complex and expensive circuit elements, the implementation is easy and cost is low.

Further, according to at least one of the embodiments of the present invention, it can be easily applied to various circuit configurations in which arm-shorts may occur, such as a converter and an inverter.

1 is a circuit diagram showing an arm-short prevention circuit according to an embodiment of the present invention.
2A and 2B are circuit diagrams showing an arm-short prevention circuit according to an embodiment of the present invention.
3A to 3C are diagrams illustrating an operation of an arm-short prevention circuit according to an exemplary embodiment of the present invention.
4 is a block diagram of a motor driving device.
5 is a circuit diagram showing a converter and an inverter to which an arm-short prevention circuit according to an embodiment of the present invention can be applied.

Hereinafter, the present invention will be described in detail with reference to the drawings. In the drawings, in order to clearly and briefly describe the present invention, the illustration of parts not related to the description is omitted, and the same reference numerals are used for identical or extremely similar parts throughout the specification.

The suffixes "module" and "unit" for the constituent elements used in the following description are given in consideration of only the ease of writing in the present specification, and do not impart a particularly important meaning or role by themselves. Therefore, the "module" and "unit" may be used interchangeably with each other.

In the present application, terms such as "comprises" or "have" are intended to designate the presence of features, numbers, steps, actions, components, parts, or combinations thereof described in the specification, but one or more other features. It is to be understood that the presence or additional possibility of additions or numbers, steps, actions, components, parts, or combinations thereof, is not preliminarily excluded.

In addition, in this specification, terms such as first and second may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another.

1 is a circuit diagram showing an arm-short prevention circuit according to an embodiment of the present invention.

Referring to FIG. 1, an arm-short prevention circuit 100 according to an embodiment of the present invention includes a gate driving signal generator 120, a first switching element Q1, a second switching element Q2, and a resistor. It may include an element R1.

The gate driving signal generator 120 may include a plurality of gate drivers including, for example, a first terminal Vg and a second terminal SD through which a predetermined signal is input/output. In FIG. 1, the gate driving signal generation unit 120 is described as including first and second gate drivers 121 and 123, but the present invention is not limited thereto, and the gate driving signal generation unit 120 It may contain more than one gate driver.

The first switching element Q1 may switch according to, for example, a signal output from the first terminal Vg of the first gate driver 121. The first reference voltage V1 may be input through, for example, one end of the first switching element Q1. In this case, the first reference voltage V1 may be 5V, but is not limited thereto. The other end of the first switching element Q1 may be connected to one end of the second switching element Q2, for example.

The second switching element Q2 may switch according to, for example, a signal output from the first terminal Vg of the second gate driver 123. One end of the second switching element Q2 may be connected to the other end of the first switching element Q1, for example. The other end of the second switching element Q2 may be connected to, for example, the resistance element R1.

According to various embodiments of the present disclosure, the first switching element Q1 and/or the second switching element Q2 may be a bipolar junction transistor (BJT). In this case, the first switching element Q1 and/or the second switching element Q2 may be an NPN type bipolar junction transistor. For example, the first switching element Q1 may include a collector terminal to which the first reference voltage V1 is input, an emitter terminal connected to the second switching element Q2, and a first gate driver 121. It may be a bipolar junction transistor including a base terminal connected to the terminal Vg. For example, the second switching element Q2 may include a collector end connected to the first switching device Q1, an emitter end connected to the resistance device R1, and a first terminal of the second gate driver 123 ( It may be a bipolar junction transistor including a base terminal connected to Vg).

The second terminal SD of the first gate driver 121 and the second gate driver 123 may be connected to, for example, a node electrically connected to the second switching element Q2 and the resistance element R1. .

The first gate driver 121 and the second gate driver 123 may stop outputting the signal through the first terminal Vg, for example, when a signal is input through the second terminal SD. have.

The arm-short prevention circuit 100 according to an embodiment of the present invention may further include a microcomputer 110.

The micom 110 may include, for example, an output terminal (Signal) for outputting a signal to the gate driving signal generator 120. In this case, the micom 110 may output signals to the first and second gate drivers 121 and 123, respectively, through, for example, a plurality of output terminals (Signal). The micom 110 may output, for example, a Pulse Width Modulation (PWM) signal having a predetermined duty and frequency through an output terminal (Signal).

The first and second gate drivers 121 and 123 may output signals through the first terminal Vg based on, for example, a signal input from the microcomputer 110.

According to an embodiment of the present invention, when the first and second gate drivers 121 and 123 output a signal at the same time by a signal output from the microcomputer 110, the first and second switching elements Q1 , Q2) may be switched, and a voltage may be applied to both ends of the resistance element R1. For example, the first reference voltage V1 may be applied to both ends of the resistance element R1. For example, when the microcomputer 110 outputs a PWM signal, a change in the PWM signal disappears in a congestion state, and the last state may be maintained without a change in a signal level. In this case, the first and second gate drivers 121 and 123 may output signals at the same time by the signal output from the microcomputer 110.

In this case, a signal may be input through the second terminal SD of the first and second gate drivers 121 and 123 based on the voltage applied to both ends of the resistance element R1. When a signal is input through the second terminal SD of the first and second gate drivers 121 and 123, the first and second gate drivers 121 and 123 Output can be stopped.

In this case, the first and second gate drivers 121 and 123 may stop outputting a signal through the first terminal Vg for a predetermined time, for example. Meanwhile, the first and second gate drivers 121 and 123 may stop outputting a signal through the first terminal Vg even when, for example, a signal output from the microcomputer 110 is input.

2A and 2B are circuit diagrams showing an arm-short prevention circuit according to an embodiment of the present invention.

2A, the arm-short prevention circuit 200 according to an embodiment of the present invention includes a gate driving signal generator 220, a first switching element Q1, a second switching element Q2, and a resistor. A device R1 and a reset circuit 240 may be included.

The gate driving signal generator 220 may include, for example, a plurality of gate drivers including a first terminal Vg and a second terminal SD through which a predetermined signal is input/output. In FIG. 2A, the gate driving signal generation unit 220 is described as including first and second gate drivers 221 and 223, but the present invention is not limited thereto, and the gate driving signal generation unit 220 includes two It may contain more than one gate driver. Meanwhile, the first and second gate drivers 221 and 223 may be respectively connected to a plurality of switching elements provided in the same leg and provided in the inverter and/or the converter, and may control switching. .

The first switching element Q1 may switch according to, for example, a signal output from the first terminal Vg of the first gate driver 221. The first reference voltage V1 may be input through, for example, one end of the first switching element Q1. In this case, the first reference voltage V1 may be 5V, but is not limited thereto. The other end of the first switching element Q1 may be connected to one end of the second switching element Q2, for example.

The second switching element Q2 may switch according to, for example, a signal output from the first terminal Vg of the second gate driver 223. One end of the second switching element Q2 may be connected to the other end of the first switching element Q1, for example. The other end of the second switching element Q2 may be connected to, for example, the resistance element R1.

According to various embodiments of the present disclosure, the first switching element Q1 and/or the second switching element Q2 may be a bipolar junction transistor (BJT). In this case, the first switching element Q1 and/or the second switching element Q2 may be an NPN type bipolar junction transistor. For example, the first switching element Q1 may include a collector terminal to which the first reference voltage V1 is input, an emitter terminal connected to the second switching element Q2, and a first gate driver 221. It may be a bipolar junction transistor including a base terminal connected to the terminal Vg. For example, the second switching element Q2 may include a collector terminal connected to the first switching element Q1, an emitter terminal connected to the resistance element R1, and a first terminal of the second gate driver 223 ( It may be a bipolar junction transistor including a base terminal connected to Vg).

The second terminal SD of the first gate driver 221 and the second gate driver 223 may be connected to, for example, a node electrically connected to the second switching element Q2 and the resistance element R1. .

The first gate driver 221 and the second gate driver 223 may stop outputting a signal through the first terminal Vg, for example, when a signal is input through the second terminal SD. have.

The arm-short prevention circuit 200 according to an embodiment of the present invention may further include a microcomputer 210.

The micom 210 may include, for example, an output terminal (Signal) for outputting a signal to the gate driving signal generator 220. In this case, the micom 210 may output signals to the first and second gate drivers 221 and 223, respectively, through, for example, a plurality of output terminals Signals. The micom 210 may output a PWM signal having a predetermined duty and frequency through an output terminal (Signal), for example.

The first and second gate drivers 221 and 223 may output signals through the first terminal Vg based on, for example, a signal input from the microcomputer 210.

According to an embodiment of the present invention, the first and second gate drivers 221 and 223 included in the gate driving signal generator 220 are, for example, a third switching element included in the converter 230 ( It may be electrically connected to Q3) and the fourth switching element Q4, respectively. In this case, the third switching element Q3 and the fourth switching element Q4 included in the converter 230 may be, for example, switching elements provided in the same leg. The third and fourth switching elements Q3 and Q4 may be switched based on signals output from, for example, the first and second gate drivers 221 and 223. For example, when the first and second gate drivers 221 and 223 output signals at the same time, the third switching element Q3 and the fourth switching element Q4 included in the converter 230 are simultaneously Can be switched. In this case, when the third switching element Q3 and the fourth switching element Q4 are turned on at the same time, an arm-short may occur.

Meanwhile, when the first and second gate drivers 221 and 223 output signals at the same time point, voltages may be applied to both ends of the resistance element R1. For example, the first reference voltage V1 may be applied to both ends of the resistance element R1. In this case, a signal may be input through the second terminals SD of the first and second gate drivers 221 and 223 based on the voltage applied to both ends of the resistance element R1. When a signal is input through the second terminal SD of the first and second gate drivers 221 and 223, the first and second gate drivers 221 and 223 Output can be stopped. For example, in the present invention, the contents of the invention are described based on the converter 230, but the present invention is not limited thereto, and a full bridge converter, a multilevel converter, an inverter ) Or the like. Meanwhile, the reactor L may be positioned between, for example, the commercial AC power Vs and the converter 230, and may perform a power factor correction or a boost operation. The reactor L may, for example, perform a function of limiting harmonic current due to high-speed switching of the converter 230. In the drawings, the commercial AC power source 405 is shown as a single-phase AC power source, but the present invention is not limited thereto, and may be a three-phase AC power source.

The reset circuit 240 may be electrically connected to a node to which the second switching element Q2 and the resistance element R1 are electrically connected, for example. The reset circuit 240 may block input of the second reference voltage V2 to the microcomputer 210, for example. For example, when the first reference voltage V1 is applied to both ends of the resistance element R1, the reset circuit 240 may block input of the second reference voltage V2 to the microcomputer 210. . In this case, the second reference voltage V2 may be, for example, a rated voltage for the operation of the microcomputer 210. The micom 210 may be reset, for example, when the input of the second reference voltage V2 is cut off.

Referring to FIG. 2B, the reset circuit 240 according to an embodiment of the present invention includes a relay element RYS that is turned on or off based on a current flowing through the relay coil RY and the relay coil RY. ) Can be included.

The relay element RYS may be turned off and connected to the node a to which the second reference voltage V2 is input when no current flows through the relay coil RY, for example, and the second reference voltage (V2) can be input to the microcomputer 210. Meanwhile, the relay element RYS may be turned off, for example, when a current of a predetermined size or more does not flow through the relay coil RY.

Relay element (RYS), for example, when a current flows through the relay coil (RY), can be turned on and connected to the ground node (b), the second reference voltage (V2) is input to the microcomputer 210 It can be blocked from becoming. In this case, the second reference voltage V2 may be, for example, a rated voltage for the operation of the microcomputer 210. Meanwhile, the relay element RYS may be turned on when, for example, a current of a predetermined size or more flows through the relay coil RY.

The micom 210 may be reset, for example, when the input of the operating voltage is cut off.

According to various embodiments of the present disclosure, by rapidly controlling signals output from a plurality of gate drivers, it is possible to quickly prevent occurrence of an arm-short. Further, according to various embodiments of the present invention, it is possible to reset a microcomputer in an abnormal state such as runaway without user manipulation.

3A to 3C are diagrams illustrating an operation of an arm-short prevention circuit according to an exemplary embodiment of the present invention. Detailed descriptions of contents overlapping with those described in FIGS. 2A and 2B will be omitted.

Referring to FIG. 3A, the microcomputer 210 may output signals at the same time to the first and second gate drivers 221 and 223 through a plurality of output terminals Signals, respectively.

The first and second gate drivers 221 and 223 may output a signal at the same time through each of the first terminals Vg based on, for example, a signal output from the microcomputer 210. At this time, when the first and second gate drivers 221 and 223 output signals at the same time, the third switching element Q3 and the fourth switching element Q4 included in the converter 230 are turned- It may be turned on and a cancer-short may occur.

Meanwhile, when the first and second gate drivers 221 and 223 output signals at the same time, the first reference voltage V1 may be applied to both ends of the resistance element R1.

Meanwhile, the second reference voltage V2 may be input to the microcomputer 210 through the reset circuit 240.

Referring to FIG. 3B, when a first reference voltage V1 is applied to both ends of the resistance element R1, a signal is transmitted through the second terminals SD of the first and second gate drivers 221 and 223. May be input, and the first and second gate drivers 221 and 223 may stop outputting a signal through the first terminal Vg. In this case, the first and second gate drivers 221 and 223 may stop outputting a signal through the first terminal Vg for, for example, a predetermined time. Meanwhile, even when a signal output from the microcomputer 210 is input, the first and second gate drivers 221 and 223 may stop outputting a signal through the first terminal Vg.

Meanwhile, while the second reference voltage V2 is input to the microcomputer 210 through the reset circuit 240, the first reference voltage V1 may be applied to both ends of the resistance element R1.

Referring to FIG. 3C, when the first reference voltage V1 is applied to both ends of the resistance element R1, the reset circuit 240 prevents the second reference voltage V2 from being input to the microcomputer 210. I can. In this case, the second reference voltage V2 may be, for example, a rated voltage for the operation of the microcomputer 210. The micom 210 may be reset, for example, when the input of the second reference voltage V2 is cut off. In this case, the output of signals output to the first and second gate drivers 221 and 223 through the plurality of output terminals (Signal) of the microcomputer 210 may be stopped.

4 is a block diagram of a motor driving device.

Referring to FIG. 4, the motor driving device 400 includes an inverter 430 that outputs a three-phase AC current to the motor 440, a converter 420 that supplies DC power to the inverter 430, and a converter 420. It may include a dc terminal capacitor (C) between the inverter 430. The motor driving device 400 may include, for example, an arm-short prevention circuit according to various embodiments of the present disclosure. In this case, the motor driving apparatus 400 may include at least one arm-short prevention circuit each connected to at least one of, for example, the converter 420 and the inverter 430.

5 is a circuit diagram showing a converter and an inverter capable of using an arm-short prevention circuit according to an embodiment of the present invention.

The arm-short prevention circuit 200 according to various embodiments of the present disclosure may be connected to a full bridge converter (reference numeral a). The plurality of gate drivers included in the gate driving signal generation unit 220 may be electrically connected to a plurality of switching elements S1, S2, S3, S4, respectively, included in, for example, a full bridge converter (reference numeral a). I can. The plurality of switching elements S1, S2, S3, and S4 may be switched based on signals output from a plurality of gate drivers included in the gate driving signal generator 220, for example.

The arm-short prevention circuit 200 according to various embodiments of the present disclosure may be connected to a multi-level converter (reference numeral b). A plurality of gate drivers included in the gate driving signal generation unit 220 may be electrically connected to a plurality of switching elements (Sa, Sb, Sc, Sd) included in, for example, a multi-level converter (reference numeral b). I can. The plurality of switching elements Sa, Sb, Sc, and Sd may be switched based on signals output from a plurality of gate drivers included in the gate driving signal generator 220, for example.

The arm-short prevention circuit 200 according to various embodiments of the present disclosure may be connected to an inverter (reference numeral c). The plurality of gate drivers included in the gate driving signal generator 220 are electrically connected to a plurality of switching elements S11, S12, S21, S22, S31, S32 included in the inverter (reference numeral c), respectively. Can be connected to. The plurality of switching elements S11, S12, S21, S22, S31, and S32 may be switched based on signals output from a plurality of gate drivers included in the gate driving signal generator 220, for example.

The arm-short prevention circuit according to the present invention is not limitedly applicable to the configuration and method of the embodiments described as described above, but the embodiments are all or part of each of the embodiments so that various modifications can be made. It may be configured in combination.

Meanwhile, the control method of the arm-short prevention circuit according to an embodiment of the present invention can be implemented as a code that can be read by a processor on a recording medium that can be read by a processor. The processor-readable recording medium includes all types of recording devices that store data that can be read by the processor. Examples of recording media that can be read by the processor include ROM, RAM, CD-ROM, magnetic tape, floppy disk, optical data storage, etc., and also include those implemented in the form of carrier waves such as transmission through the Internet. . Further, the processor-readable recording medium is distributed over a computer system connected through a network, so that the processor-readable code can be stored and executed in a distributed manner.

In addition, although preferred embodiments of the present invention have been illustrated and described above, the present invention is not limited to the specific embodiments described above, and the technical field to which the present invention belongs without departing from the gist of the present invention claimed in the claims. In addition, various modifications are possible by those of ordinary skill in the art, and these modifications should not be individually understood from the technical spirit or prospect of the present invention.

110: micom
120: gate driving signal generator
Q1: First switching element
Q2: 2nd switching element
R1: resistance element

Claims (10)

A gate driving signal generator including a plurality of gate drivers having first and second terminals through which a predetermined signal is input/output;
A microcomputer electrically connected to the plurality of gate drivers;
A first switching element for switching according to a signal output from a first terminal of a first gate driver among the plurality of gate drivers, and receiving a first reference voltage at one end;
A second switching element that switches according to a signal output from a first terminal of a second gate driver among the plurality of gate drivers, and has one end connected to the other end of the first switching element;
A resistance element connected to the other end of the second switching element; And
And a reset circuit including a relay coil connected to the other end of the second switching element and a node to which the resistance element is connected, and a relay element turned on or off based on a current flowing through the relay coil,
The second terminals of the plurality of gate drivers are electrically connected to the other end of the second switching element and a node to which the resistance element is connected,
The plurality of gate drivers output signals through the first terminal based on signals input from the microcomputer,
When a current flows through the relay coil, the relay element is turned on so that a second reference voltage, which is a rated voltage for the operation of the micom, is blocked from being input to the micom, and the current does not flow through the relay coil. , Is turned off so that the second reference voltage is input to the microcomputer,
The micom, the arm-short prevention circuit, characterized in that reset (reset) when the input of the second reference voltage is cut off. The method of claim 1,
The plurality of gate drivers, when a signal is input through the second terminal, stop outputting the signal through the first terminal. The method of claim 1,
The first switching element,
And a bipolar junction transistor (BJT) comprising a base terminal connected to the first terminal of the first gate driver and the other end of the collector terminal, the other terminal of the emitter terminal. The method of claim 1,
The second switching element,
And a bipolar junction transistor (BJT) comprising a base terminal connected to the first terminal of the second gate driver and the other end of the collector terminal, the other terminal of the emitter terminal. delete The method of claim 1,
The plurality of gate drivers, when a signal is input through the second terminal, while a signal controlling to output a signal through the first terminal is input from the microcomputer, the output of the signal through the first terminal An arm-short prevention circuit, characterized in that to stop. delete delete delete delete

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