KR102147434B1 - Organic light emitting diode display - Google Patents

Abstract

The organic light-emitting display device according to the present invention includes a substrate, a semiconductor layer formed on the substrate and including a switching semiconductor layer and a driving semiconductor layer that are spaced apart from each other, a first gate insulating layer covering the semiconductor layer, and the first gate insulating layer. A switching gate electrode and a driving gate electrode formed on the switching semiconductor layer and the driving semiconductor layer, respectively, a second gate insulating film covering the switching gate electrode and the driving gate electrode, and formed on the second gate insulating film, A driving voltage line for transmitting a driving voltage, an interlayer insulating layer covering the driving voltage line and the second gate insulating layer, and a data line formed on the interlayer insulating layer and transmitting a data signal may be included.

Description

Organic light emitting display device {ORGANIC LIGHT EMITTING DIODE DISPLAY}

The present invention relates to an organic light emitting display device.

An organic light-emitting display device includes two electrodes and an organic emission layer disposed therebetween, and an electron injected from a cathode, which is one electrode, and a hole, injected from an anode, the other electrode. Combined in the organic emission layer to form excitons, and the excitons emit energy while emitting energy.

The organic light-emitting display device includes a plurality of pixels including an organic light-emitting diode comprising a cathode, an anode, and an organic light-emitting layer, and each pixel has a plurality of transistors and storage capacitors for driving the organic light-emitting diode. . The plurality of transistors basically include a switching transistor and a driving transistor.

When the light emitted by the organic light-emitting diode is expressed from black to white according to the driving current (Id) flowing through the organic light-emitting diode, there is a difference between the gate voltage representing black and the gate voltage representing white. The interval is defined as the driving range of the gate voltage. In the organic light emitting diode display, since the size of one pixel decreases as the resolution increases, the amount of current flowing per pixel decreases, and the driving range of the gate voltage applied to the gate electrode of the switching transistor and the driving transistor decreases. Therefore, it is difficult to control the size of the gate voltage Vgs applied to the driving transistor to have a rich gray level.

In addition, in the organic light emitting diode display, the size of one pixel decreases as the resolution increases, so that the distance between the driving voltage line and the data line formed on the same layer becomes narrow, so that a short between the driving voltage line and the data line is likely to occur, and particles ( particle) is also very vulnerable.

The present invention relates to an organic light emitting display device capable of implementing a high resolution by forming a driving voltage line and a data line on different layers to solve the problems of the above-described background technology.

An organic light emitting diode display according to an embodiment of the present invention includes a substrate, a semiconductor layer formed on the substrate and including a switching semiconductor layer and a driving semiconductor layer spaced apart from each other, a first gate insulating layer covering the semiconductor layer, and the A switching gate electrode and a driving gate electrode formed on the first gate insulating layer and overlapping the switching semiconductor layer and the driving semiconductor layer, respectively, a second gate insulating layer covering the switching gate electrode and the driving gate electrode, and the second gate insulating layer It may include a driving voltage line that is formed above and transmitting a driving voltage, an interlayer insulating layer covering the driving voltage line and the second gate insulating layer, and a data line formed on the interlayer insulating layer and transmitting a data signal.

The storage capacitor further includes a storage capacitor overlapping the driving gate electrode, wherein the storage capacitor is a first storage capacitor plate, which is the driving gate electrode, and a first storage capacitor plate overlapping the first storage capacitor plate and formed on the second gate insulating layer. 2 It may include a storage plate.

The second storage capacitor plate may be an enlarged part of a driving voltage line.

The driving semiconductor layer may be curved.

Compensating the threshold voltage of the driving transistor, a compensation thin film transistor connected to the driving transistor, a connection member formed on the same layer as the data line and connecting the driving gate electrode and the compensation semiconductor layer of the compensation thin film transistor to each other. Can include.

The driving gate electrode may be connected to the connection member through a power storage opening formed in the second storage capacitor plate, and a contact hole formed in the second gate insulating layer and the interlayer insulating layer.

A protective layer covering the interlayer insulating layer and the data line, and an organic light emitting diode formed on the protective layer may further be included.

According to an embodiment of the present invention, by forming the driving voltage line and the data line on different layers, it is possible to prevent a short circuit between the driving voltage line and the data line, so that high resolution can be implemented.

In addition, by forming the driving semiconductor layer having a curved shape, the driving semiconductor layer can be formed in a narrow space so that the driving range of the gate voltage applied to the driving gate electrode can be expanded. Accordingly, the gradation of light emitted from the organic light emitting diode (OLED) can be more precisely controlled by changing the size of the gate voltage, and as a result, the resolution of the organic light emitting display device can be increased and display quality can be improved.

1 is an equivalent circuit diagram of one pixel of an organic light emitting diode display according to an exemplary embodiment of the present invention.
2 is a schematic diagram of a plurality of transistors and capacitors of an organic light emitting diode display according to an exemplary embodiment of the present invention.
3 is a detailed layout diagram of FIG. 2.
4 is a cross-sectional view of the organic light emitting diode display of FIG. 3 taken along line IV-IV.
5 is a cross-sectional view of the organic light emitting diode display of FIG. 3 taken along lines V-V' and V'-V".

Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those of ordinary skill in the art may easily implement the present invention. The present invention may be implemented in various different forms and is not limited to the embodiments described herein.

In order to clearly describe the present invention, parts irrelevant to the description have been omitted, and the same reference numerals are assigned to the same or similar components throughout the specification.

In addition, the size and thickness of each component shown in the drawings are arbitrarily shown for convenience of description, so the present invention is not necessarily limited to the illustrated bar.

In the drawings, the thicknesses are enlarged to clearly express various layers and regions. And in the drawings, for convenience of description, the thickness of some layers and regions is exaggerated. When a part of a layer, film, region, plate, etc. is said to be "on" or "on" another part, this includes not only the case where the other part is "directly above" but also the case where there is another part in between.

In addition, throughout the specification, when a part "includes" a certain component, it means that other components may be further included rather than excluding other components unless otherwise stated. In addition, throughout the specification, the term "on" means that it is positioned above or below the target portion, and does not necessarily mean that it is positioned above the direction of gravity.

In addition, throughout the specification, when referred to as "on a plane", it means when the target portion is viewed from above, and when referred to as "cross-sectional view", it means when the cross-section of the target portion vertically cut is viewed from the side.

Then, the organic light emitting display device according to the first exemplary embodiment of the present invention will be described in detail with reference to FIGS. 1 to 5.

1 is an equivalent circuit diagram of one pixel of an organic light emitting diode display according to an exemplary embodiment of the present invention.

As shown in FIG. 1, one pixel 1 of an organic light emitting display device according to an exemplary embodiment of the present invention includes a plurality of signal lines 121, 122, 123, 124, 128, 171, 172, and a plurality of signal lines. It includes a plurality of transistors (T1, T2, T3, T4, T5, T6, T7) connected to each other, a storage capacitor (Cst), and an organic light emitting diode (OLED).

Transistors include a driving thin film transistor (T1), a switching thin film transistor (T2), a compensation transistor (T3), an initialization transistor (T4), an operation control transistor (T5), and a light emission control transistor (T6). ) And a bypass transistor T7.

The signal lines include a scan line 121 transferring a scan signal Sn, a previous scan line 122 transferring a previous scan signal Sn-1 to the initialization transistor T4, an operation control transistor T5, and a light emission control transistor. To the light emission control line 123 that transmits the light emission control signal En to T6, the initialization voltage line 124 that transmits the initialization voltage Vint to initialize the driving transistor T1, and the bypass thin film transistor T7. The bypass control line 128 that transmits the bypass signal BP, the data line 171 that crosses the scan line 121 and transmits the data signal Dm, and the driving voltage ELVDD transmit the data line ( It includes a driving voltage line 172 formed substantially parallel to the 171.

The gate electrode G1 of the driving transistor T1 is connected to the one end Cst1 of the storage capacitor Cst, and the source electrode S1 of the driving transistor T1 is a driving voltage line via the operation control transistor T5. It is connected to 172, and the drain electrode D1 of the driving transistor T1 is electrically connected to the anode of the organic light emitting diode OLED via the emission control transistor T6. The driving transistor T1 receives the data signal Dm according to the switching operation of the switching transistor T2 and supplies the driving current Id to the organic light emitting diode OLED.

The gate electrode G2 of the switching transistor T2 is connected to the scan line 121, the source electrode S2 of the switching transistor T2 is connected to the data line 171, and the switching transistor T2 The drain electrode D2 is connected to the source electrode S1 of the driving transistor T1 and is connected to the driving voltage line 172 via the operation control transistor T5. The switching transistor T2 is turned on according to the scan signal Sn transmitted through the scan line 121 and transmits the data signal Dm transmitted to the data line 171 to the source electrode of the driving transistor T1. Performs a switching operation.

The gate electrode G3 of the compensation transistor T3 is connected to the scan line 121, and the source electrode S3 of the compensation transistor T3 is connected to the drain electrode D1 of the driving transistor T1 to emit light. It is connected to the anode of the organic light emitting diode OLED via the control transistor T6, and the drain electrode D3 of the compensation transistor T3 is one end Cst1 of the storage capacitor Cst, and the initialization transistor ( It is connected to the drain electrode D4 of T4) and the gate electrode G1 of the driving transistor T1 together. The compensation transistor T3 is turned on according to the scan signal Sn received through the scan line 121 and connects the gate electrode G1 and the drain electrode D1 of the driving transistor T1 to each other. Connect T1) with a diode.

The gate electrode G4 of the initialization transistor T4 is connected to the previous scan line 122, the source electrode S4 of the initialization transistor T4 is connected to the initialization voltage line 124, and the initialization transistor T4 The drain electrode D4 of is connected to one end Cst1 of the storage capacitor Cst, the drain electrode D3 of the compensation transistor T3, and the gate electrode G1 of the driving transistor T1. The initialization transistor T4 is turned on according to the previous scan signal Sn-1 transmitted through the previous scan line 122 and transfers the initialization voltage Vint to the gate electrode G1 of the driving transistor T1. An initialization operation of initializing the voltage of the gate electrode G1 of the driving transistor T1 is performed.

The gate electrode G5 of the operation control transistor T5 is connected to the emission control line 123, the source electrode S5 of the operation control transistor T5 is connected to the driving voltage line 172, and the operation control transistor The drain electrode D5 of (T5) is connected to the source electrode S1 of the driving transistor T1 and the drain electrode S2 of the switching transistor T2.

The gate electrode G6 of the emission control transistor T6 is connected to the emission control line 123, and the source electrode S6 of the emission control transistor T6 is the drain electrode D1 of the driving transistor T1 and compensation. The source electrode S3 of the transistor T3 is connected, and the drain electrode D6 of the emission control transistor T6 is electrically connected to an anode of the organic light emitting diode OLED. The operation control transistor T5 and the light emission control transistor T6 are simultaneously turned on according to the light emission control signal En received through the light emission control line 123 so that the driving voltage ELVDD is applied to the organic light emitting diode OLED. Then, the driving current Id flows through the organic light emitting diode OLED.

The gate electrode G7 of the bypass thin film transistor T7 is connected to the bypass control line 128, and the source electrode S7 of the bypass thin film transistor T7 is a drain electrode of the emission control thin film transistor T6. (D6) and the anode of the organic light emitting diode (OLED) are connected together, and the drain electrode (D7) of the bypass thin film transistor (T7) is an initialization voltage line (124) and a source electrode (S4) of the initialization thin film transistor (T4) Are connected together.

The other end Cst2 of the storage capacitor Cst is connected to the driving voltage line 172, and the cathode of the organic light emitting diode OLED is connected to the common voltage ELVSS. Accordingly, the organic light emitting diode OLED receives the driving current Id from the driving transistor T1 and emits light to display an image.

Hereinafter, a detailed operation process of one pixel of the organic light emitting display device according to an exemplary embodiment will be described in detail.

First, a low level previous scan signal Sn-1 is supplied through the previous scan line 122 during the initialization period. Then, the initialization transistor T4 is turned on in response to the low-level previous scan signal Sn-1, and the initialization voltage Vint is driven from the initialization voltage line 124 through the initialization transistor T4. It is connected to the gate electrode of the transistor T1, and the driving transistor T1 is initialized by the initialization voltage Vint.

Thereafter, during the data programming period, the low-level scan signal Sn is supplied through the scan line 121. Then, the switching transistor T2 and the compensation transistor T3 are turned on in response to the low-level scan signal Sn.

At this time, the driving transistor T1 is diode-connected by the turned-on compensation transistor T3 and is biased in the forward direction.

Then, the compensation voltage (Dm+Vth, Vth is a value of (-)) reduced by the threshold voltage (Vth) of the driving transistor T1 from the data signal Dm supplied from the data line 171 is the driving transistor. It is applied to the gate electrode of (T1).

The driving voltage ELVDD and the compensation voltage Dm+Vth are applied to both ends of the storage capacitor Cst, and electric charges corresponding to the voltage difference between both ends are stored in the storage capacitor Cst. Thereafter, during the light emission period, the light emission control signal En supplied from the light emission control line 123 is changed from the high level to the low level. Then, during the light emission period, the operation control transistor T5 and the light emission control transistor T6 are turned on by the low-level light emission control signal En.

Then, the driving current Id according to the voltage difference between the voltage of the gate electrode of the driving transistor T1 and the driving voltage ELVDD is generated, and the driving current Id is transmitted through the light emission control transistor T6. OLED). During the light emission period, the gate-source voltage Vgs of the driving transistor T1 is maintained at'(Dm+Vth)-ELVDD' by the storage capacitor Cst, and according to the current-voltage relationship of the driving transistor T1, drive current (Id) is a source-proportional to the square of a value subtracting a threshold voltage from the gate voltage ^{'(Dm-ELVDD) 2'} . Accordingly, the driving current Id is determined regardless of the threshold voltage Vth of the driving transistor T1.

At this time, the bypass transistor T7 receives the bypass signal BP from the bypass control line 128. The bypass signal BP is a voltage of a predetermined level capable of always turning off the bypass transistor T7, and the bypass transistor T7 receives the voltage of the transistor off level to the gate electrode G7, thereby bypassing The transistor T7 is always turned off, and in the turned off state, a part of the driving current Id is discharged through the bypass transistor T7 as the bypass current Ibp.

Even when the minimum current of the driving transistor displaying the black image flows as the driving current, if the organic light emitting diode (OLED) emits light, the black image is not properly displayed. Accordingly, the bypass transistor T7 of the organic light emitting diode display according to an embodiment of the present invention uses a part of the minimum current of the driving transistor T1 as the bypass current Ibp, which is a current other than the current path toward the organic light emitting diode. Can be distributed by path. Here, the minimum current of the driving transistor means a current under a condition in which the driving transistor is turned off because the gate-source voltage Vgs of the driving transistor is less than the threshold voltage Vth. In this way, the minimum driving current (for example, a current of 10 pA or less) under the condition of turning off the driving transistor is transmitted to the organic light emitting diode and is expressed as an image of black luminance. When the minimum driving current for displaying a black image flows, the bypass current (Ibp) has a large effect, whereas when a large driving current that displays an image such as a normal or white image flows, the bypass current (Ibp) It can be said that there is little effect of Therefore, when the driving current displaying the black image flows, the emission current Ioled of the organic light emitting diode reduced by the amount of the bypass current Ibp that has escaped from the driving current Id through the bypass transistor T7 is It has the minimum amount of current at a level that can reliably represent a black image. Therefore, the contrast ratio can be improved by implementing an accurate black luminance image using the bypass transistor.

Next, a detailed structure of a pixel of the organic light emitting display device illustrated in FIG. 1 will be described in detail with reference to FIGS. 2 to 5 together with FIG. 1.

FIG. 2 is a schematic diagram of a plurality of transistors and capacitors of an organic light emitting diode display according to an exemplary embodiment of the present invention, FIG. 3 is a detailed layout view of FIG. 2, and FIG. 4 is a diagram illustrating the organic light emitting display device of FIG. A cross-sectional view taken along line IV-IV, and FIG. 5 is a cross-sectional view of the organic light emitting diode display of FIG. 3 taken along lines V-V' and V'-V".

As shown in FIG. 2, the organic light emitting display device according to an embodiment of the present invention provides a scan signal Sn, a previous scan signal Sn-1, a light emission control signal En, and a bypass signal BP. Each applied and including a scan line 121, a previous scan line 122, a light emission control line 123, and a bypass control line 128 formed along the row direction, and the scan line 121, the previous scan line A data line 171 and a driving voltage line 172 intersecting the emission control line 123 and the bypass control line 128 and respectively applying a data signal Dm and a driving voltage ELVDD to the pixel. Includes. The initialization voltage Vint is transferred from the organic light emitting diode OLED to the compensation transistor T3 through the initialization voltage line 124.

In addition, the pixel includes a driving transistor (T1), a switching transistor (T2), a compensation transistor (T3), an initialization transistor (T4), an operation control transistor (T5), a light emission control transistor (T6), a bypass transistor (T7), and a storage device. A capacitor (Cst) and an organic light emitting diode (OLED) are formed.

The driving transistor T1, the switching transistor T2, the compensation transistor T3, the initialization transistor T4, the operation control transistor T5, the light emission control transistor T6, and the bypass transistor T7 are the semiconductor layer 131. And the semiconductor layer 131 is formed to be bent in various shapes. The semiconductor layer 131 may be made of polysilicon or oxide semiconductor. Oxide semiconductors include titanium (Ti), hafnium (Hf), zirconium (Zr), aluminum (Al), tantalum (Ta), germanium (Ge), zinc (Zn), gallium (Ga), tin (Sn), or indium ( In)-based oxides, zinc oxide (ZnO), indium-gallium-zinc oxide (InGaZnO4), indium-zinc oxide (Zn-In-O), zinc-tin oxide (Zn-Sn-) O) Indium-gallium oxide (In-Ga-O), indium-tin oxide (In-Sn-O), indium-zirconium oxide (In-Zr-O), indium-zirconium-zinc oxide (In-Zr-Zn -O), indium-zirconium-tin oxide (In-Zr-Sn-O), indium-zirconium-gallium oxide (In-Zr-Ga-O), indium-aluminum oxide (In-Al-O), indium- Zinc-aluminum oxide (In-Zn-Al-O), indium-tin-aluminum oxide (In-Sn-Al-O), indium-aluminum-gallium oxide (In-Al-Ga-O), indium-tantalum oxide (In-Ta-O), indium-tantalum-zinc oxide (In-Ta-Zn-O), indium-tantalum-tin oxide (In-Ta-Sn-O), indium-tantalum-gallium oxide (In-Ta -Ga-O), indium-germanium oxide (In-Ge-O), indium-germanium-zinc oxide (In-Ge-Zn-O), indium-germanium-tin oxide (In-Ge-Sn-O), Any one of indium-germanium-gallium oxide (In-Ge-Ga-O), titanium-indium-zinc oxide (Ti-In-Zn-O), and hafnium-indium-zinc oxide (Hf-In-Zn-O) It may include. When the semiconductor layer 131 is made of an oxide semiconductor, a separate protective layer may be added to protect the oxide semiconductor vulnerable to external environments such as high temperature.

The semiconductor layer 131 is a channel region doped with an N-type impurity or a P-type impurity, and is formed on both sides of the channel region, and a source formed by doping a doping impurity of the opposite type to the doped impurity in the channel region. It includes a region and a drain region.

Hereinafter, a specific planar structure of an organic light emitting diode display according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 2 and 3, and a specific cross-sectional structure will be described in detail with reference to FIGS. 4 and 5. .

First, as shown in FIGS. 2 and 3, the pixel 1 of the organic light emitting diode display according to the exemplary embodiment of the present invention includes a driving transistor T1, a switching transistor T2, a compensation transistor T3, and initialization. A transistor T4, an operation control transistor T5, a light emission control transistor T6, a bypass transistor T7, a storage capacitor Cst, and an organic light emitting diode OLED. These transistors T1, T2, T3, T4, T5, T6, and T7 are formed along the semiconductor layer 131, and the semiconductor layer 131 is formed in the driving semiconductor layer 131a formed on the driving transistor T1 and the switching transistor T2. The switching semiconductor layer 131b formed, the compensation semiconductor layer 131c formed on the compensation transistor T3, the initialization semiconductor layer 131d formed on the initialization transistor T4, and the operation control formed on the operation control transistor T5 And a semiconductor layer 131e, a light emission control semiconductor layer 131f formed on the emission control transistor T6, and a bypass semiconductor layer 131g formed on the bypass thin film transistor T7.

The driving transistor T1 includes a driving semiconductor layer 131a, a driving gate electrode 125a, a driving source electrode 176a, and a driving drain electrode 177a.

The driving semiconductor layer 131a may be curved, may have a zigzag shape, and may be elongated in a 5-shape. In this way, by forming the driving semiconductor layer 131a having a curved shape, it is possible to form the driving semiconductor layer 131a long in a narrow space. Accordingly, since the driving channel region 131a1 of the driving semiconductor layer 131a can be formed long, the driving range of the gate voltage applied to the driving gate electrode 125a is widened. Therefore, since the driving range of the gate voltage is wide, the gradation of light emitted from the organic light emitting diode (OLED) can be more precisely controlled by changing the size of the gate voltage. As a result, the resolution of the organic light emitting display device is increased and the display quality Can improve. The driving semiconductor layer 131a may have various embodiments such as'D','S','M', and'W' by variously deforming its shape.

The driving source electrode 176a corresponds to the driving source region 176a doped with impurities in the driving semiconductor layer 131a, and the driving drain electrode 177a is a driving drain region doped with impurities in the driving semiconductor layer 131a. 177a). The driving gate electrode 125a overlaps the driving semiconductor layer 131a, and the driving gate electrode 125a includes a scan line 121, a previous scan line 122, a light emission control line 123, and a switching gate electrode 125b. ), the compensation gate electrode 125c, the initialization gate electrode 125d, the operation control gate electrode 125e, and the emission control gate electrode 125f are formed on the same layer.

The switching transistor T2 includes a switching semiconductor layer 131b, a switching gate electrode 125b, a switching source electrode 176b, and a switching drain electrode 177b. The switching source electrode 176b, which is a part of the data line 171, is connected to the switching semiconductor layer 131b through the contact hole 62, and the switching drain electrode 177b is doped with impurities in the switching semiconductor layer 131b. It corresponds to the switching drain region 177b.

The compensation transistor T3 includes a compensation semiconductor layer 131c, a compensation gate electrode 125c, a compensation source electrode 176c, and a compensation drain electrode 177c, and the compensation source electrode 176c is a compensation semiconductor layer 131c. The compensation source region 176c is doped with impurities, and the compensation drain electrode 177c corresponds to the compensation drain region 177c doped with the impurities.

The initialization transistor T4 includes an initialization semiconductor layer 131d, an initialization gate electrode 125d, an initialization source electrode 176d, and an initialization drain electrode 177d. The initialization source electrode 176d corresponds to the initialization source region 176d doped with impurities, and the initialization drain electrode 177d corresponds to the initialization drain region 177d doped with impurities.

The operation control transistor T5 includes an operation control semiconductor layer 131e, an operation control gate electrode 125e, an operation control source electrode 176e, and an operation control drain electrode 177e. The operation control source electrode 176e, which is a part of the driving voltage line 172, is connected to the operation control semiconductor layer 131e through the contact hole 65, and the operation control drain electrode 177e is in the operation control semiconductor layer 131e. This corresponds to the operation control drain region 177e doped with impurities.

The emission control transistor T6 includes a light emission control semiconductor layer 131f, a light emission control gate electrode 125f, a light emission control source electrode 176f, and a light emission control drain electrode 177f. The emission control source electrode 176f corresponds to the emission control source region 176f doped with impurities in the emission control semiconductor layer 131f, and the emission control drain electrode 177f passes through the contact hole 66 to the emission control semiconductor layer. Linked to (131f).

The bypass thin film transistor T7 includes a bypass semiconductor layer 131g, a bypass gate electrode 125g, a bypass source electrode 176g, and a bypass drain electrode 177g. The bypass source electrode 176g corresponds to the bypass source region 176g doped with impurities in the bypass semiconductor layer 131g, and the bypass drain electrode 177g is doped with impurities in the bypass semiconductor layer 131g. This corresponds to the bypass drain region 177g. The bypass source electrode 176g is directly connected to the emission control drain region 133f.

One end of the driving semiconductor layer 131a of the driving transistor T1 is connected to the switching semiconductor layer 131b and the operation control semiconductor layer 131e, and the other end of the driving semiconductor layer 131a is a compensation semiconductor layer 131c and It is connected to the emission control semiconductor layer 131f. Accordingly, the driving source electrode 176a is connected to the switching drain electrode 177b and the operation control drain electrode 177e, and the driving drain electrode 177a is connected to the compensation source electrode 176c and the emission control source electrode 176f. do.

The storage capacitor Cst includes a first storage capacitor plate 125a and a second storage capacitor plate 179 disposed with the second gate insulating layer 142 therebetween. The first storage capacitor plate 125a is the driving gate electrode 125a, and the second storage capacitor plate 179 is an enlarged part of the driving voltage line 172. Here, the second gate insulating layer 142 becomes a dielectric, and a storage capacitance is determined by the electric charge stored in the storage capacitor Cst and the voltage between the capacitor plates 125a and 179.

The first storage capacitor plate 125a, which is the driving gate electrode 125a, passes through the power storage opening 68 formed in the second storage capacitor plate 179, and is formed on the second gate insulating film 142 and the interlayer insulating film 160. It is connected to the connecting member 174 through the contact hole 61. The connection member 174 is formed on the same layer parallel to the data line 171, and connects the driving gate electrode 125a and the compensation semiconductor layer 131c of the compensation thin film transistor T3 to each other.

Accordingly, the storage capacitor Cst stores a storage capacitance corresponding to the difference between the driving voltage ELVDD delivered to the second storage capacitor plate 179 through the driving voltage line 172 and the gate voltage of the driving gate electrode 125a. do.

Meanwhile, the switching transistor T2 is used as a switching element for selecting a pixel to emit light. The switching gate electrode 125b is connected to the scan line 121, the switching source electrode 176b is connected to the data line 171, and the switching drain electrode 177b is a driving transistor T1 and an operation control transistor. It is connected to (T5). In addition, the emission control drain electrode 177f of the emission control transistor T6 is directly connected to the pixel electrode 191 of the organic emission die 70.

Hereinafter, a structure of an organic light emitting diode display according to an exemplary embodiment will be described in detail according to a stacking order with reference to FIGS. 4 and 5.

In this case, the structure of the transistor will be described centering on the driving transistor T1, the switching transistor T2, and the light emission control transistor T6. In addition, the compensation transistor T3, the initialization transistor T4, and the bypass transistor T7 are almost the same as the stacked structure of the switching transistor T2, and the operation control transistor T5 is the stacked structure of the emission control transistor T6. Since most are the same, detailed descriptions are omitted.

A buffer layer 120 is formed on the substrate 110, and the substrate 110 is formed of an insulating substrate made of glass, quartz, ceramic, plastic, or the like.

A driving semiconductor layer 131a, a switching semiconductor layer 131b, and a light emission control semiconductor layer 131f are formed on the buffer layer 120.

The driving semiconductor layer 131a includes a driving source region 176a and a driving drain region 177a facing each other with a driving channel region 131a1 and a driving channel region 131a1 therebetween, and the switching semiconductor layer 131b Includes a switching source region 132b and a switching drain region 177b facing each other with the switching channel region 131b1 and the switching channel region 131b1 interposed therebetween, and the light emission control transistor T6 includes a light emission control channel region ( 131f1), an emission control source region 176f, and an emission control drain region 133f.

A first gate insulating layer 141 is formed on the switching semiconductor layer 131a, the driving semiconductor layer 131b, and the emission control semiconductor layer 131f. A scan line 121 including a switching gate electrode 125b, a previous scan line 122, a light emission control line 123 including a light emission control gate electrode 125f, and a driving gate electrode on the first gate insulating layer 141 Gate wirings 121, 122, 123, 125a, 125b, and 125f including the (first storage capacitor plate) 125a are formed.

A second gate insulating layer 142 is formed on the gate wirings 121, 122, 123, 125b and 125f and the first gate insulating layer 141. The first gate insulating layer 141 and the second gate insulating layer 142 are formed of silicon nitride (SiNx) or silicon oxide (SiO ₂ ).

A driving voltage line 172 including a second storage capacitor plate 179 is formed on the second gate insulating layer 142. An interlayer insulating layer 160 is formed on the second gate insulating layer 142 and the driving voltage line 172. The interlayer insulating layer 160 may be made of a ceramic material such as silicon nitride (SiNx) or silicon oxide (SiO ₂ ).

Data lines 171 including a switching source electrode 176b, a light emission control drain electrode 177f, and data lines 171, 176b, 177f, and 124 including an initialization voltage line 124 are formed on the interlayer insulating layer 160 Has been.

In this way, by forming the driving voltage line 172 and the data line 171 on different layers, a short circuit between the driving voltage line 172 and the data line 171 can be prevented, and thus high resolution can be implemented.

The switching source electrode 176b is connected to the switching semiconductor layer 131b through a contact hole 62 formed in the interlayer insulating layer 160, the first gate insulating layer 141, and the second gate insulating layer 142, and controls light emission. The drain electrode 177f is connected to the emission control semiconductor layer 131f through a contact hole 66 formed in the first gate insulating layer 141, the second gate insulating layer 142, and the interlayer insulating layer 160, and is connected to an initialization voltage line. Reference numeral 124 is connected to the semiconductor layer 131 through a contact hole 64 formed in the first gate insulating layer 141, the second gate insulating layer 142, and the interlayer insulating layer 160.

A passivation layer 180 covering the data lines 171, 176b, 177f, and 124 is formed on the interlayer insulating layer 160, and a pixel electrode 191 is formed on the passivation layer 180. The pixel electrode 191 is connected to the pixel electrode 191 through a contact hole 81 formed in the passivation layer 180, and the initialization voltage line 124 is a pixel electrode through the contact hole 82 formed in the passivation layer 180. It is connected with (191).

A partition wall 350 is formed on the edge of the pixel electrode 191 and the passivation layer 180, and the partition wall 350 has a partition opening 351 exposing the pixel electrode 191. The partition wall 350 may be made of a resin such as polyacrylates resin and polyimides, or a silica-based inorganic material.

An organic emission layer 370 is formed on the pixel electrode 191 exposed through the partition wall opening 351, and a common electrode 270 is formed on the organic emission layer 370. In this way, the organic light emitting diode 70 including the pixel electrode 191, the organic emission layer 370 and the common electrode 270 is formed.

Here, the pixel electrode 191 is an anode that is a hole injection electrode, and the common electrode 270 is a cathode that is an electron injection electrode. However, the exemplary embodiment according to the present invention is not necessarily limited thereto, and the pixel electrode 191 may be a cathode and the common electrode 270 may be an anode according to a driving method of the organic light emitting display device. Holes and electrons are injected into the organic emission layer 370 from the pixel electrode 191 and the common electrode 270, respectively, and light emission occurs when an exciton in which the injected holes and electrons are combined falls from the excited state to the ground state. .

The organic emission layer 370 is made of a low-molecular organic material or a high-molecular organic material such as poly 3,4-ethylenedioxythiophene (PEDOT). In addition, the organic emission layer 370 includes a light emitting layer, a hole injection layer (HIL), a hole transporting layer (HTL), an electron transporting layer (ETL), and an electron injection layer. , EIL) may be formed of a multilayer containing one or more of. When all of these are included, a hole injection layer is disposed on the pixel electrode 191 as an anode, and a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer are sequentially stacked thereon.

The organic emission layer 370 may include a red organic emission layer emitting red, a green organic emission layer emitting green, and a blue organic emission layer emitting blue light, and the red organic emission layer, the green organic emission layer, and the blue organic emission layer are red pixels, respectively. , Green pixels and blue pixels to implement a color image.

In addition, in the organic emission layer 370, a red organic emission layer, a green organic emission layer, and a blue organic emission layer are stacked together on a red pixel, a green pixel, and a blue pixel, and a red color filter, a green color filter and a blue color filter are formed for each pixel. Thus, a color image can be realized. As another example, a white organic emission layer emitting white may be formed on all of the red, green, and blue pixels, and a red color filter, a green color filter, and a blue color filter may be formed for each pixel to implement a color image. When implementing a color image using a white organic emission layer and a color filter, a deposition mask is used to deposit a red organic emission layer, a green organic emission layer, and a blue organic emission layer on each individual pixel, i.e., red, green, and blue pixels. You do not have to do.

The white organic emission layer described in another example may be formed as a single organic emission layer, and includes a structure in which a plurality of organic emission layers are stacked to emit white light. For example, a configuration enabling white light emission by combining at least one yellow organic emission layer and at least one blue organic emission layer, a configuration enabling white emission by combining at least one cyan organic emission layer and at least one red organic emission layer, A configuration in which white light emission is possible by combining at least one magenta organic emission layer and at least one green organic emission layer may also be included.

An encapsulation member (not shown) for protecting the organic light-emitting device 70 may be formed on the common electrode 270, and the encapsulation member may be sealed to the substrate 110 by a sealant, and may be made of glass, quartz, ceramic, It may be formed of various materials such as plastic and metal. Meanwhile, a thin film encapsulation layer may be formed by depositing an inorganic film and an organic film on the common electrode 270 without using a sealant.

Although the present invention has been described through preferred embodiments as described above, the present invention is not limited thereto, and various modifications and variations are possible without departing from the concept and scope of the following claims. Those in the field of technology to which it belongs will understand easily.

121: scan line 122: previous scan line
123: light emission control line 124: initialization voltage line
125a: driving gate electrode 125b: switching gate electrode
131a: driving semiconductor layer 131b: switching semiconductor layer
131f: emission control semiconductor layer 141: first gate insulating film
142: second gate insulating film 160: interlayer insulating film
171: data line 172: driving voltage line

Claims (16)

Board,
A plurality of scan lines formed on the substrate and transmitting scan signals,
A data line crossing the plurality of scan lines and transmitting a data signal,
A driving voltage line for transmitting the driving voltage,
A first transistor including a first semiconductor, a first gate electrode overlapping the first semiconductor, and a first source electrode electrically connected to the driving voltage line and receiving the driving voltage through the transistor, and
A second source electrode electrically connected to the data line, a second drain electrode electrically connected to the first source electrode of the first transistor, a second semiconductor, and a second gate electrode overlapping the second semiconductor. A second transistor including
Including,
The driving voltage line includes a first portion located in a layer between the data line and the substrate,
The first part overlaps the data line with a first insulating layer positioned between the data line and the first part.
Display device. In claim 1,
The first portion overlaps the first semiconductor. In claim 1,
The first portion overlaps the first gate electrode with a second insulating layer positioned between the first portion and the first gate electrode therebetween. In paragraph 3,
The display device further comprises a pixel electrode positioned on the first insulating layer. In paragraph 3,
The first portion is positioned on a layer between the data line and the first gate electrode. In claim 1,
The driving voltage line further includes a second portion connected to the first portion and intersecting a first scan line included in the plurality of scan lines. In claim 1,
The first semiconductor and the second semiconductor are disposed on the same layer and included in one continuous semiconductor layer. In clause 7,
Further comprising a third transistor including a third semiconductor and a third gate electrode overlapping the third semiconductor,
The third semiconductor is included in the one continuous semiconductor layer,
One end of the first semiconductor is connected to the second semiconductor, and the other end of the first semiconductor is connected to the third semiconductor.
Display device. In clause 8,
A display device, wherein a first scan line included in the plurality of scan lines overlaps the second semiconductor and the third semiconductor and includes the second gate electrode and the third gate electrode. In claim 9,
The plurality of scan lines further include a second scan line spaced apart from the first scan line,
The first gate electrode is positioned between the first scan line and the second scan line.
Display device. A semiconductor layer including a plurality of channel regions,
A first transistor including a first channel region included in the plurality of channel regions, a first gate electrode overlapping the first channel region, and a first source region,
A second transistor including a second channel region included in the plurality of channel regions, and a second gate electrode overlapping the second channel region,
A plurality of scan lines that transmit scan signals,
A data line that transmits a data signal and crosses the plurality of scan lines,
A driving voltage line that transmits a driving voltage and crosses the plurality of scan lines, and
A pixel electrode electrically connected to the first transistor and overlapping a portion of the first gate electrode
Including,
The semiconductor layer includes a linear portion positioned between the first source region and the second channel region,
The straight portion is connected to the first source region and the second channel region and continuously extends in a straight line in one direction,
A part of the driving voltage line overlaps a part of the first gate electrode
Display device. In clause 11,
A portion of the first channel area is curved. In claim 12,
The part of the driving voltage line overlapping a part of the first gate electrode forms a capacitor. In claim 13,
The portion of the driving voltage line overlapping a portion of the first gate electrode is positioned in a layer between the data line and the first gate electrode. In clause 11,
A portion of the first channel area has a zigzag shape. In clause 11,
The linear portion of the semiconductor layer meets the first source region at a right angle.

Images