KR102138768B1 - Regulator and amplifier with improved light load stability - Google Patents

Abstract

The present invention can provide a regulator having improved stability characteristics at a light load and an amplifier used therefor. An aspect of the present invention, a reference voltage generating circuit for generating and outputting a reference voltage; An amplifier for receiving a first input signal corresponding to an output voltage and a second input signal corresponding to the reference voltage, and outputting an output signal amplifying the difference between the first input signal and the second input signal; And a pass transistor that adjusts the output voltage in response to the amplifier output signal.

Description

REGULATOR AND AMPLIFIER WITH IMPROVED LIGHT LOAD STABILITY}

The present invention relates to regulators and amplifiers. More particularly, the present invention relates to a regulator having improved stability at light load and an amplifier used therein.

A regulator is a device used to provide a stable output voltage in various electronic devices. In particular, the Low Drop Out Regulator (hereinafter referred to as LDO) is a portable, battery-operated battery such as a cell phone, a wireless phone, a pager, a personal digital assistants (PDA), a portable personal computer, a camcorder, and a digital camera. It has been widely used to generate stable voltage with high efficiency in a device.

The LDO regulator features a low drop out voltage. That is, when the LDO regulator receives an unregulated input voltage received from a power source such as a battery and provides a regulated output voltage, the difference between the input voltage and the output voltage can be minimized. Minimizing the dropout voltage means increasing power efficiency and reducing energy consumption. Therefore, LDO' regulator is widely used in applications requiring low power. In particular, it can be said that the usefulness is greater in applications that require long-term operation from batteries, such as portable devices. For this reason, an increase in demand for portable devices directly leads to an increase in demand for LDO regulators.

As one of the important characteristics of the regulator, stability characteristics at light load may be considered. When the load resistance increases at light load, the characteristic loop gain of the regulator is higher than that of the UGF (unity gain frequency) while the pole formed by the load resistance and the output capacitance moves to a lower frequency. It can be located in the lower frequency domain. In this case, the stability of the regulator may be reduced as the phase margin is reduced. Therefore, there is a need to improve the stability characteristics of the regulator at light load.

The present invention can provide a regulator having improved stability characteristics at a light load and an amplifier used therefor.

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An aspect of the present invention, a reference voltage generating circuit for generating and outputting a reference voltage; An amplifier for receiving a first input signal corresponding to an output voltage and a second input signal corresponding to the reference voltage, and outputting an output signal amplifying the difference between the first input signal and the second input signal; And a pass transistor that adjusts the output voltage in response to the output signal of the amplifier, wherein the amplifier includes a light load stabilization unit that senses a load condition and adjusts a frequency response characteristic of the amplifier in response to the load condition. , The light load stabilization unit includes a bias adjustment unit for adjusting the bias current inside the amplifier, the bias adjustment unit, a signal (Ix) corresponding to the load current and a signal (Ith) corresponding to a threshold value for determining whether the light load ) Using a bias control signal (Vbc) corresponding to the difference to adjust the bias current flowing from the amplifier to the ground, the signal (Ix) corresponding to the load current corresponds to a threshold value for determining whether the light load When it is greater than the signal Ith, the bias control signal Vbc is maintained at a value that does not affect the bias current flowing to the ground, and the signal Ix corresponding to the load current determines whether the light load is When it is smaller than the signal Ith corresponding to the threshold, the bias control signal Vbc is the difference between the signal Ix corresponding to the load current and the signal Ith corresponding to the threshold for determining whether the light load is present. It is a regulator that has a value corresponding to (Ith-Ix) and increases the bias current flowing to the ground.
In the regulator, the light load stabilization unit may adjust the internal impedance of the amplifier in response to the load current.

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In the regulator, the light load stabilization unit may move the pole to a high frequency when the load current is below the threshold.

In the regulator, the light load stabilization unit, Load state detection unit for sensing the load state; And a comparator comparing the sensed load state with the threshold value.

In the regulator, the load state detection unit may determine the load state using a signal inside the amplifier.

In the regulator, the amplifier may receive a threshold control signal for adjusting the threshold from outside the amplifier.

Another aspect of the present invention, receiving the first input signal corresponding to the output voltage and the second input signal corresponding to the reference voltage, and amplifying the difference between the first input signal and the second input signal output signal An amplifying unit for outputting; And a light load stabilization unit that senses a load condition and adjusts a frequency response characteristic of the amplification unit in response to the load condition, wherein the light load stabilization unit includes a bias adjustment unit that adjusts a bias current inside the amplification unit. The bias control unit uses a bias control signal Vbc corresponding to a difference between a signal Ix corresponding to a load current and a signal Ith corresponding to a threshold value for determining whether or not a light load is applied, and the inside of the amplification unit. When the bias current flowing to the ground is adjusted, but the signal Ix corresponding to the load current is greater than the signal Ith corresponding to the threshold for determining whether the light load is applied, the bias control signal Vbc is transferred to the ground. When the flow bias current is maintained at a value that does not affect, and the signal Ix corresponding to the load current is smaller than the signal Ith corresponding to the threshold for determining whether the light load is present, the bias control signal Vbc ) Has a value corresponding to the difference (Ith-Ix) between the signal (Ix) corresponding to the load current and the signal (Ith) corresponding to a threshold value for determining whether or not the light load is increased, thereby increasing the bias current flowing to the ground. Let it be, it's an amplifier.

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In the amplifier, the light load stabilization unit may adjust the internal impedance of the amplifier in response to the load current.

In the amplifier, the light load stabilization unit may move the pole to a high frequency when the load current is below the threshold.

In the amplifier, the light load stabilization unit, a load state detection unit for sensing the load state; And a comparator comparing the sensed load state with the threshold value.

In the amplifier, the load state detection unit may determine the load state using a signal inside the amplifier.

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According to the embodiment of the present invention, the light load stability of the regulator can be improved by adjusting the frequency response characteristic of the amplifier at light load.

1 is a view schematically illustrating a regulator according to an embodiment of the present invention.
FIG. 2 is a view schematically showing an equivalent circuit including parasitic components in the regulator of FIG. 1.
3 is a diagram illustrating a small signal equivalent circuit diagram for analyzing the stability of a regulator according to a comparative example.
FIG. 4 is a diagram illustrating a loop gain graph for analyzing stability at the rated load of the small signal equivalent model of FIG. 3.
FIG. 5 is a diagram illustrating a loop gain graph for analyzing stability at light load of the small signal equivalent model of FIG. 3.
6 is a diagram illustrating a small signal equivalent circuit diagram for analyzing the stability of a regulator according to an embodiment of the present invention.
FIG. 7 is a diagram illustrating a loop gain graph for analyzing stability of the regulator of FIG. 6 at light load.
8 is a diagram illustrating a small signal equivalent circuit diagram for analyzing the stability of a regulator according to an embodiment of the present invention.
9 is a block diagram illustrating an amplifier according to an embodiment of the present invention.
10 is a diagram illustrating an amplifier circuit and a peripheral circuit according to an embodiment of the present invention.
11 is a diagram illustrating an amplifier circuit according to an embodiment of the present invention.
12 is a diagram illustrating a loop gain and phase margin graph of the regulator.
13 is a diagram illustrating load current and output voltage waveforms.

Hereinafter, some embodiments of the present invention will be described in detail through exemplary drawings. It should be noted that in adding reference numerals to the components of each drawing, the same components have the same reference numerals as possible, even if they are displayed on different drawings. In addition, in describing the present invention, when it is determined that detailed descriptions of related well-known structures or functions may obscure the subject matter of the present invention, detailed descriptions thereof will be omitted.

In addition, in describing the components of the present invention, terms such as first, second, A, B, (a), and (b) may be used. These terms are only for distinguishing the component from other components, and the nature, order, or order of the component is not limited by the term. When a component is described as being "connected", "coupled" or "connected" to another component, that component may be directly connected to or connected to the other component, but another component between each component It should be understood that elements may be "connected", "coupled" or "connected".

1 is a view schematically illustrating a regulator according to an embodiment of the present invention.

Referring to FIG. 1, the regulator 100 may include reference voltage generation circuits 110 and BGR, amplifiers 120 and Amp, pass transistors 130 and MP, and an output voltage detector 140.

The regulator 100 may provide an input voltage Vin through the input terminal A and an output voltage Vout to the load through the output terminal B.

The reference voltage generation circuit 110 may generate and output a reference voltage Vref. For example, the reference voltage generation circuit 110 may operate using the input voltage Vin as a power source or may receive both the input voltage Vin and the output voltage Vout and selectively use the power source. As the reference voltage generation circuit 110, a circuit commonly referred to as a band gap reference may be used.

The amplifier 120 receives the first input signal Vin1 corresponding to the output voltage Vout and the second input signal Vin2 corresponding to the reference voltage Vref, and the first input signal Vin1 and the second The output signal Vao amplifying the difference between the input signals Vin2 may be output. For example, the first input signal Vin1 of the amplifier 120 may be a voltage at which the output voltage Vout is divided by the output voltage detector 140. For example, the second input signal Vin2 of the amplifier 120 may be a voltage corresponding to the reference voltage Vref generated by the reference voltage generation circuit 110. The reference voltage Vref output from the reference voltage generation circuit 110 may be directly used as the second input signal Vin2 of the amplifier 120 without additional processing, but may be removed from the amplifier 120 after a predetermined process. It can also be used as an input signal (Vin2). The amplifier 120 may operate using the input voltage Vin as a power source.

The pass transistor 130 may adjust the output voltage Vout in response to the amplifier output signal Vao. Adjustment of the output voltage (Vout) by the pass transistor 130, adjustment of the current flowing from the input terminal (A) to the output terminal (B) or the adjustment of the voltage drop between the input voltage (Vin) and the output voltage (Vout) Or it may be understood that it is performed by adjusting the impedance inside the pass transistor 130. The first terminal of the pass transistor 130 is connected to the input voltage Vin, the second terminal is connected to the output voltage Vout, and the third terminal (control terminal) can be connected to the amplifier output signal Vao. . 1, the pass transistor MP is illustrated as a P-type FET, but the present embodiment is not limited thereto.

The output voltage detector 140 may generate a voltage corresponding to the output voltage Vout and feed it back to the amplifier 120. In Figure 1, the output voltage detection unit 140 is illustrated as using a resistor voltage divider including two resistors R1 and R2, but the present invention is not limited to this and other types of voltage divider circuits or detection circuits may be used. have.

In the configuration as shown in FIG. 1, when the gain of the amplifier 120 is large, the two input signals Vin1 and Vin2 of the amplifier 120 may have substantially the same magnitude. For example, the amplifier 120 operates such that the voltage Vin1 in which the output voltage Vout is divided has the same size as the reference voltage Vref, so that the output voltage Vout is applied to the reference voltage Vref. It can be adjusted to the corresponding size.

FIG. 2 is a view schematically showing an equivalent circuit including parasitic components in the regulator of FIG. 1.

The drain-source resistor Rds connected in parallel to the pass transistor 130 may be understood as a resistance component between the drain terminal and the source terminal inside the pass transistor 130. A resistor (Roso) and a capacitor (Cpass) are connected to the output terminal of the amplifier (120). The resistor Roso may be understood as the output terminal impedance of the amplifier 120, and the capacitor Cpass may be understood as meaning the input capacitance of the gate terminal of the pass transistor 130. An output capacitor Co and a load resistor Ro may be connected to the output terminal B. The load may be an impedance component rather than a resistance, but for convenience of analysis, the load is assumed to be a resistance. The resistor Resr connected in series to the output capacitor Co may be understood as a series resistance component of the output capacitor Co.

The various resistance and capacitor components illustrated in FIG. 2 may form poles and zeros that affect the stability of the regulator together with impedance components inside the amplifier 120. Hereinafter, the pole and the zero of the loop gain of the regulator are analyzed with reference to FIG. 3.

3 is a diagram illustrating a small-signal equivalent circuit diagram for analyzing the stability of a regulator according to a comparative example compared to an embodiment of the present invention.

In FIG. 3, the amplifier 120 and the pass transistor 130 of FIG. 2 are replaced with small signal equivalent models. 3 is a small signal equivalent model for analyzing the response to a small signal disturbance, the devices connected to the input voltage Vin are indicated as being connected to ground instead of the input voltage Vin.

It is assumed that the amplifier 120 has two stages, a gain stage and an output stage. However, the present embodiment is not limited to this.

The gain stage may include a first transconductance (gm1), a resistor (Rgso), and a capacitor (Cm) component. The first transconductance gm1 means the mutual conductance of the gain stage, the resistor Rgso means the output impedance of the gain stage, and the capacitor Cm is the gain stage It can be understood to mean the internal Miller capacitance. The gain stage A1 of the gain stage may be understood as a product of the first transconductance gm1 and the resistance Rgso.

The output stage may include a second transconductance (gm2) and a resistor (Roso) component. It can be understood that the second transconductance gm2 means the mutual conductance of the output stage, and the resistor Roso means the output impedance of the output stage. The amplification gain A2 of the output stage can be understood as a product of the second transconductance gm2 and the resistance Roso.

The amplification gain A1 of the gain stage may have a larger value than the amplification gain A2 of the output stage. Also, the output stage resistor Roso of the output stage may have a smaller value than the output stage resistor Rgso of the gain stage. That is, the gain stage (Gain Stage) is mainly responsible for the gain amplification function of the amplifier 120, the output stage (Output Stage) may mainly be responsible for the function of lowering the output impedance of the amplifier 120.

The pass transistor 130 may include a third transconductance (-gmp), a capacitor (Cpass), and a resistance (Rds) component. The third transconductance (-gmp) means the mutual conductance of the pass transistor 130. The notation'-' in the third transconductance (-gmp) means that the pass transistor 130 operates in the opposite direction with respect to the change in the control voltage of the gate terminal. Capacitor Cpass means the input capacitance of the gate terminal of the pass transistor 130, and the drain-source resistor Rds means the resistance component between the drain terminal and the source terminal inside the pass transistor 130. Can.

Referring to FIG. 3, three poles and one zero may be identified as one affecting the stability of the regulator system. The frequency (fp1, fp2, fp3) of each pole and the frequency (fz1) of the zero point can be analyzed as shown in [Equation 1] to [Equation 4] below.

[Equation 1]

[Equation 2]

[Equation 3]

[Equation 4]

Here, (Rds∥Ro) means the resistance value in a state where Rds and Ro are connected in parallel.

FIG. 4 is a diagram illustrating a loop gain graph for analyzing stability at the rated load of the small signal equivalent model of FIG. 3.

In FIG. 4, the X-axis is a frequency and the Y-axis is a loop gain for evaluating the stability of the regulator system. Reference numeral 401 is a graph showing the loop gain at the rated load. '-1' and'-2' written in the rated load loop gain graph 401 mean the slope of the loop gain, and by one pole, the slope of'-1' and by one zero point It can have a slope of'+1'. The slope of the loop gain at a particular frequency can be determined by the number of poles and zeros in the frequency domain below. For example, in the frequency region between the first pole frequency fp1 and the second pole frequency fp2, since there is one pole fp1 in a frequency range below that, a slope of -1 may be obtained. In the frequency region between the second pole frequency fp2 and the first zero frequency fz1, since there are two poles fp1 and fp2 in a frequency range below that, a slope of -2 may be obtained. If the loop gain has a slope of -1, the phase moves toward -90 degrees, and if the loop gain has a slope of -2, the phase moves toward -180 degrees, so you can roughly grasp the phase margin through the slope in UGF. Can.

In the case of the rated load, the poles and zeros may be arranged in the order of the first pole frequency fp1, the second pole frequency fp2, the first zero frequency fz1, and the third pole frequency fp3. Normally, one pole should be placed below the frequency (UGF) at which the absolute value of the loop gain is 1 (ie, the loop gain is 0 dB) so that the system can secure sufficient phase margin (below the UGF). If there is no zero point, if there is one zero point below the UGF, even if there are two pole points in the UGF, the phase margin can be sufficiently secured). Referring to [Equation 2], since the load resistance (Ro) has a relatively small value at the rated load, the second pole frequency (fp2) is formed at a relatively high frequency compared to the UGF, so that one pole in the UGF ( fp1) exists, so the system can be sufficiently stable.

FIG. 5 is a diagram illustrating a loop gain graph for analyzing stability at light load of the small signal equivalent model of FIG. 3.

Referring to FIG. 5, the second pole frequency fp2 may move from a frequency fa higher than UGF to a frequency fb lower than UGF. It can be understood that the movement of the second pole frequency fp2 to the lower frequency is due to a change in the load resistance Ro. Referring to [Equation 2], the second pole frequency fp2 becomes smaller as the load resistance Ro increases. At light load, the load resistance (Ro) has a relatively large value compared to the rated load (for example, when the load becomes 10% of the rated load, the load resistance (Ro) increases by 10 times the rated load) ), it can be analyzed that the second pole frequency fp2 has moved to a lower frequency. As such, as the load decreases, the second pole frequency (fp2) may move to a frequency lower than UGF, and in this case, there may be insufficient two phase poles (fp1, fp2) within UGF, so that the phase margin in UGF may not be sufficient. have.

As described above, in the case of FIG. 3, the stability of the regulator system may be lowered at light load.

6 is a diagram illustrating a small signal equivalent circuit diagram for analyzing the stability of a regulator according to an embodiment of the present invention.

According to one embodiment of the present invention, the amplifier 620 includes a light load stabilizer (622), and the output stage resistance (Rgso) of the gain stage is variable under the control of the light load stabilizer 622 Can be.

The light load stabilization unit 622 may detect a load condition and adjust the frequency response characteristics of the amplifier 620 in response to the load condition. For example, the load state may be determined through a load current (Io) supplied to the load. In FIG. 7, it is shown that the load current Io is detected and provided to the light load stabilization unit 622, but the present embodiment is not limited to this method.

Adjustment of the frequency response characteristic of the amplifier 620 may be, for example, adjustment of the internal impedance of the amplifier 620. As a specific example, adjustment of the internal impedance of the amplifier 620 may be adjustment of a resistance value of the output stage resistance Rgso of the gain stage. Referring to Equation 1, since the first pole frequency fp1 is inversely proportional to the output stage resistance Rgso of the gain stage, when the output stage resistance Rgso of the gain stage is decreased, the first pole frequency fp1 is high. It can move in frequency. In order to increase the stability of the system at light load, the light load stabilizer 622 decreases the output stage resistance Rgso of the gain stage when the load current is below a threshold value (that is, when it is judged as a light load) to reduce the first pole frequency fp1. By moving) to a higher frequency than UGF, it is possible to secure a sufficient phase margin by having one pole in UGF even at light load.

FIG. 7 is a diagram illustrating a loop gain graph for analyzing stability of the regulator of FIG. 6 at light load.

Referring to FIG. 7, in the case of the light load loop gain 701, only one pole may exist in the UGF. When the light load stabilizing unit 622 of FIG. 6 reduces the output stage resistance Rgso of the gain stage at light load to move the first pole frequency fp1 from a frequency fc below UGF to a frequency fd above UGF. , Even if the second pole frequency fp2 moves at a light load or less than UGF, only one pole may exist below UGF. Therefore, the phase margin under light load is sufficiently secured, and the stability of the system can be increased. As described above, the light load stabilization unit 622 may improve stability at light loads by moving the first pole p1 to a high frequency as the load current decreases.

8 is a diagram illustrating a small signal equivalent circuit diagram for analyzing the stability of a regulator according to an embodiment of the present invention.

The embodiment of FIG. 8 differs from the embodiment of FIG. 6 in that the light load stabilization unit 822 determines the load state using the signal inside the amplifier 820. For example, the light load stabilization unit 822 may determine a load state using a signal Vgso output from the gain stage and input to the output stage. According to this method, it is not necessary to separately provide an element for detecting the load current Io, and the amplifier 820 does not need to have a pin for receiving a signal corresponding to the load current, thereby simplifying the circuit configuration. You can save money.

9 is a block diagram illustrating an amplifier according to an embodiment of the present invention.

Referring to FIG. 9, the amplifier 920 may include an amplification unit 921 and a light load stabilization unit 922. The light load stabilization unit 922 may include a load state detection unit 922a, a comparison unit 922b, and a bias adjustment unit 922c.

The amplification unit 921 may perform a basic amplification function of the amplifier 920. For example, the amplification unit 921 may receive the first input signal Vin1 and the second input signal Vin2, and output an output signal Vao amplifying the difference between the two signals. For example, the amplification unit 921 may include two stages, a gain stage and an output stage. In this case, the gain stage is mainly responsible for the amplification gain function of the amplifier 920, and the output stage can be mainly responsible for the function of lowering the output impedance of the amplifier 920.

The load state detection unit 922a may detect a load state. The light load stabilization unit 922 may operate to improve stability by adjusting a frequency response characteristic of the amplifier 920 in a light load state. To this end, the load state detection unit 922a may collect information for determining whether the load is a light load. The load state information collected by the load state detection unit 922a may be information about current or power supplied to the load. The load state detection unit 922a may directly detect the current or power supplied to the load, but in this case, there is a disadvantage that the amplifier 920 must further include a configuration such as a pin for receiving information on the load state. . In consideration of this situation, the load state detection unit 922a may detect the load state using the internal signal Sos of the amplifier 920. Since the current or power supplied to the load is supplied through the pass transistor under the control of the amplifier 920 (see FIG. 1 ), a signal including information about the load current or power may exist inside the amplifier 920. Therefore, the load state detection unit 922a may sense the load state using a signal Sos inside the amplifier 920.

The comparator 922b may compare the signal sensed by the load state detector 922a with a threshold value to determine whether it is a light load. The threshold value as a criterion for determining whether or not the light load is applied may be adjusted by a threshold control signal input from the outside of the amplifier 920. In this case, the user can adjust the threshold to a desired value through the threshold control signal outside the amplifier 920.

The bias adjusting unit 922c may adjust the frequency response characteristic of the amplifier 920 when it is determined as a light load based on the comparison result of the comparing unit 922b. For example, the bias adjusting unit 922c may adjust the frequency response characteristic of the amplifier 920 by adjusting the bias current inside the amplifying unit 921 through the bias control signal Sbc. A method of adjusting the bias current inside the amplification unit 921 will be described in detail below.

10 is a diagram illustrating an amplifier circuit and a peripheral circuit according to an embodiment of the present invention.

The amplifier 920 may include an amplification unit 921 and a light load stabilization unit 922. The amplifying unit 921 may include a gain stage 921a and an output stage 921b.

The gain stage 921a may include a plurality of transistors M1 to M9. A bias signal Vb may be applied to the transistor M1 to allow the bias current Ib1 to flow. That is, transistor M1 can operate as a bias current source that supplies bias current Ib1.

The bias current Ib1 can be divided into transistors M2 and M3 and flow. The first input signal Vin1 may be applied to the transistor M2, and a current corresponding to the first input signal Vin1 may flow. The second input signal Vin2 is applied to the transistor M3, and a current corresponding to the second input signal Vin2 may flow. A signal corresponding to the output voltage (Vout in FIG. 1) may be applied to the first input signal Vin1, and a signal corresponding to the reference voltage (Vref in FIG. 1) may be applied to the second input signal Vin2. The sum of the currents flowing through the transistors M2 and M3 may be equal to the bias current Ib1.

A bias signal Vb is applied to the transistors M4 and M5 to provide a path through which the bias currents Ib2 and Ib3 flow to ground. That is, transistors M4 and M5 can operate as a bias current drain.

Transistors M6 to M9 may constitute the output stage of gain stage 921a. The gain stage 921a may generate the output signal Vgso and provide it to the next stage.

The light load stabilization unit 922 receives the output signal Vgso and the threshold control signal Vtc of the gain stage 921a, determines whether it is a light load, and if determined to be a light load, bias currents Ib2 and Ib3 of the gain stage 921a Can be adjusted. To this end, the light load stabilizer 922 may include a plurality of transistors M11 to M17.

The transistor M11 can cause the current Ix corresponding to the output signal Vgso of the gain stage 921a to flow. Since the output signal Vgso of the gain stage 921a is a signal that controls the output current Io through the transistor M11 and the output stage 921b, the output signal Vgso of the gain stage 921a has a predetermined relationship with the output current Io Have Therefore, the current Ix corresponding to the output signal Vgso of the gain stage 921a may also have a predetermined relationship with the output current Io. For example, the current Ix may have a proportional relationship with the output current Io. The light load stabilization unit 922 may determine whether light load is performed by using the output signal Vgso of the gain stage 921a instead of directly detecting the load current Io.

The transistor M13 may allow the current Ith corresponding to the threshold control signal Vtc to flow. The amplifier 920 may allow the user to determine a load level (eg, the magnitude of the load current) that is a light load judgment criterion by receiving the threshold control signal Vtc from the outside.

The transistors M12 and M14 form a current mirror so that the current Ix flowing through the transistor M12 flows the same in the transistor M14. The difference between the current Ith and the current Ix flows through the transistor M15, and a bias control signal Vbc corresponding to the difference between the current Ith and the current Ix is generated and can be applied to the transistors M16 and M17.

For example, the current Ix at the rated load may be set to have a value greater than the current Ith. In this case, no current flows through the transistor M15 and the bias control signal Vbc can be maintained at a voltage low enough to drive the transistors M16 and M17. At light load, the current Ix can be set smaller than the current Ith, in this case, a current corresponding to (Ith-Ix) flows through the transistor M15, and a bias control signal Vbc corresponding to it is generated to drive the transistors M16 and M17. . That is, it is possible to determine whether or not the light load is performed by comparing the current Ix corresponding to the output signal Vgso of the gain stage 921a with the Ith corresponding to the threshold control signal Vtc, and thereby change the bias control signal Vbc.

The transistors M16 and M17 allow currents corresponding to the bias control signals Vbc to flow, so that the bias currents Ib2 and Ib3 can be adjusted according to the bias control signals Vbc. When the current flows through the transistors M16 and M17 by the bias control signal Vbc and the bias currents Ib2 and Ib3 increase, more current is supplied from the output terminals M6 to M9 of the gain stage 921a, so the gain stage 921a The output terminal impedance (Rgso in FIG. 8) may be reduced. That is, when the bias currents Ib2 and Ib3 are increased by operating the transistors M16 and M17 in a light load state, the first pole frequency fp1 of Equation 1 can be moved to a high frequency. In the case of non-light load, the transistors M16 and M17 may be made to have relatively small bias currents Ib2 and Ib3 by preventing current from flowing or by allowing a small current to flow.

As described above, the light load stabilization unit 920 determines whether light load is performed using the output signal Vgso of the gain stage 921a, and adjusts the bias currents Ib2 and Ib3 at the light load to move the pole 920. The frequency response characteristics of can be adjusted. For example, the light load stabilization unit 922 is connected to the bias current drains M4 and M5 inside the amplifier 920 and operates in a manner of adjusting bias currents Ib2 and Ib3 flowing from the light load state to ground. Can. For example, the light load stabilization unit 920 increases the bias currents Ib2 and Ib3 flowing to the ground when it is determined to be light load, and increases the bias currents Ib2 and Ib3 flowing to the ground when it is determined that the light load is not. Can be reduced.

Here, the transistors M11 and M12 may be understood as a load state sensing unit (922a in FIG. 9), the transistors M13 to M15 may be understood as a comparison unit (922b in FIG. 9), and the transistors M16 and M17 may be bias adjusting units. It can be understood as (922c in FIG. 9). However, FIG. 10 is only a specific example of the amplifier circuit, and the present invention is not limited to such a circuit.

11 is a diagram illustrating an amplifier circuit according to an embodiment of the present invention. 11 shows a portion of the gain stage 1121a of the amplifier. The remaining part omitted may be understood with reference to FIG. 10.

11 differs from the embodiment of FIG. 10 in that the bias adjusting unit 1122c is connected in parallel to the transistor M1 operating as a bias current source.

The bias adjusting unit 1122c may be a current source controlled by the bias control signal Vbc described above. That is, the bias adjusting unit 1122c may supply a bias current Ib5 corresponding to the bias control signal Vbc. For example, the bias adjusting unit 1122c may be implemented using a known circuit as a voltage control current source.

The bias current Ib1 supplied to the transistors M2 and M3 may be the sum of the current Ib4 supplied through the bias current source M1 and the current Ib5 supplied through the bias adjusting unit 1122c. That is, the bias adjusting unit 1122c may adjust the bias current Ib1 supplied to the gain stage 1121a in response to the bias control signal Vbc.

For example, the bias adjusting unit 1122c may increase the bias current Ib1 supplied to the gain stage 1121a by allowing the bias current Ib5 to flow when it is determined that it is not a light load. In this case, since the current flowing from the output stage of the gain stage 1121a (see M6 to M9 in FIG. 10) to the bias current drains M5 and M6 decreases, the output stage impedance of the gain stage 1121a (Rgso in FIG. 8) is relatively Can be increased. When judged to be a light load, the bias adjusting unit 1122c may make the bias current Ib1 supplied to the gain stage 1121a small by preventing the bias current Ib5 from flowing or reducing its size. In this case, since the current flowing from the output stage of the gain stage 1121a to the bias current drains M5 and M6 increases, the output stage impedance (Rgso of FIG. 8) of the gain stage 1121a may be relatively small. Therefore, as described above, the first pole frequency fp1 may be moved to a high frequency at light load.

When the bias adjusting unit 1122c is provided at the bias current source side as shown in FIG. 11, the bias adjusting unit 1122c is configured as one block, and thus, there is an advantage that the bias current imbalance problem does not occur. In the case of FIG. 10, since the bias regulator is divided into two paths (transistors M16 and M17) to adjust the bias current, there is a possibility of an imbalance problem between transistors M16 and M17, whereas in FIG. 11, this problem may not occur. have. In addition, according to the bias adjusting unit 1122c of FIG. 11, when the load is not light, the bias current Ib5 is supplied and the bias current Ib5 is not supplied or reduced in the light load, so the bias current at the light load is reduced to reduce power consumption. have.

12 is a diagram illustrating a loop gain and phase margin graph of the regulator.

Referring to FIG. 12, graphs 1211 and 1212 respectively illustrate the loop gain and phase at light load when a light load stabilizer is used, and graphs 1221 and 1222 respectively show loop gain at light load when a light load stabilizer is not used. Phase is illustrated.

In the case of using the light load stabilization unit (see graphs 1211 and 1212), it can be seen that only one pole exists within UGF1, and accordingly, the phase margin PM1 is secured to a sufficient phase margin of approximately 90 degrees. On the other hand, when the light load stabilizer is not used (see graphs 1221 and 1222), it can be seen that there are two poles within the UGF2, and thus the phase margin PM2 is not sufficiently secured to approximately 20 degrees. As described above, when a light load stabilizing part is used, there is an advantage of improving stability at a light load.

13 is a diagram illustrating load current and output voltage waveforms. The stability of the regulator was previously analyzed using a small-signal equivalent model, and in FIG. 13, the effect of the light load stabilization unit according to the present embodiment is examined by examining the response of the output voltage when the step of the load current is changed through a simulation from a large signal perspective. Can be confirmed. In FIG. 13, graph 1331 is a load current Io, graph 1332 is an output voltage Vo when a light load stabilizer is used, and graph 1333 is an output voltage Vo when a light load stabilizer is not used. For example.

The load current Io maintains the light load (0.1mA) before time t1, and is changed to the rated load (320mA) at time t1 and is again changed to the light load (0.1mA) at time t2. In this situation, when a light load stabilizer is used, the output voltage (Vo) remains stable without oscillation (see graph 1332), but when a light load stabilizer is not used, the output voltage (Vo) undergoes oscillation and is in a steady state. It can operate in a form that takes a long time to follow values (see graph 1333). As described above, when the light load stabilizer is not used, stability may be lowered due to insufficient phase margin, whereas when the light load stabilizer is used under the same conditions, stability may be increased.

The terms "comprise", "compose" or "have" as described above mean that the component can be inherent, unless otherwise stated, and do not exclude other components. It should be interpreted that it may further include other components. All terms, including technical or scientific terms, have the same meaning as generally understood by a person skilled in the art to which the present invention belongs, unless otherwise defined. Commonly used terms, such as predefined terms, should be interpreted as being consistent with the meaning in the context of the related art, and are not to be interpreted as ideal or excessively formal meanings unless explicitly defined in the present invention.

The above description is merely illustrative of the technical idea of the present invention, and those skilled in the art to which the present invention pertains may make various modifications and variations without departing from the essential characteristics of the present invention. Therefore, the embodiments disclosed in the present invention are not intended to limit the technical spirit of the present invention, but to explain, and the scope of the technical spirit of the present invention is not limited by these embodiments. The scope of protection of the present invention should be interpreted by the claims below, and all technical spirits within the scope equivalent thereto should be interpreted as being included in the scope of the present invention.

Claims (20)

A reference voltage generation circuit that generates and outputs a reference voltage;
An amplifier for receiving a first input signal corresponding to an output voltage and a second input signal corresponding to the reference voltage, and outputting an output signal amplifying the difference between the first input signal and the second input signal; And
Includes; pass transistor for adjusting the output voltage in response to the output signal of the amplifier,
The amplifier includes a light load stabilizer that senses a load condition and adjusts a frequency response characteristic of the amplifier in response to the load condition,
The light load stabilization unit includes a bias adjustment unit for adjusting the bias current inside the amplifier,
The bias adjusting unit uses a bias control signal Vbc corresponding to a difference between a signal Ix corresponding to a load current and a signal Ith corresponding to a threshold value for determining whether or not a light load is applied, to the ground inside the amplifier. Adjust the flowing bias current,
When the signal Ix corresponding to the load current is greater than the signal Ith corresponding to the threshold value for determining whether the light load is applied, the bias control signal Vbc does not affect the bias current flowing to the ground. Being maintained,
When the signal Ix corresponding to the load current is smaller than the signal Ith corresponding to the threshold value for determining whether the light load is applied, the bias control signal Vbc and the signal Ix corresponding to the load current A regulator having a value corresponding to a difference (Ith-Ix) of a signal (Ith) corresponding to a threshold for determining whether the light load is applied, and increasing a bias current flowing to the ground. delete The method according to claim 1,
The light load stabilizer is a regulator, characterized in that for adjusting the internal impedance of the amplifier in response to the load current. The method according to claim 1,
The light load stabilizer is a regulator, characterized in that for moving the pole to a high frequency when the load current is below the threshold. The method according to claim 1,
The light load stabilization unit,
A load state detection unit that senses the load state; And
A comparison unit comparing the sensed load state with the threshold value;
Regulator characterized in that it further comprises. The method according to claim 5,
The load condition detecting unit is a regulator, characterized in that for determining the load condition using the signal inside the amplifier. The method according to claim 5,
The amplifier is a regulator, characterized in that for receiving the threshold control signal for adjusting the threshold from the outside of the amplifier. delete delete delete delete An amplifier for receiving a first input signal corresponding to an output voltage and a second input signal corresponding to a reference voltage, and outputting an output signal amplifying the difference between the first input signal and the second input signal; And
Includes a; light load stabilization unit for sensing the load condition and adjusting the frequency response characteristics of the amplification unit in response to the load condition;
The light load stabilization unit includes a bias adjustment unit for adjusting the bias current inside the amplification unit,
The bias adjusting unit uses the bias control signal Vbc corresponding to the difference between the signal Ix corresponding to the load current and the signal Ith corresponding to the threshold value for determining whether or not the light load is applied, and grounds inside the amplification unit. Adjust the bias current flowing through,
When the signal Ix corresponding to the load current is greater than the signal Ith corresponding to the threshold value for determining whether the light load is applied, the bias control signal Vbc does not affect the bias current flowing to the ground. Being maintained,
When the signal Ix corresponding to the load current is smaller than the signal Ith corresponding to the threshold value for determining whether the light load is applied, the bias control signal Vbc and the signal Ix corresponding to the load current The amplifier having a value corresponding to a difference (Ith-Ix) of a signal (Ith) corresponding to a threshold value for determining whether the light load is increased. The method according to claim 12,
The light load stabilization unit, characterized in that for adjusting the internal impedance of the amplification unit in response to the load current. The method according to claim 13,
The light load stabilization unit amplifier, characterized in that for moving the pole to a high frequency when the load current is below the threshold. The method according to claim 13,
The light load stabilization unit,
A load state detection unit that senses the load state; And
A comparison unit comparing the sensed load state with the threshold value;
Amplifier further comprising a. The method according to claim 15,
The load state detection unit amplifier characterized in that it determines the load state by using a signal inside the amplification unit. delete delete delete delete

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