KR102133500B1 - Method for designing circuit board and computer-readable recording medium having computer program for performing the same - Google Patents

Abstract

A method of designing a circuit board including a substrate current channel for supplying current to electronic devices disclosed by the present application and a ground plane for grounding electronic devices includes distance information between the ground plane and the current channel, and the substrate current channel. Acquiring peak current information and ground plane specification information, acquiring ground plane insulation limit voltage information based on specification information, and obtaining ground plane insulation limit voltage information based on distance information, peak current information, and insulation limit voltage information. And determining thickness information.

Description

A method for designing a circuit board and a computer-readable recording medium recording a computer program for performing the same. Method for designing circuit board and computer-readable recording medium having computer program for performing the same}

The invention disclosed by the present application relates to a method for designing a circuit board and a computer-readable recording medium recording a computer program for performing the same, and more particularly, for determining a numerical value of the circuit board for preventing dielectric breakdown. It relates to a computer-readable recording medium recording a circuit board design method and a computer program for performing the same.

It is essential that a circuit board including electronic devices having various electrical characteristics is designed in consideration of dielectric strength so that dielectric breakdown can be prevented. Particularly, since the detonation circuit board (Firing circuit Board) that embodies the detonation circuit to detonate the detonation tube is accompanied by high current and high integration packaging due to the characteristics of the application field, accurate electrical analysis is required from the design stage to produce a reliable product. do.

Existing electrical analysis uses a 3D EM simulation tool, a parameter based distributed model, and the like. However, in the case of the existing method, due to the mesh-based complexity, a lot of computational resources are required for accurate analysis and a long analysis time is required. In addition, the methods mentioned show inaccuracies in the isolation limit analysis required for high current applications.

An object of the present invention is to provide a circuit board design method for determining the numerical value of a circuit board in consideration of the possibility of dielectric breakdown of the circuit board.

The problems to be solved by the present invention are not limited to the above-described problems, and the problems not mentioned will be clearly understood by those skilled in the art from the present specification and the accompanying drawings. .

According to an aspect of the present invention, a method of designing a circuit board including a substrate current channel for supplying current to electronic devices disposed on the circuit board and a ground plane for grounding the electronic devices includes a method between a ground plane and a current channel. Obtaining distance information, peak current information of the substrate current channel and specification information of the ground plane; Obtaining insulation limit voltage information of the ground plane based on the specification information; And determining insulation limit thickness information of the ground plane based on the distance information, peak current information, and insulation limit voltage information.

The specification information may include ground plane length information and material information.

When the insulation thickness information is d, the distance information is d, the insulation voltage information is V _{breakdown, material} , the length of the ground plane is l _gnd , and the time change rate of the peak current information is d _Ipeak/dt .

It can be determined by t _breakdown satisfying.

According to another aspect of the invention, obtaining the first loop size information of the loop formed by the substrate current channel, the channel size information of the substrate current channel and the induced voltage information of the ground plane induced by the current flowing in the substrate current channel ; Obtaining loop inductance information of the loop based on the loop size information and the channel size information; The method may further include determining second loop size information to prevent breakdown of the insulation based on the inductance information, the induced voltage information, and the insulation limit voltage information.

For loop inductance information, when the first loop size information is D _loop and the channel size information is d _loop , the equation

It can be determined by the L _loop satisfying.

The circuit board is connected to the detonator through a detonation current channel to which a current for detonation can be applied, and obtaining input voltage information applied to the detonation current channel and channel information indicating electrical characteristics of the detonation current channel; Acquiring channel loss information by modeling a detonated current channel into a plurality of segments based on the channel information; And determining length information of the detonated current channel based on the input voltage information and the channel loss information.

The channel information may include at least one of a resistance value (R), an inductance value (L), a conductance value (G), a capacitance value (C), and a number of segments (N) of the detonation current circuit.

When the length information of the detonated current channel is H _loss for channel loss information, V _{in for} input voltage information, V _imit for lower output voltage information, and V _limit for upper output voltage information, the equation is

It can be determined as l _channel satisfying.

The circuit board according to an embodiment may have a ground plane designed according to insulation thickness information determined by a circuit board design method.

A detonated circuit device according to an embodiment includes a circuit board having a ground plane designed according to insulation limit thickness information determined by a circuit board design method; Detonator; And a detonated current channel connecting the detonator and the circuit board.

A computer program performing a circuit board design method according to an embodiment may be stored in a computer-readable recording medium.

The computer-readable recording medium according to an embodiment may store a computer program for performing a circuit board design method.

The solving means of the subject matter of the present invention is not limited to the above-mentioned solving means, and the solving means not mentioned will be clearly understood by those skilled in the art from the present specification and the accompanying drawings. Will be able to.

According to the present invention, by designing a circuit board having a value determined in consideration of factors of insulation breakdown of the circuit board, insulation breakdown of the circuit board can be prevented even when a high current flows.

In addition, according to the present invention, it is possible to design an optimum ground required for a circuit board in a faster time than before, and it is possible to conduct tests without damaging the prototype with high reliability and accuracy. In addition, it is possible to quantitatively design the length of the high current channel connecting the circuit board to the detonator, and to design the high current channel so that the circuit board is not destroyed by the high current.

In addition, according to the present invention, it is possible to save time and cost spent in designing and verifying a circuit board requiring compact integration.

The effects of the present invention are not limited to the above-described effects, and the effects not mentioned will be clearly understood by those skilled in the art from the present specification and the accompanying drawings.

1 is a block diagram of an apparatus for performing a circuit board design method according to an embodiment.
2 is a block diagram of a processor of an apparatus for performing a circuit board design method according to an embodiment.
3 is a diagram of a detonated circuit device including a circuit board according to an embodiment.
4 is a perspective view and a front view of a circuit board according to an embodiment.
5 is a flowchart illustrating a method for determining thickness information of a circuit board according to FIG. 2.
FIG. 6 is a diagram showing a top view of the circuit board according to FIG. 2 and a current channel disposed on the circuit board.
7 is a flowchart illustrating a method for determining numerical information of a loop formed by a current channel of the circuit board according to FIG. 2.
8 is a diagram illustrating a current channel of the detonation circuit device according to FIG. 1.
9 is a flowchart illustrating a method for determining length information of a current channel of the detonating circuit device according to FIG. 1.

The terminology used in the embodiments was selected from the general terms that are currently widely used while considering the functions in the present invention, but this may vary according to the intention or precedent of a person skilled in the art or the appearance of new technologies. In addition, in certain cases, some terms are arbitrarily selected by the applicant, and in this case, their meanings will be described in detail in the description of the applicable invention. Therefore, the term used in the present invention should be defined based on the meaning of the term and the contents of the present invention, rather than a simple term name.

When a certain part of the specification "includes" a certain component, this means that other components may be further included instead of excluding other components unless otherwise specified. In addition, terms such as “?? unit” and “?? module” described in the specification mean a unit that processes at least one function or operation, which may be implemented in hardware or software, or a combination of hardware and software. have.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art to which the present invention pertains may easily practice. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art to which the present invention pertains may easily practice. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

1 is a block diagram of a circuit board design device according to an embodiment.

Referring to FIG. 1, the circuit board design apparatus 500 may include a processor 520 and a memory 540 that perform a circuit board design method.

The processor 520 may be implemented as a computer or a similar device according to hardware or software or a combination thereof to perform computation and processing of various information necessary to perform a circuit board design method. The processor 520 may be a processor 520 that stores and processes data in hardware, and may be provided in the form of a program or code that drives circuits in software. For example, the processor 520 may exchange data with the communication unit and the memory 540. The processor 520 may receive necessary information from the user through the input unit, and may output a calculation result to the user through the output unit.

The memory 540 may store algorithms and necessary data including a computer program, code, and instructions required to perform a circuit board design method. For example, equations for performing the circuit board design method may be stored in the memory 540. Also, information received through the input unit may be stored in the memory 540. The memory 540 is a flash memory type, hard disk type, multimedia card micro type, card type memory (for example, SD or XD memory), RAM (Random Access Memory, RAM), Static Random Access Memory (SRAM), Read-Only Memory (ROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Programmable Read-Only Memory (PROM) magnetic memory, magnetic disk , It may include at least one type of storage medium of the optical disk.

The circuit board design apparatus 500 may be implemented with hardware components, software components, and/or combinations of hardware components and software components. For example, the devices and components described in the embodiments include a processor, a controller, an arithmetic logic unit (ALU), a digital signal processor (micro signal processor), a microcomputer, a field programmable array (FPA), and a programmable logic unit (PLU). , A microprocessor, or any other device capable of executing and responding to instructions, may be implemented using one or more general purpose computers or special purpose computers. The processing device may run an operating system (OS) and one or more software applications running on the operating system. In addition, the processing device may access, store, manipulate, process, and generate data in response to the execution of the software. For convenience of understanding, a processing device may be described as one being used, but a person having ordinary skill in the art, the processing device may include a plurality of processing elements and/or a plurality of types of processing elements. It can be seen that may include. For example, the processing device may include a plurality of processors 520 or a processor 520 and a controller. In addition, other processing configurations, such as parallel processors, are possible.

The software may include a computer program, code, instruction, or a combination of one or more of these, and configure the processing device to operate as desired, or process independently or collectively You can command the device. Software and/or data may be interpreted by a processing device or to provide instructions or data to a processing device, of any type of machine, component, physical device, virtual equipment, computer storage medium or device. , Or may be permanently or temporarily embodied in the transmitted signal wave. The software may be distributed on networked computer systems, and stored or executed in a distributed manner. Software and data may be stored in one or more computer-readable recording media.

The circuit board design method is implemented in the form of program instructions that can be executed through various computer means and can be recorded in a computer-readable medium. Computer-readable media may include program instructions, data files, data structures, or the like alone or in combination. The program instructions recorded on the medium may be specially designed and constructed for the embodiments or may be known and usable by those skilled in computer software. Examples of computer-readable recording media include magnetic media such as hard disks, floppy disks, and magnetic tapes, optical media such as CD-ROMs, DVDs, and magnetic media such as floptical disks. -Hardware devices specifically configured to store and execute program instructions such as magneto-optical media, and ROM, RAM, flash memory, and the like. Examples of program instructions include high-level language code that can be executed by a computer using an interpreter, etc., as well as machine language codes made by a compiler. The hardware device described above may be configured to operate as one or more software modules to perform the operations of the embodiments, and vice versa.

2 is a block diagram of a processor of a circuit board design device according to an embodiment. Referring to FIG. 2, the processor 520 of the circuit board design apparatus 500 may include a first verification unit 522, a second verification unit 524, and a determination unit 526.

The first verification unit 522, the second verification unit 524, and the determination unit 526 refer to logical and ideological units functionally classified to perform the circuit board 400 design method step by step on a computer program. , The first confirmation unit 522, the second confirmation unit 524, and the determination unit 526 are not necessarily configured to be physically distinct from each other. For example, the first verification unit 522, the second verification unit 524, and the determination unit 526 may be executed through the same processor, or may be executed through separate processors.

The first verification unit 522, the second verification unit 524, and the determination unit 526 independently perform arithmetic and information processing, and share the processing results with each other, and perform a circuit board design method described later. .

For example, the first confirmation unit 522 may acquire distance information between the ground plane and the current channel, peak current information of the current channel, and specification information of the ground plane, as described in more detail through FIG. 5. .

The second verification unit 524 may obtain the insulation limit voltage information of the ground plane based on the specification information of the ground plane obtained through the first verification unit 522.

The determination unit 526, based on the distance information, the peak current information obtained through the first confirmation unit 522 and the insulation limit voltage information obtained through the second confirmation unit 524, the dielectric breakdown thickness information of the ground plane Can decide.

3 is a diagram of a detonated circuit device 1000 including a circuit board 100 according to an embodiment. Referring to FIG. 3, the detonation circuit device 1000 may include a circuit board 100, an detonation current channel 200, and an detonation tube 300.

The detonator 300 may be a tube that ignites and burns by ignition to explode the gunpowder. According to an embodiment, the detonation circuit device 1000 may include a test resistor corresponding to the detonation tube 300 instead of the detonation tube 300 for electrical analysis.

The circuit board 100 may be, for example, a printed circuit board (PCB). For example, the circuit board 100 may be a detonated circuit board implementing a detonation circuit for detonating the detonation tube 300.

The detonation current channel 200 may connect the circuit board 100 and the detonation tube 300. Through the detonation current channel 200, a detonation current of a high current for detonating the detonation tube 300 from the circuit board 100 may be applied to the detonation tube 300. The detonation current channel 200 may include a signal channel and a return current channel. In FIG. 1, the detonated current channel 200 is shown as a cable, but is included in a circuit board 100 such as a flexible printed circuit board (FPCB) to connect the detonator 300 and the circuit board 100. It can be configured in the form of various channels.

According to FIG. 3, the case where the circuit board 100 is a detonated circuit board is assumed and described, but this is only one embodiment of the circuit board 100, and the circuit board 100 is not limited to the detonated circuit board . For example, the method for determining thickness information of the circuit board 100 described with reference to FIGS. 4 to 5 may be applied to the general circuit board 400. Also, a method of determining numerical information of a loop formed by the current channel 410 of the circuit board 400 described with reference to FIGS. 6 to 7 may be applied to the general circuit board 100.

4 is a perspective view and a front view of a circuit board 400 according to an embodiment. Referring to FIG. 4(a), the circuit board 400 may include a current channel 410, an insulating layer 420, and a ground plane 430.

The ground plane 430 may be a metal layer for reflection, shielding, or heat dissipation of a transmission wave passing through a conductor circuit. Alternatively, the ground plane 430 is a layer for grounding, and electronic elements in the circuit board 400 may be connected for grounding. The ground plane 430 may be disposed at the bottom of the circuit board 400 in a planar shape. The ground plane 430 has a length (l _gnd ) and a thickness (t _gnd ).

The current channel 410 may be disposed on the ground plane 430 and form a path through which the current I flows. Since the current channel 410 constitutes the circuit board 400, it may also be referred to as a substrate current channel below.

The insulating layer 420 may be disposed between the current channel 410 and the ground plane 430 to insulate between the current channel 410 and the ground plane 430. The insulating layer 420 has a thickness (d).

Referring to FIG. 4(b), a current I flows along the current channel 410 and a magnetic field S may be formed. An induced voltage V _induced in the ground plane 430 may be generated by the magnetic field 212 formed at this time. The size of induced voltage _(induced V) may be a difference between the voltage (V _induced-) the lower end of the upper ground plane voltage of 430 (V _{induced +)} and the ground plane 430. If the ground plane 430 is continuously exposed to the _induced voltage (V _induced ), the insulating layer 420 may be destroyed, and thus the ground plane 430 and the ground plane 430 may be exposed to high current to function. Can lose. Therefore, the ground plane 430 of the circuit board 400 should be designed in consideration of the influence of the current (I).

Hereinafter, a method of designing the circuit board 400 so that insulation breakdown does not occur in consideration of the above-described matters will be described.

5 is a flowchart of a method for determining thickness information of the circuit board 400 according to FIG. 4. Referring to FIG. 5, a method of determining thickness information of the circuit board 400 includes distance information between the ground plane 430 and the current channel 410, peak current information of the current channel 410, and the ground plane 430. Acquiring the specification information of (S1100), obtaining the insulation limit voltage information of the ground plane 430 based on the specification information (S1200) and the ground plane based on distance information, peak current information, and insulation limit voltage information It may include the step (S1300) of determining the insulation limit thickness information of (430). Each step will be described in more detail below.

According to an embodiment, the execution order of steps S1100, S1200, and S1300 may be changed. In addition, according to an embodiment, step S1100 may be performed after a part thereof is partially performed and the remaining part later. For example, after obtaining the specification information of the ground plane 430 in step S1100, the step S1200 is performed, and then the step S1100 is performed again so that the distance between the ground plane 430 and the current channel 410 is performed. Information and peak current information of the current channel 410 may be obtained.

Step S1100 may be performed by the first confirmation unit 522.

The distance information between the ground plane 430 and the current channel 410 may be a vertical distance (minimum distance) from the ground plane 430 to the current channel 410.

The peak current information of the current channel 410 may be the magnitude of the current I flowing through the current channel 410.

The specification information of the ground plane 430 may include length (l _gnd ) information of the ground plane 430 and material information constituting the ground plane 430. The specification information may include length information of the ground plane 430 and material information such as insulation characteristics, permeability, and dielectric constant.

Step S1200 may be performed by the second verification unit 524.

The insulation limit voltage information refers to a voltage that insulates the ground plane 430 and may be determined by material information. Here, the insulation limit means a phenomenon in which insulation is lost due to discharge through the inside of the insulator at a voltage above a certain threshold.

Step S1300 may be performed by the determination unit 526.

The insulation limit thickness information t _breakdown of the ground plane 430 may be determined by Equation 1 below based on information obtained in steps S1100 and S1200.

[Equation 1]

In the above equation, V _{breakdown, material} is the insulation limit voltage information, l _gnd is the length information of the ground plane 430, I _peak is the peak current information, d is the distance information between the ground plane 430 and the current channel 410. μ is the unit of Farad per meter (F/m) and means the permeability of the ground plane 430. The dI _peak /dt is a unit of ampere per second (A/s), and refers to the rate of time change for peak current information. At this time, the insulation limit thickness information (t _breakdown ) may mean the insulation limit thickness. Through the above process, the thickness of the ground plane 430 of the circuit board 400 to be designed may be designed to have a larger value than the insulation limit thickness information (t _breakdown ).

[Equation 1] can be derived by the following [Equation 2] and [Equation 3].

[Equation 2] represents the voltage (V) induced in the ground plane (430).

[Equation 2]

[Equation 3] represents the insulation limit voltage information (V _{breakdown, material} ).

[Equation 3]

By setting the voltage V of Equation 2 and the insulation limit voltage information V _{breakdown, material} of Equation 3 to be the same, [Equation 1] determines the thickness of the insulation limit of the ground plane 430 Can be obtained.

6 is a diagram showing a top view of the circuit board 400 according to FIG. 4 and a schematic diagram of a current channel 410 disposed on the circuit board 400. Referring to FIG. 6, a current channel 410 is disposed on the circuit board 400, and the current channel 410 may form a loop. If the insulation limit cannot be satisfied by adjusting the thickness of the ground plane 430 of the circuit board 400 to be designed, the loop size of the current channel 410 may be adjusted to satisfy the insulation limit of the ground plane 430. have.

FIG. 6(a) shows a loop formed by the current channel 410 on the circuit board 400 according to an embodiment, and FIG. 4(b) schematically shows the current channel 410 of the circuit board 400. It is one drawing. The current channel 410 is a path through which the current I flows, and when the loop size of the current channel 410 is increased, the inductance of the loop is also increased to increase the induced voltage to the ground plane 430.

The loop of the schematic current channel 410 has a diameter (D _loop ) and a thickness or a size (d _loop ). The loop size information may be the diameter of the loop. The channel size information may be the size of the current channel 410.

7 is a flowchart illustrating a method for determining numerical information of a loop formed by the current channel 410 of the circuit board 400 according to FIG. 4. Referring to FIG. 7, a method for determining numerical information of a loop includes obtaining first loop size information of a loop formed by the current channel 410 and channel size information of the current channel 410 (S2100). Acquiring loop inductance information based on the induction voltage information of the ground plane 430 induced by the current flowing in the channel 410, the first loop size information, and the channel size information (S2200), the loop inductance information, and the induced voltage And determining second loop size information based on the information and the insulation limit voltage information (S2300 ).

According to an embodiment, the execution order of steps S2100 and S2200 and S2300 may be changed. In addition, according to an embodiment, the step S2100 may be performed after a part is partially performed and the remaining part is performed later. For example, in step S2200, the induced voltage information of the ground plane 430 is first acquired, then step S2100 is performed, and then step S2200 is performed again to obtain loop inductance information.

Step S2100 may be performed by the first verification unit 522.

Step S2200 may be performed by the second verification unit 524.

The loop inductance (L _loop ) of the current channel 410 is expressed by the loop size (Dl _oop ) of the current channel 410 as shown in Equation 4 below.

[Equation 4]

In the above equation, D _loop represents the diameter of the _loop in units of meters (m). d _loop means the size of the current channel 410 in meters (m). a may be μ/2, and the unit of the Farad per meter (F/m) is used. Here, μ is the permeability of the current channel 410. b is a constant value of 8, and the unit of loop inductance (L _loop ) is Henry (H).

Step S2300 may be performed by the determination unit 526.

The second loop size information is the loop size of the current channel 410 such that the ground plane 430 satisfies the insulation limit. Accordingly, the second loop size information satisfying the insulation limit of the ground plane 430 may be obtained through a loop-based analysis having the first loop size information. Accordingly, the loop may be newly designed to have second loop size information.

According to an embodiment, after the second loop size information is obtained, steps S2100 to S2300 are performed again, so that the third loop size information in consideration of the insulation limit can be obtained. In other words, the steps S2100 to S2300 are performed repeatedly, so that the accuracy of the electrical analysis of the circuit board 400 in consideration of the insulation limit can be further improved.

8 is a diagram illustrating a detonation current channel 200 of the detonation circuit device 1000 according to FIG. 3. Referring to FIG. 8(a), the detonated current channel 200 connects the circuit board 400 and the detonator 300, and may include a signal channel 210 and a return current channel 220. The input voltage (V _in ) is applied to port 1 (port 1) located at one end of the detonated current channel 200, and the output voltage (via port 2) located at the other end of the detonated current channel 200 is output voltage ( V _out ) is output.

Referring to FIG. 8(b), the detonated current channel 200 may be modeled as a plurality of segments 440-1 to 440-N. Each segment 440-1 to 440-N has first to second resistances having a resistance value of R/(2N), first to second inductors having an inductance value of L/(2N), and C/N. It is represented by a capacitor having a capacitance value and a third resistor having a conductance value of G/N. The units of the first to second resistors are ohms (Ω) and the units of the third resistors are Siemens (S). The unit of the first to second inductors is Henry (H), and the unit of the capacitor uses a farad (F).

The other end of the first resistor is connected to one end of the first inductor. One end of the capacitor is connected to the other end of the first inductor. One end of the second inductor is connected to the other end of the capacitor. One end of the second resistor is connected to the other end of the second inductor. The third resistor is connected in parallel with the capacitor. One end of the first resistor and the other end of the second resistor constitute an input terminal of each of the segments 440-1 to 440-N, and one end of the third resistor and the other terminal of the third resistor are each of the segments 440-1 to 440- The output stage of N) can be configured.

Each segment 440-1 to 440-N of the detonation current channel 200 may be modeled such that the output end of the segment in the front end is connected to the input end of the segment in the rear end. For example, the output terminal of segment 440-1 is connected to the input terminal of segment 440-2.

9 is a flowchart illustrating a method for determining length information of a detonation current channel 200 of the detonation circuit device 1000 according to FIG. 3. Referring to FIG. 9, a method of determining length information of the detonation current channel 200 of the detonation circuit device 1000 includes input voltage information applied to the detonation current channel 200 and electrical characteristics of the detonation current channel 200 Acquiring channel information indicating (S3100), modeling the detonated current channel 200 into a plurality of segments based on the channel information, obtaining channel loss information (S3200), and based on input voltage information and channel loss information It may include the step of determining the length information of the detonation current channel (200) (S3300).

According to an embodiment, the execution order of steps S3100 and S3200 and S3300 may be changed. In addition, according to an embodiment, the step S3100 may be performed after a part is partially performed and the remaining part is performed later. For example, after acquiring channel information indicating the electrical characteristics of the detonated current channel 200 in step S3100, the step S3200 is performed, and then the step S3100 is performed again to apply to the detonated current channel 200 The input voltage information to be obtained may be obtained.

Step S3100 may be performed by the first verification unit 522.

The first confirmation unit 522 may check input voltage information and channel information applied to the detonated current channel 200. The input voltage information means the input voltage (V _in ) to the detonation current channel 200, and the channel information is a resistance value (R), an inductance value (L), a conductance value (G), and a capacitance value (C) in the frequency domain. , It means the number of segments (N).

Step S3200 may be performed by the second verification unit 524.

The second verification unit 524 may determine the Z21(f) parameter based on the N segments 440-1 to 440-N and convert it to the Z21(f) parameter to check channel loss information. The Z21(f) parameter is the transfer impedance from port 1 to port 2, and the unit is ohm (Ω). The Z21(f) parameter is the S parameter from port 1 to port 2, and the unit is volts per volt (V/V). The channel loss information means channel loss per unit length, and the channel loss information is the same as the Z21(f) parameter.

Step S3300 may be performed by the determination unit 526.

The determining unit 526 sets the length information (l _channel ) of the detonated current channel 200 in meters (m) by the following Equation 5 based on the input voltage information Vin and the channel loss information Hloss. Decide.

[Equation 5]

The input voltage information may include lower limit output voltage information and upper limit output voltage information. In the above equation, Vi _nit is the lower limit output voltage information and V _limit is the upper limit output voltage information. The lower limit output voltage information is the minimum voltage required at port 2 and the upper limit output voltage information means the upper limit voltage at port 2.

According to the method for determining the length information of the detonation current channel 200 through the above-described process, the length of the detonation current channel 200 may be designed to satisfy the condition of [Equation 5], and the circuit board 400 Even when testing a prototype, a reliable test can be performed based on a quantitative electrical channel loss model, and a detonated current channel 200 that can perform a safe test without damage to the prototype of the circuit board 400 may be designed. .

As described above, although the embodiments have been described by a limited embodiment and drawings, those skilled in the art can make various modifications and variations from the above description. For example, the described techniques are performed in a different order than the described method, and/or the components of the described system, structure, device, circuit, etc. are combined or combined in a different form from the described method, or other components Alternatively, even if replaced or substituted by equivalents, appropriate results can be achieved.

Therefore, other implementations, other embodiments, and equivalents to the claims are also within the scope of the following claims.

100, 400 circuit board
200 detonation current channels
300 detonator
1000 detonator

Claims (12)

A circuit board design device including a processor and an input unit includes a substrate current channel for supplying current to electronic devices, a ground plane for grounding the electronic devices, and an insulating layer disposed between the substrate current channel and the ground plane. A circuit board design method for determining a numerical value of a circuit board comprising:
Obtaining distance information between the ground plane spaced by the insulating layer and the substrate current channel, peak current information of the substrate current channel, and specification information of the ground plane through the input unit;
Obtaining, through the processor, insulation limit voltage information of the ground plane based on the specification information; And
In order to prevent the breakdown of the ground plane by the current flowing through the substrate current channel through the processor, based on the distance information, the peak current information and the insulation limit voltage information, the insulation limit thickness of the ground plane Determining information; including,
Circuit board design method.
According to claim 1,
The specification information includes length information and material information of the ground plane,
Circuit board design method.
According to claim 2,
The insulation limit thickness information
D, the distance information
The _breakdown voltage information is V _{breakdown, material} ,
The length information of the ground plane is l _gnd ,
When the time change rate of the peak current information is d _Ipeak/dt , it is determined as t _breakdown satisfying Equation 1,
Equation 1 is

sign,
Circuit board design method.
According to claim 1,
Obtaining first loop size information of a loop formed by the substrate current channel and channel size information of the substrate current channel through the input unit;
Obtaining loop inductance information of the loop based on the induced voltage information of the ground plane and the loop size information and the channel size information induced by the current flowing through the substrate current channel through the input unit;
Further comprising, through the processor based on the inductance information, the induced voltage information and the insulation limit voltage information, determining the second loop size information to prevent dielectric breakdown;
Circuit board design method.
According to claim 4,
The loop inductance information,
When the first loop size information is D _loop and the channel size information is d _loop , L _loop satisfying Equation 2 is determined.
Equation 2 is

sign,
Circuit board design method.
According to claim 1,
The circuit board is connected to the detonator through an detonation current channel to which an electric current for detonation can be applied,
Obtaining input voltage information applied to the detonated current channel and channel information indicating electrical characteristics of the detonated current channel through the input unit;
Acquiring channel loss information by modeling the detonated current channel into a plurality of segments based on the channel information through the processor; And
And determining length information of the detonated current channel based on the input voltage information and the channel loss information through the processor.
Circuit board design method.
The method of claim 6,
The channel information includes at least one of a resistance value (R), an inductance value (L), a conductance value (G), a capacitance value (C), and a number of segments (N) of the detonation current channel,
Circuit board design method.
The method of claim 6,
The length information of the detonated current channel,
When the channel loss information is H _loss , the input voltage information is V _in , the lower limit output voltage information is V _imit , and the upper limit output voltage information is V _limit , it is determined as an l _channel satisfying Equation 3,
Equation 3 is

sign,
Circuit board design method.
A substrate current channel for supplying current to electronic devices;
A ground plane for grounding the electronic devices; And
And an insulating layer disposed between the ground plane and the substrate current channel,
The thickness of the insulation limit of the ground plane to prevent insulation breakdown,
Based on the distance information between the ground plane spaced by the insulating layer and the substrate current channel, the peak current information of the substrate current channel, and the insulation limit voltage information of the ground plane obtained based on the specification information of the ground plane. determined,
Circuit board.
A ground plane, a substrate current channel, and an insulating layer disposed between the ground plane and the substrate current channel,
The insulation limit thickness of the ground plane for preventing insulation destruction is based on distance information between the ground plane and the substrate current channel separated by the insulating layer, peak current information of the substrate current channel, and specification information of the ground plane. A circuit board that is determined based on the insulation limit voltage information of the ground plane obtained by;
Detonator; And
Included; a detonation current channel connecting the detonator and the circuit board
Detonation circuit device.
A computer program coupled with hardware to perform a circuit board design method,
Ground plane, substrate current channel and distance information between the ground plane and the substrate current channel of the circuit board including an insulating layer disposed between the ground plane and the substrate current channel, peak current information and the ground of the substrate current channel Obtaining specification information of the plane;
Obtaining insulation limit voltage information of the ground plane based on the specification information; And
Determining an insulation limit thickness information of the ground plane based on the distance information, the peak current information, and the insulation limit voltage information, in order to prevent insulation breakdown of the ground plane due to the current flowing through the substrate current channel; Containing,
A computer program stored in a computer readable recording medium that performs a circuit board design method.
Ground plane, substrate current channel and distance information between the ground plane and the substrate current channel of the circuit board including an insulating layer disposed between the ground plane and the substrate current channel, peak current information and the ground of the substrate current channel Obtaining specification information of the plane;
Obtaining insulation limit voltage information of the ground plane based on the specification information; And
Determining an insulation limit thickness information of the ground plane based on the distance information, the peak current information, and the insulation limit voltage information, in order to prevent insulation breakdown of the ground plane due to the current flowing through the substrate current channel; Containing,
A computer-readable recording medium storing a computer program for performing a circuit board design method.

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